Commit Graph

407 Commits

Author SHA1 Message Date
Jonas Maebe
a25ebbba3e + added volatility information to all memory references
o separate information for reading and writing, because e.g. in a
     try-block, only the writes to local variables and parameters are
     volatile (they have to be committed immediately in case the next
     instruction causes an exception)
   o for now, only references to absolute memory addresses are marked
     as volatile
   o the volatily information is (should be) properly maintained throughout
     all code generators for all archictures with this patch
   o no optimizers or other compiler infrastructure uses the volatility
     information yet
   o this functionality is not (yet) exposed at the language level, it
     is only for internal code generator use right now

git-svn-id: trunk@34996 -
2016-11-27 18:17:37 +00:00
Jonas Maebe
aa1be3276f - removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
it was AT_NONE, which is invalid and should never be used
  * explicitly pass the correct value for all calls to those methods elsewhere
    in the compiler

git-svn-id: trunk@34250 -
2016-08-05 07:09:16 +00:00
Jonas Maebe
1cb8c0d00c * specify the def of assembler level symbols defined via
tasmdata.DefineAsmSymbol() and all routines that call it
   o will be used to automatically generate AB_INDIRECT sybols when
     necessary

git-svn-id: trunk@34164 -
2016-07-20 20:52:59 +00:00
Jonas Maebe
a5dba44fd3 * fixed sign extension for unaligned loads (mantis #29891, although that
code shouldn't use unaligned loads in the first place)

git-svn-id: trunk@33382 -
2016-03-29 14:52:27 +00:00
Jonas Maebe
1320d6bdba * correctly handle negative paraloc shift values for non power-of-2 sized
paralocs (e.g. a 3 byte record) in case the data's size has been
    rounded up to the next power of two as far as the paraloc is concerned
    (because those 3 bytes had to be shifted to be located in the upper 3
     bytes of a 4 byte location)

git-svn-id: trunk@32633 -
2015-12-10 22:45:56 +00:00
Jonas Maebe
3f736f6114 * handle the loading of VMT entries at the node level, so it's done in a
type-safe way (for LLVM, and also internal consistency checking between
    the VMT as generated in nobj.pas and ncgvmt.pas)
   o also converted the VMT validity checking to the node level

git-svn-id: trunk@30950 -
2015-05-31 16:50:47 +00:00
florian
d598351664 * call also optimize_op_const in the generic a_op_const_reg_reg
git-svn-id: trunk@30658 -
2015-04-19 10:04:57 +00:00
Jonas Maebe
61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm)
git-svn-id: trunk@30429 -
2015-04-04 14:29:16 +00:00
Jonas Maebe
bd203a5b57 * synchronised with trunk till r30240
git-svn-id: branches/hlcgllvm@30241 -
2015-03-15 19:44:58 +00:00
Jonas Maebe
622852b8c9 * check that a_load_cgparaloc_anyreg() is not used to try to move an fpu
register into a non-fpu register, as this is not (yet) supported

git-svn-id: trunk@30226 -
2015-03-14 18:36:54 +00:00
Jonas Maebe
6d02aedf70 * support multiple register paralocs in tcgobj.a_loadfpu_ref_cgpara()
git-svn-id: trunk@30223 -
2015-03-14 18:36:46 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095
git-svn-id: branches/hlcgllvm@30101 -
2015-03-05 20:32:15 +00:00
Jonas Maebe
2ab7f5c35d * moved x86-specific requirements from the generic bsr/bsf code to the
x86 code generator (register size constraints)

git-svn-id: trunk@29984 -
2015-02-23 22:57:18 +00:00
Jonas Maebe
504a9d1594 * fixed register sizes in a_load_ref_reg_unaligned()
git-svn-id: trunk@29821 -
2015-02-23 22:47:50 +00:00
Jonas Maebe
e6511bcb33 * support multiple paralocs in a_load_reg_cgpara() by taking a round trip
via a_load_ref_cgpara()

git-svn-id: trunk@29814 -
2015-02-23 22:47:29 +00:00
sergei
8f4430e795 * tcg.translate_register: check that reg.allocator is not nil before calling its method (in case of "assembler nostackframe" function returning an x87 float compiler tries to translate NR_ST which is used for function result).
* tcg.a_reg_dealloc: ignore NR_NO, prevents creating useless deallocations of NR_DEFAULTFLAGS on MIPS targets which have NR_DEFAULTFLAGS=NR_NO.

git-svn-id: trunk@29242 -
2014-12-10 07:13:14 +00:00
Jonas Maebe
b745dcc64c * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because
for some platforms it depends on that routine

git-svn-id: branches/hlcgllvm@28492 -
2014-08-19 20:22:54 +00:00
Jonas Maebe
a637fbe596 * moved all g_exception_*() methods to hlcgobj and cleaned them up (no more
hardcoded registers for the most part)
  + added extra g_exception_discard_reason() that can be called when we only
    want to get rid of the currently pushed exception reason, and don't have
    to load it (so it can do nothing on platforms that don't use push/pop)

git-svn-id: branches/hlcgllvm@28481 -
2014-08-19 20:22:24 +00:00
Jonas Maebe
5c75b6dd6b * synchronised with trunk up till r28402
git-svn-id: branches/hlcgllvm@28403 -
2014-08-13 16:04:30 +00:00
Jonas Maebe
831cc96f48 * give an internalerror when calling cg.makeregsize() for a high level
target (explanation why in comments)

git-svn-id: branches/hlcgllvm@28388 -
2014-08-12 18:59:16 +00:00
sergei
e4fea2ebc8 * Dummy implementations of a_bit_scan_reg_reg and g_stackpointer_alloc in tcg, removes the need to override these methods in every descendant code generator solely to avoid "constructing a class with abstract method" warning.
git-svn-id: trunk@28175 -
2014-07-06 11:34:04 +00:00
Jonas Maebe
7949bebb8d * synchronised with r28168 of trunk
git-svn-id: branches/hlcgllvm@28169 -
2014-07-05 21:30:28 +00:00
sergei
cd27d64cd5 + Support (as target-independent as possible) optimization of division by constants:
The code generator gets two new methods, a_mul_reg_reg_pair and g_div_const_reg_reg. The first one is basically 32x32 to 64 bits multiplication (or any other size, with result having twice the size of arguments), which must be implemented for every target. The second one actually does the job, its default implementation taken from powerpc64 and is sufficiently good for all three-address targets.

+ Enabled optimized division for MIPS target, target-specific changes are under 30 lines.

git-svn-id: trunk@27904 -
2014-06-08 22:50:24 +00:00
Jonas Maebe
bacd303208 * synchronized with trunk up to r27758
git-svn-id: branches/hlcgllvm@27779 -
2014-05-12 16:12:34 +00:00
nickysn
5dcbaa4b2d - rm the cpu16bitalu and cpu64bitalu ifdefs from tcg.a_load_ref_cgpara as well
(basically the same change as in r27664, but in tcg, instead of thcgobj)

git-svn-id: trunk@27666 -
2014-04-26 14:33:46 +00:00
Jonas Maebe
dab8754bb6 * moved joinreg64 from cg64f32 to cgobj (joinreg128 is also declared
there)

git-svn-id: trunk@27152 -
2014-03-16 11:24:36 +00:00
Jonas Maebe
e9268a0a14 * synchronised with trunk up till r26975
git-svn-id: branches/hlcgllvm@26976 -
2014-03-06 21:36:58 +00:00
sergei
9c1f917e3a * a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.
+ x86 targets now directly call procedure variables located in references.
- a_call_ref method removed from tcg and thlcgobj.

git-svn-id: trunk@26666 -
2014-02-03 13:28:56 +00:00
sergei
0d3f36eebf - Remove references to global variable 'cg' from methods of tcg and some of its descendants.
git-svn-id: trunk@26665 -
2014-02-03 12:27:48 +00:00
nickysn
be85998313 * fixes in optimize_op_const:
* Do the sign extension of the 'a' parameter internally in a local variable,
    so that it does not become visible outside the function.
  * Use a zero extended version of 'a' (instead of sign extension) for the
    parameter of ispowerof2().

git-svn-id: trunk@26571 -
2014-01-23 14:05:11 +00:00
nickysn
85dd9e5789 + added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1)
git-svn-id: trunk@26561 -
2014-01-22 15:00:34 +00:00
sergei
5cd0684d45 * tcg.a_load_ref_reg_unaligned: if loading signed 16-bit value, treat upper half as signed 8-bit to ensure that result is properly extended. This routine is used only by SPARC target (other CPUs use specific implementations), and it generates pretty inefficient code, therefore it's probably worth to drop it altogether and implement SPARC-specific version. Mantis #25440.
git-svn-id: trunk@26255 -
2013-12-20 17:07:00 +00:00
Jonas Maebe
1df3039424 + LLVM temp allocator based on new R_TEMPREGISTER register class. For every
temp we allocate, we set the base register to a newly allocated
    R_TEMPREGISTER. This allows for uniquely identifying a temp even if its
    offset is modified.

git-svn-id: branches/hlcgllvm@26033 -
2013-11-11 11:14:59 +00:00
nickysn
bf07fc077b * specify AT_DATA in all references to the tobjectdef.vmt_mangledname symbol.
This fixes a lot of bugs, related to objects and classes in the i8086 medium
  memory model

git-svn-id: trunk@25794 -
2013-10-15 18:56:27 +00:00
svenbarth
c48d572996 Implement support for saving and restoring address registers.
cgobj.pas, tcg:
  * g_save_registers: add the amount of used address registers to size as well
  * g_save_registers: save all used address registers
  * g_restore_registers: restore all stored address registers
m68k/cpubase.pas:
  * rename saved_standard_address_registers to saved_address_registers
all other platform's cpubase.{inc,pas} (except alpha, ia64 and vis which are not up to date):
  * add a saved_address_registers variable with one entry of RS_INVALID

At least a "make fullcycle" did complete.

git-svn-id: trunk@25664 -
2013-10-05 21:43:42 +00:00
svenbarth
235c06ab34 Implement volatile address registers. Fixes quite some tests, but also breaks others... (overall more are fixed than are broken :) )
paramgr.pas, tparamanager:
  + add virtual get_volatile_registers_address method which by default returns an empty set
cgobj.pas, tcg:
  * allocallcpuregisters: also allocate address registers if needed
  * deallocallcpuregisters: also deallocate address registers if needed
ncgcal.pas, tcgcallnode.pass_generate_code:
  * (de)allocate address registers
  * keep result from being deallocated if it should be an address register (currently by no architecture...)
m68k/cpupara.pas, tm68kparamanager:
  + get_volatile_registers_address: return a0 and a1 as volatile registers
m68k/n68kmat.pas, tm68kmoddivnode.call_rtl_divmod_reg_reg:
  * (de)allocate address registers

git-svn-id: trunk@25633 -
2013-10-03 20:33:11 +00:00
florian
e81d2d1f3b * basic avx support for floating point operations (use -Cfavx to activate)
git-svn-id: trunk@24896 -
2013-06-14 20:03:01 +00:00
nickysn
512ca83f33 - don't allocate/deallocate the fpu registers in tcg.[de]allocallcpuregisters on the i8086
git-svn-id: trunk@24505 -
2013-05-15 08:24:07 +00:00
nickysn
a5c5b05362 * initial support for system procs that use calling conventions that push left to right on i8086 or i386
git-svn-id: branches/i8086@24282 -
2013-04-21 13:26:12 +00:00
florian
1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet
git-svn-id: trunk@23682 -
2013-03-03 12:20:10 +00:00
paul
5d74e0578a compiler: remove unused variables and unneeded assignments
git-svn-id: trunk@23467 -
2013-01-21 01:24:36 +00:00
Jonas Maebe
69c29a415f * pass the procdef to getintparaloc instead of only the proccalloption, so
that the type of the parameters can be determined automatically
   o added compilerproc declarations for all helpers called in the compiler
     via their assembler name, so we can look up the corresponding procdef

git-svn-id: trunk@23325 -
2013-01-06 15:05:40 +00:00
florian
4f30ac0247 * put records with 16 bytes size into two register on 64 bit targets if possible
* don't put records containing floats into integer registers
* copy&paste error in tcg128.a_load128_const_reg fixed

git-svn-id: trunk@23317 -
2013-01-05 22:58:32 +00:00
pierre
d8c2930454 Also accept R_ADDRESSREGISTER in a_load_cgparaloc_anyreg method
git-svn-id: trunk@22763 -
2012-10-19 11:55:39 +00:00
florian
2e7fe1aebd * support of avx register requires now proper usage of R_SUBMMWHOLE
git-svn-id: trunk@22574 -
2012-10-07 18:47:17 +00:00
florian
ca5fabda6d * cleanup some unused units from uses clauses
git-svn-id: trunk@22433 -
2012-09-21 18:53:46 +00:00
florian
67744ef46e * fix methodpointers in registers on big endian targets
git-svn-id: trunk@22362 -
2012-09-09 17:54:35 +00:00
florian
d93cee995b * fix register method pointer for ppc64 and x86_64-linux
git-svn-id: trunk@22351 -
2012-09-07 15:15:10 +00:00
florian
7361e19799 + support for handling OS_128/OS_S128 on 64 Bit CPUs as far as needed for method pointers in registers
git-svn-id: trunk@22344 -
2012-09-06 15:12:12 +00:00
Jonas Maebe
be8f8fec76 * converted tcg.g_releasevaluepara_openarray() to thlcg
git-svn-id: trunk@21879 -
2012-07-11 15:23:18 +00:00