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41 Commits

Author SHA1 Message Date
Jonas Maebe
74a49b5f91 * restructured the the TExternalAssembler constructors so that the 
hack for the Jasmin descendent is no longer needed

git-svn-id: trunk@34852 -
 2016-11-09 19:51:20 +00:00
yury
649823a246 * Removed unused vars. 
git-svn-id: trunk@34405 -
 2016-09-01 20:01:54 +00:00
sergei
ed2488eb03 - MIPS: removed the ugly hack of splitting LDC1/SDC1 instructions into pairs of LWC1/SWC1 at assembler writer level. It probably was there as a workaround for insufficient alignment of double-precision variables, which was present once, but fixed a long time ago. 
git-svn-id: trunk@33084 -
 2016-02-11 15:09:19 +00:00
sergei
7f58608008 * MIPS: changed function is_macro_instruction into method of taicpu. Functionality unchanged. 
git-svn-id: trunk@33081 -
 2016-02-10 12:46:55 +00:00
sergei
4fc05e6ec1 - MIPS: removed taicpu.delayslot_annulled, it was a copy-paste from SPARC code. 
git-svn-id: trunk@33073 -
 2016-02-09 01:32:42 +00:00
yury
11a9ff4a43 * Removed unused vars for mipsel compiler. 
git-svn-id: trunk@31745 -
 2015-09-17 15:46:30 +00:00
Jonas Maebe
991e1f49bd * store a pointer to the used tasminfo record in every assembler writer, so 
that we can use assembler writers with different conventions from the
    currently set target_asm (e.g. an x86 assembler writer for inline assembly
    in LLVM IR)

git-svn-id: trunk@31628 -
 2015-09-12 23:32:13 +00:00
Jonas Maebe
b3d0197f98 * factored out the output file handling (mostly writing data) from the 
external assembler writer, so we can reuse the archtecture-specific
    writers to write inline assembly in LLVM IR files

git-svn-id: trunk@31625 -
 2015-09-12 23:32:01 +00:00
sergei
b46ce6b70e * Fixed condition to output div/divu having R0 as first operand as non-macros. 
git-svn-id: trunk@29359 -
 2014-12-29 23:19:01 +00:00
sergei
244f65525b * MIPS: dropped gas_std_regname, its functionality merged into std_regname. This fixes register names in non-instructions (reg. allocation information, variable locations, etc.) and makes assembler listings more readable. 
git-svn-id: trunk@27986 -
 2014-06-16 22:52:56 +00:00
florian
b2b26f84cf * partially merged the mips-embedded branch of Michael Ring: 
- startup code/controller units are not merged yet
  - assembler call does not pass the needed CPU type yet

git-svn-id: trunk@27188 -
 2014-03-19 21:25:38 +00:00
yury
56b3287e29 + Added compiler support for mipsel-android target. 
git-svn-id: trunk@26686 -
 2014-02-06 17:02:43 +00:00
pierre
5e6669890a Handle asmextraopt in powerpc, mips and sparc assemblers 
git-svn-id: trunk@26542 -
 2014-01-21 00:19:17 +00:00
sergei
456f991c51 * MIPS: 3-operand forms of DIV and DIVU are not macros if first operand is $zero. 
git-svn-id: trunk@24918 -
 2013-06-20 13:14:38 +00:00
sergei
2868a30cce + Added mips32r2 opcodes needed for pic32. 
* Output registers of type R_SPECIALREGISTER as numbers.
+ For MTC0/MFC0 instructions, set type of first operand to R_SPECIALREGISTER, since it designates a coprocessor register.

git-svn-id: trunk@24799 -
 2013-06-03 20:01:30 +00:00
sergei
fe322f35d5 * MIPS: fixed passing CPU type specified with -CpXXX switch to assembler 
- removed mips_cpu variable and cpu_mips_default CPU type.
  * globals.pas: default CPU type changed to MIPS2, this is what was passed to assembler before.

git-svn-id: trunk@24643 -
 2013-05-30 15:02:40 +00:00
sergei
2944fc8839 * MIPS improvements: 
* reworked condition codes, changed BC1T and BC1F from separate instructions to condition jumps.
  - removed A_P_SW, A_P_LW and A_SPARC8UNIMP
  + support '.set at' and '.set noat' directives
  + prepare to support bgtz,bgez,bltz,blez instructions.

git-svn-id: trunk@24631 -
 2013-05-29 17:35:56 +00:00
sergei
e1f6cf79e9 * MIPS: an empty reference (no symbol, base or index and zero offset) must not be output as empty string. 
git-svn-id: trunk@24630 -
 2013-05-29 15:59:40 +00:00
sergei
7cfc737866 * MIPS: rewrote 32-bit code generation methods, reducing code duplication. 
+ Implemented overflow checking for unsigned 32-bit addition and subtraction.
* Use optimize_op_const instead of custom optimizations.
* Change AND/OR/XOR into ANDI/ORI/XORI if they use immediate operands, and use correct range for these immediate operands, must be 0..65535 unlike -32768..32767 for arithmetic operations.
* Don't treat AND/OR/XOR as macros, no longer necessary.
* Don't treat BEQ/BNE as macros either.

git-svn-id: trunk@24445 -
 2013-05-05 05:55:03 +00:00
sergei
a0c1e1b07f * MIPS: fixed a_call_name and a_call_reg methods to workaround a bug in GAS <2.21, see comments in source for details. 
+ g_external_wrapper method.

git-svn-id: trunk@23565 -
 2013-02-02 23:52:58 +00:00
sergei
503b132096 * cgbase.pas: added more MIPS-specific address types, needed to support large GOT model. 
* cpugas.pas: GetReferenceString: rewritten, it is easier than trying to fix it. Fixes incorrect writing of non-PIC references containing base, symbol and offset together, and some forms of PIC references. Also supports newly introduced address types.

git-svn-id: trunk@23555 -
 2013-02-01 16:46:22 +00:00
pierre
9cb7be4c92 + Support addr_pic_call16 
* Add more instructions to is_macro_instruction function

git-svn-id: trunk@23548 -
 2013-01-31 13:32:18 +00:00
pierre
9e6a2b868c Fix -Cp option failure due to cputypestr array that must be uppercased 
git-svn-id: trunk@23446 -
 2013-01-18 17:09:28 +00:00
florian
e6863aeb80 * typo fixed, patch by Mark Morgan Lloyd 
git-svn-id: trunk@23108 -
 2012-12-03 21:55:09 +00:00
Jonas Maebe
6497d3c994 - removed no longer used/supported af_allowdirect flag (direct assembler 
reader support)

git-svn-id: trunk@22794 -
 2012-10-21 13:42:58 +00:00
pierre
25b0de0c28 Use -march and -mabi options for GNU assembler call. 
This avoids problems on newer GNU assembler, which might have
 a default ABI different from O32.

git-svn-id: trunk@22664 -
 2012-10-16 10:01:23 +00:00
pierre
c53d07f741 Improve addr_pic support 
git-svn-id: trunk@21796 -
 2012-07-05 21:16:02 +00:00
pierre
e25937854f Use std reg names and and 
git-svn-id: trunk@21781 -
 2012-07-04 16:34:06 +00:00
pierre
f9930e3f46 Use ldc1 and sdc1 for big endian mips CPU directly 
git-svn-id: trunk@21670 -
 2012-06-21 11:51:07 +00:00
pierre
46d98a1f4e * Fix mips compiler compilation failure 
git-svn-id: trunk@21620 -
 2012-06-15 14:26:51 +00:00
pierre
600dd162af Merge of rev21557 by Foxsen 
Make macro MIPS/CPUMIPS/MIPS32 common for big endian and little endian mips processors
use MIPSEL* for little endian systems
use MIPSEB* for big endian systems

git-svn-id: trunk@21599 -
 2012-06-13 22:25:38 +00:00
pierre
93e0dd9c2f * Patch from Fuxin Zhang: other mips and mipsel CPUs changes 
git-svn-id: trunk@21538 -
 2012-06-07 23:20:06 +00:00
florian
25e82bb1af * fix stack frame generation on mips(el) 
git-svn-id: trunk@21121 -
 2012-04-29 21:29:06 +00:00
florian
aadeba4d1a * started to fix stack frame generation on MIPS(EL) 
git-svn-id: trunk@21118 -
 2012-04-29 16:58:19 +00:00
florian
c7974fe119 * mipsel-linux uses also a dollar sign as separator in assembler names 
git-svn-id: trunk@20955 -
 2012-04-21 18:19:38 +00:00
Jonas Maebe
ac43eb9b70 + generic implementation of ReplaceForbiddenAsmSymbolChars() instead 
of the AVR-specific ifdef'ed variant
   o since the only special character we use in mangled names on all platforms
     is $, added a new field to tasminfo called "dollarsign" that holds the
     character $'s should be replaced with (if it doesn't have to be replaced,
     leave it at $)

git-svn-id: trunk@20801 -
 2012-04-11 18:01:57 +00:00
florian
f927198c2a + gas for mips is by default little endian, so pass the endianess 
git-svn-id: trunk@20280 -
 2012-02-08 21:28:22 +00:00
pierre
19e11f889f * Fix error in EXTDEBUG code 
git-svn-id: trunk@20227 -
 2012-02-02 23:55:43 +00:00
florian
28ac4a8dda * several mips/mipsel related stuff fixed 
* regenerated linux makefile to support mipsel

git-svn-id: trunk@14278 -
 2009-11-27 15:10:56 +00:00
florian
f54365db94 * adapted more fpc-mips stuff to trunk 
git-svn-id: trunk@14230 -
 2009-11-20 21:13:53 +00:00
florian
0c8546f94c * more MIPS code of David Zhang integrated 
git-svn-id: trunk@14228 -
 2009-11-20 14:46:45 +00:00