the stack pointer during the prolog. This was done previously in
tcg.g_proc_entry(), but that routine is called after register allocation
and hence has no influence. Also cleaned up the deallocation of that
register by moving the previously ifdef'd code to thlcgppcgen
(mantis #27634)
git-svn-id: trunk@30164 -
platforms that normally must copy value parameters on the caller side,
because
o if we copy them on the caller side, then the behaviour will be different
compared to other platforms if the called routine is implemented in C
(since they are passed by reference, changes to the array contents will
be visible on other platforms, while they wouldn't be visible if the
copy is made on the caller side)
o if we don't copy them on the caller nor on the callee side, then behaviour
will be different compared to other platforms if the called routine is
implemented in Pascal and modifies the array (since then changes won't be
visible on the caller side, except on platforms that normally perform
the copy on the caller side)
git-svn-id: trunk@29873 -
be copied on the caller instead of callee side
o mark Darwin/Aarch64 as such a target (any AArch64 target will be like
that normally, as its ABI specifies this behaviour)
o don't mark by-reference value parameters on such targets as
vo_has_local_copy, since a) they don't have one (the copy is on the
caller side), and b) this ensures that all code handling such
parameters automatically knows that they are still by reference
after the init code has run
o when making the copies on the caller side, don't increase the
reference count for managed types except for variants, just like
is done when making the copies on the callee side. This is because
the reference count increasing code on the callee side only runs
for non-assembler functions, and we cannot know 100% certain on the
caller side whether the called function is assembler or not (e.g. in
case of externally declared functions)
o maybe over time we can reuse the Pascal code in
tcallparanode.copy_value_by_ref_para to replace the equivalent code
in hlcgobj and ncgutil also on the caller side for other targets
git-svn-id: trunk@29870 -
single register, by first storing everything consecutively to memory and
then loading it. Required for "homogeneous float aggregates" on AArch64
git-svn-id: trunk@29815 -
the code written in hlcg.gen_proc_symbol to avoid change from AB_LOCAL
to AB_GLOBAL, which generates erroneous code (at least for targets using GOT)
git-svn-id: trunk@29450 -
hardcoded registers for the most part)
+ added extra g_exception_discard_reason() that can be called when we only
want to get rid of the currently pushed exception reason, and don't have
to load it (so it can do nothing on platforms that don't use push/pop)
git-svn-id: branches/hlcgllvm@28481 -
be included at the start of the implementation of the system unit (before
the rest of except.inc)
* catch declarations in/loading from the system unit of the TExceptAddr type
* use this type instead of hardcoded size constants in the compiler
* in generic code that is active for all targets, puts its use in a virtual
method since it's only valid for targets using setjmp/longjmp-style
exception handling (and the record is not defined at all in the JVM RTL)
git-svn-id: branches/hlcgllvm@28376 -
Add support for .set and .weak on AVR.
Fix 64 bit negation on AVR.
Add cpu_capabilities to cpuinfo.pas and fixed some peephole optimizations.
Pass >4 byte parameters by reference.
git-svn-id: trunk@26943 -
This improves compiling speed a bit (two iterations over symtables replaced by one, code generator is created once per unit rather than once per class).
In perspective it makes possible to reduce amount of generated smartlink sections and global labels.
git-svn-id: trunk@24269 -
that the type of the parameters can be determined automatically
o added compilerproc declarations for all helpers called in the compiler
via their assembler name, so we can look up the corresponding procdef
git-svn-id: trunk@23325 -
fixes a couple of arm-embedded stuff,
adds some controllers, start of fpv4_s16 support, for a complete list of
changes see below:
------------------------------------------------------------------------
r22787 | laksen | 2012-10-20 22:00:36 +0200 (Sa, 20 Okt 2012) | 1 line
Properly do NR_DEFAULTFLAGS detection/allocation/deallocation
------------------------------------------------------------------------
r22782 | laksen | 2012-10-20 07:44:55 +0200 (Sa, 20 Okt 2012) | 1 line
Fixed flags detections code for wide->short optimization code for Thumb-2
------------------------------------------------------------------------
r22778 | laksen | 2012-10-19 20:23:14 +0200 (Fr, 19 Okt 2012) | 1 line
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
------------------------------------------------------------------------
r22647 | laksen | 2012-10-14 21:28:08 +0200 (So, 14 Okt 2012) | 1 line
Added register specifications to lpc1768.pp. From Joan Duran
------------------------------------------------------------------------
r22646 | laksen | 2012-10-14 21:10:20 +0200 (So, 14 Okt 2012) | 4 lines
Fixed some minor formating issues
Implemented a small heap mananger
Implemented console IO
Changed default LineEnding to CrLf(to ease console IO parsing)
------------------------------------------------------------------------
r22599 | laksen | 2012-10-09 08:58:58 +0200 (Di, 09 Okt 2012) | 1 line
Added all STM32F1 configurations
------------------------------------------------------------------------
r22597 | laksen | 2012-10-08 22:10:45 +0200 (Mo, 08 Okt 2012) | 1 line
Added initial support for the Cortex-M4F FPv4_S16 FPU
------------------------------------------------------------------------
r22596 | laksen | 2012-10-08 22:04:14 +0200 (Mo, 08 Okt 2012) | 1 line
Added FPv4_d16 FPU instructions, and a few extra registers
------------------------------------------------------------------------
r22592 | laksen | 2012-10-08 16:07:40 +0200 (Mo, 08 Okt 2012) | 2 lines
Added support for IT block merging
Added a peephole pattern check for UXTB->UXTH chains
------------------------------------------------------------------------
r22590 | laksen | 2012-10-08 14:30:00 +0200 (Mo, 08 Okt 2012) | 3 lines
Add CBNZ/CBZ instructions
Create preliminary Thumb-2 PeepHoleOptPass2 code, hacked together from the ARM mode code
Added a number of simple size optimizations for common Thumb-2 instructions
------------------------------------------------------------------------
r22582 | laksen | 2012-10-08 06:49:39 +0200 (Mo, 08 Okt 2012) | 3 lines
Fix optimizations of Thumb-2 code
Fix problem with loading of condition operand for IT instructions
Properly split IT blocks when register allocator tries to spill inside a block.
------------------------------------------------------------------------
r22581 | laksen | 2012-10-08 05:15:40 +0200 (Mo, 08 Okt 2012) | 4 lines
Fixed assembler calling command line for cpus>ARMv5TE. EDSP instructions will generate errors while assembling, due to RTL assembler routines
Updated boot code for all Cortex-M3 controllers, and sc32442b to use weak linking for exception tables.
Cortex-M3 devices now also share initialization routine to simplify maintenance
STM32F10x classes now have specific units which fit the interrupt source names and counts
------------------------------------------------------------------------
r22580 | laksen | 2012-10-08 05:10:44 +0200 (Mo, 08 Okt 2012) | 2 lines
Added support for .section, .set, .weak, and .thumb_set directive for GAS assembler reader
IFDEF'ed JVM specific assembler directives, to prevent ait_* set to exceed 32 elements
------------------------------------------------------------------------
r22579 | laksen | 2012-10-08 02:10:52 +0200 (Mo, 08 Okt 2012) | 3 lines
Remove all traces of the interrupt vector table generation mechanism
Clean up cpuinfo tables
Fixed ARMv7M bug(BLX <label> doesn't exist on that version)
git-svn-id: trunk@22792 -
(avoids imaginary register number in "# Var I in register .." assembler comments.
* dbgdwarf.pas : Support register variables as register pairs.
Does not yet handle case of changing registers.
* symsym.pas : add currentregloc field to tabstractnormalvarsym class,
to be able to track changing registers used for a given variable.
* aasmtai.pas : Update currentregloc field of tai_varloc.create sym parameter.
* ncgutil.pas : Only generate a tai_varloc if the new registers are different for the variable.
git-svn-id: trunk@22508 -
the result location is a simple location (a single register/reference)
(mantis #22490)
* print an error when accessing "result" in a nostack pure assembler routine
if the result location is not simple
git-svn-id: trunk@22166 -
psub.pas: Use new fpc_compiler_has_fixup_jmps conditional.
mips/aasmcpu.pas: MIPS specific fixup_jmps function,
The insttruction distance calculation is not exact as
some pseudo-instruction can be expanded to a variable number of real instructions
real calculation would only be possible if we first
convert pseudo-instuctions to real instructions before calling fixup_jmps.
ncgutil.pas: Revert commit r21791
ncgcon.pas: Revert commit r21786
mips/cgcpu.pas: Partial revert of commit r21798, no need to always use A_J,
as fixup_jmps now handles out of range branches.
git-svn-id: trunk@21822 -
getintparaloc + adapted all call sites of getintparaloc. This
led to a number of additional, related changes:
o corrected the type information for some getintparaloc parameters
o don't allocate some intparalocs in cases they aren't used
o changed "const tvardata" parameter into "constref tvardata" for
fpc_variant_copy_overwrite to make pass-by-reference semantics
explicit
o moved a number of routines that now have to call find_system_type()
from cgobj to hlcgobj so that cgobj doesn't have to start depending
on the symtable unit
o added versions of the cpureg alloc/dealloc methods to hlcgobj that
call through to their cgobj counter parts, so we can call save/restore
the cpu registers before/after calling system helpers from hlcgobj
(not implemented in hlcgobj itself, because all basic register
allocator functionality is still part of cgobj/cgcpu)
git-svn-id: trunk@21696 -
and also use this code to trash local variables in inlined routines
o fixes mantis #22088
o makes it possible to also implement it for the jvm target in the future
git-svn-id: trunk@21393 -
+ implement trashing of local variables if subroutine is inlined
* fix some errors releated to interproc. gotos and inlining
+ node_count function
* inline cannot be used with iochecking and safecall calling conventions
* track inherited usage
* don't inline if inherited is used
git-svn-id: trunk@21335 -
future use by high level code generator targets
o this in turn required that all a_load*_loc* methods are called via
hlcg rather than via cg, since a location can be a subsetref/reg and
and those are no longer handled in tcg
o that then required moving several force_location_* routines into
thlcg because they use a_load_loc*, but did not take tdef size
parameters (which are required by the thlcg a_load_loc* routines)
o the only practical consequence is that from now on, you have to
use hlcg.location_force_mem/reg() (fpureg not yet) and
hlcg.gen_load_loc_cgpara() instead of the removed versions from ncgutil,
and hlcg.a_load*loc*() instead of cg.a_load*loc* if a subsetref/reg
might be involved
git-svn-id: trunk@21287 -
