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214 Commits

Author SHA1 Message Date
florian
99b71eafda * simplified code 2025-02-10 22:29:18 +01:00
florian
9cb6497fae + function node_not_zero and make use of it 2025-02-08 20:07:20 +01:00
florian
b2f6214b33 + a_bit_scan_reg_reg gets a flag if src cannot be zero: this simplifies the generated code 2025-02-08 14:27:48 +01:00
Michaël Van Canneyt
5d100fd2c6 cpuNbitalu is not the correct type for fpc_atomic_cmp_xchg_alu on webassembly 2025-01-08 12:06:52 +01:00
Michaël Van Canneyt
3f0593b554 * Better fix for atomic operations on wasm 2025-01-07 14:42:21 +01:00
florian
80750f7591 * second_abs: don't supply a separate 64 bit code path for high level cpu targets 2024-04-07 22:49:18 +02:00
florian
240739e71d * compilation on 64 bit targets fixed 2024-03-29 21:44:23 +01:00
florian
13e7f947ea * all CPUs use now internal abs(<int64>) so overflow checking is possible 
+ added overflow checking to generic abs(<longint>)
 2024-03-29 20:30:57 +01:00
florian
c87213085f * overflow checking for generic abs(<int64>) 
* fix overflow checking on arm for 64 bit signed numbers
  * arm uses generic abs(<int64>)
 2024-03-29 20:06:23 +01:00
florian
8132ccd42b + generic implementation of abs(<int64>) 2024-03-29 15:30:18 +01:00
J. Gareth "Curious Kit" Moreton
81b7b80749 * Added support for 64-bit min/max intrinsics 2024-03-26 14:18:31 +00:00
Sven/Sarah Barth
c59b6a5d8d * High() and Length() for dynamic arrays deal with sizesinttype instead of ossinttype (on AVR the former is 16-bit while the later is 8-bit thus this is an important distinction) 2022-01-18 23:39:31 +01:00
J. Gareth "Curious Kit" Moreton
d5a104f493 Fixed Internal Error 2020120501 number clash 2022-01-07 10:25:00 +00:00
florian
316f2429f0 * do not omit location_force_reg on second operand of sar/ro* if 
it is used to adapt the size of the operand

git-svn-id: trunk@48855 -
 2021-03-01 20:21:42 +00:00
florian
01178532e5 * sar*/ro* do not call location_force_reg if not needed 
git-svn-id: trunk@48844 -
 2021-02-28 22:11:05 +00:00
yury
64c586b86d * Removed/ifdefed lots of unused variables. 
git-svn-id: trunk@48384 -
 2021-01-24 12:24:01 +00:00
florian
6e4997265c + min/max intrinsics for internal use by the compiler 
git-svn-id: trunk@47692 -
 2020-12-05 22:00:58 +00:00
florian
637976e83f * patch by Marģers to unify internal error numbers, resolves #37888 
git-svn-id: trunk@47103 -
 2020-10-13 19:59:01 +00:00
nickysn
0f6ab0de17 * handle LOC_(C)SUBSETREG/REF in second_NegNot_assign 
* changed the way OP_NEG and OP_NOT are handled in op_reg_ref, in order to be
  consistent with op_reg_reg
* introduced op_reg,op_ref,op_subsetreg,op_subsetref and op_loc for the unary
  operations only (OP_NEG,OP_NOT)

git-svn-id: trunk@45302 -
 2020-05-07 02:43:02 +00:00
nickysn
5aaf863d56 * only call cg64.a_XXX_loc for LOC_(C)REFERENCE and LOC_(C)REGISTER locations in 
tcginlinenode.second_AndOrXorShiftRot_assign

git-svn-id: trunk@45301 -
 2020-05-06 21:24:19 +00:00
florian
cfe2d94b25 * fix LLVM after r45177 
git-svn-id: trunk@45198 -
 2020-04-30 19:42:03 +00:00
florian
9e0337f248 * do not use an extra register in tcginlinenode.second_IncDec if not needed 
git-svn-id: trunk@45177 -
 2020-04-29 20:01:53 +00:00
florian
6c71fd461d * avoid internalerror for dec/inc(...,v) with v>high(int64), resolves #35298 
git-svn-id: trunk@44031 -
 2020-01-24 21:39:07 +00:00
florian
70a836c4a2 * first part of merging parts of Jeppe's intrinsics patch, mainly r31135 
is merged by this commit with a lot of adaptions

git-svn-id: trunk@43949 -
 2020-01-14 21:52:39 +00:00
florian
f7a052f884 + inline high(<dyn. array>), resolves #28536 
git-svn-id: trunk@43808 -
 2019-12-28 21:38:38 +00:00
Jonas Maebe
04d295f186 * first step towards supporting 32 bit targets with the LLVM code generator: 
use the generic code in more cases when cpuhighleveltarget is defined

git-svn-id: trunk@41133 -
 2019-01-29 21:39:09 +00:00
Jonas Maebe
122d0d36d6 + volatile() expression that marks an expression as volatile 
* disable matching volatile references in the assembler optimisers, so they
    can't be removed (more conservative than needed, but better than removing
    too many)
   o the CSE optimiser will ignore them by default, because they're an unknown
     inline node for it
  * also removed no longer used fpc_in_move_x and fpc_in_fillchar_x inline node
    identifiers from rtl/inc/innr.inc, and placed fpc_in_unaligned_x at the
    right place

git-svn-id: trunk@40465 -
 2018-12-04 19:53:20 +00:00
Károly Balogh
6629e72d79 m68k: reinstate the inc/dec tempregister type hack again in an isolated way (it was removed in r40385, as it was breaking llvm target) 
git-svn-id: trunk@40453 -
 2018-12-02 18:54:04 +00:00
Jonas Maebe
026d06cffb - reverted r39188, as this hack removes the type correctness of the 
instructions, which breaks the llvm code generator. Put such hacks
    in CPU-specific overrides

git-svn-id: trunk@40385 -
 2018-11-28 19:23:31 +00:00
Károly Balogh
bbbaa39d79 ncginl: another approach to fix the same issue #39184 supposed to address. keep left.resultdef, but try to make the target def always ordinal of an equal size, so it ends up in a data register on m68k 
git-svn-id: trunk@39188 -
 2018-06-07 06:43:02 +00:00
Károly Balogh
3286623c3c ncginl: revert the previous commit, it seems to cause some issues on other CPUs 
git-svn-id: trunk@39186 -
 2018-06-07 06:21:46 +00:00
Károly Balogh
42efddc481 ncginl: in inc/dec, do not use left.resultdef as the dest to force a register location, because if left is a pointer, then an ordinal value might get forced into an address register on m68k, which results in a lot of unnecessary register shuffling to complete the operation 
git-svn-id: trunk@39184 -
 2018-06-07 06:04:19 +00:00
Jonas Maebe
4686f61002 * keep track of the temp position separately from the offset in references, 
so that they can still be freed after the reference has been changed
    (e.g. in case of array indexing or record field accesses) (mantis #33628)

git-svn-id: trunk@38814 -
 2018-04-22 17:03:16 +00:00
florian
4752b0ef96 + tinlinenode calls cpu specific routines for unknown inline numbers 
git-svn-id: trunk@37543 -
 2017-11-01 16:33:32 +00:00
florian
8eec29b139 + enable support for a processor specific frac function 
* implemented inlined frac support for CPUs with SSE4.1+

git-svn-id: trunk@36281 -
 2017-05-21 11:12:59 +00:00
nickysn
efc5e339d0 * use an enum instead of integer constants to represent inline numbers 
* compinnr.inc include file converted to a unit
* inline number field size stored in ppu increased from byte to longint
* inlines in the parse tree (when written with the -vp option) now printed with
  their enum name, instead of number

git-svn-id: trunk@36174 -
 2017-05-10 14:41:43 +00:00
florian
b1dff29cbf * removed unused units 
git-svn-id: trunk@36165 -
 2017-05-09 19:53:14 +00:00
nickysn
d8ec0eff8e + implemented inline code generation for 64-bit sar (the SarInt64 intrinsic) on 
less-than-64-bit CPUs that have a 64-bit OP_SHR/OP_SHL/OP_SAR implementation
  in their cg64 backend code generator. This is enabled only for i386 for now.

git-svn-id: trunk@36022 -
 2017-04-30 16:06:34 +00:00
nickysn
ec11864272 * use a native sized int register for the shift count in in_sar_assign_x_y, 
in_shl_assign_x_y,in_shr_assign_x_y,in_rol_assign_x_y,in_ror_assign_x_y

git-svn-id: trunk@35857 -
 2017-04-20 12:38:54 +00:00
nickysn
599b9e73de * determine correctly whether operand size is 32 or 64 bits for 
sar/shl/shr/rol/ror in tcginlinenode.second_AndOrXorShiftRot_assign

git-svn-id: trunk@35783 -
 2017-04-12 13:36:42 +00:00
nickysn
f514657e45 + implemented the sar/shl/shr/rol/ror inline modify-in-place nodes; the actual 
optimization of "i:=i shl/shr k", etc statements is not performed yet

git-svn-id: trunk@35780 -
 2017-04-12 00:41:15 +00:00
nickysn
c6680a32d7 * also support LOC_CREGISTER and LOC_CREFERENCE in in_not_assign_x and in_neg_assign_x 
git-svn-id: trunk@35751 -
 2017-04-07 21:33:56 +00:00
nickysn
6b43705437 * fixed compiler internal error when the in_not_assign_x/in_neg_assign_x are 
applied to a LOC_REGISTER variable

git-svn-id: trunk@35750 -
 2017-04-07 19:16:00 +00:00
nickysn
256dc546ac + implemented the in_neg_assign_x and in_not_assign_x inline nodes, which will 
be used (TBD in a future commit) for optimizing x:=-x and x:=not x on CPUs
  that support performing these operations directly in memory (such as x86)

git-svn-id: trunk@35749 -
 2017-04-07 16:02:40 +00:00
florian
4504648ec1 * initialize maskvalue to fix compilation with -O3+ 
git-svn-id: trunk@35707 -
 2017-04-01 19:03:35 +00:00
nickysn
f19ebe2acf * fixed compiler internal error in the in_[and/or/xor]_assign_x_y inline nodes 
when their second parameter is a large 64-bit unsigned constant

git-svn-id: trunk@35684 -
 2017-03-29 14:55:07 +00:00
nickysn
fc59649a98 + added inline nodes for handling and/or/xor in place (i.e. x:=x op y, where 
op=and/or/xor). They generate more optimal code on certain architectures
  (including x86). The new inline nodes aren't generated by the compiler yet,
  but will be used in the future, at certain optimization levels, whenever the
  pattern x:=x op y is detected by the compiler.

git-svn-id: trunk@35666 -
 2017-03-26 23:16:53 +00:00
Jonas Maebe
a25ebbba3e + added volatility information to all memory references 
o separate information for reading and writing, because e.g. in a
     try-block, only the writes to local variables and parameters are
     volatile (they have to be committed immediately in case the next
     instruction causes an exception)
   o for now, only references to absolute memory addresses are marked
     as volatile
   o the volatily information is (should be) properly maintained throughout
     all code generators for all archictures with this patch
   o no optimizers or other compiler infrastructure uses the volatility
     information yet
   o this functionality is not (yet) exposed at the language level, it
     is only for internal code generator use right now

git-svn-id: trunk@34996 -
 2016-11-27 18:17:37 +00:00
Károly Balogh
c3e68d6b2d inline: implemented the second pass stub calls for inl_int_real nodes 
git-svn-id: trunk@34992 -
 2016-11-27 17:48:36 +00:00
Jonas Maebe
de465e056b * set the alignment resulting from an aligned() call to the actual natural 
alignment of the resultdef rather than to 0 (required for llvm, and
    cleaner since then the code generator knows the actual alignment)

git-svn-id: trunk@34296 -
 2016-08-13 14:47:26 +00:00