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62 Commits

Author SHA1 Message Date
pierre
7d12e8cc6d Avoid warnings for m68k compiler 
git-svn-id: trunk@43391 -
 2019-11-05 10:00:48 +00:00
Károly Balogh
fd1d227175 m68k: more refactoring for fpu_capabilities instead of hardwired fpu types. 68040 and 68060 fpu types should now work 
git-svn-id: trunk@42929 -
 2019-09-06 07:56:06 +00:00
Jonas Maebe
ce598c15ec * factored out the conditions under which add nodes need to perform 
overflow checks
   o in particular ensure that cpu-specific overrides don't perform overflow
     checks when nf_internal is set

git-svn-id: trunk@42573 -
 2019-08-03 12:19:50 +00:00
Károly Balogh
ddf8788c7a m68k: try to generate better code from some pointermath - when the left is an address register and we do add/sub, also allocate an address register as temp, also only require that left and right sizes are same, when right is not a const 
git-svn-id: trunk@39174 -
 2018-06-05 16:45:02 +00:00
Károly Balogh
fe0bc52dc6 m68k: fixed some cases where comparing smallsets was broken, because the compare size was hardwired to 32bit 
git-svn-id: trunk@36470 -
 2017-06-09 17:27:06 +00:00
Károly Balogh
f7488f2bd8 m68k: don't try to inline NaN and InF values as consts into FPU operands 
git-svn-id: trunk@36351 -
 2017-05-27 20:51:05 +00:00
Károly Balogh
b3157aa5ea m68k: generate MUL helpers for CPUs without 32bit MUL already in pass 1 
git-svn-id: trunk@36348 -
 2017-05-26 18:46:19 +00:00
Károly Balogh
87e8010f05 m68k: support 32x32 to 64bit MUL generation when targeting CPUs which support this instruction 
git-svn-id: trunk@36339 -
 2017-05-25 22:35:12 +00:00
Károly Balogh
63b3304374 m68k: instead of calling a helper, generate inlined code for 64 bit multiplications, when applicable 
git-svn-id: trunk@36336 -
 2017-05-25 20:59:12 +00:00
Károly Balogh
eeb660017e m68k: improve floating point compares against memory references by swapping sides when left is a reference and right is a register 
git-svn-id: trunk@35672 -
 2017-03-28 11:50:39 +00:00
pierre
89c1b68b14 * Delete regvars unit. 
This unit was empty unless OLDREGVARS macro was set,
    but this does not compile and no change has been made since 2011.

  * Remove regvars from all _USES clauses.

git-svn-id: trunk@34808 -
 2016-11-06 14:01:39 +00:00
Károly Balogh
a8ad51e96f m68k: unaligned access support in add nodes 
git-svn-id: trunk@33852 -
 2016-05-29 18:12:36 +00:00
Károly Balogh
766eeffc69 m68k: build fix. (changes before commit is a bad idea...) 
git-svn-id: trunk@33817 -
 2016-05-26 14:47:16 +00:00
Károly Balogh
aa63aa95bb m68k: a bunch of '000 related fixes and cleanups. generated source now compiles for '000 again, which was broken due to recent improvements conflicting with limitations of the original '000 
git-svn-id: trunk@33809 -
 2016-05-26 10:33:29 +00:00
Károly Balogh
a6ee4a2ded m68k: cleaned up second_addordinal and included OP_SUB in the common codepath 
git-svn-id: trunk@33743 -
 2016-05-21 18:43:26 +00:00
Károly Balogh
47621f81cd m68k: implemented second_addordinal; for the most trivial cases. this allows the right node to be a reference. falls back to the generic implementation for nontrivial cases. 
git-svn-id: trunk@33741 -
 2016-05-21 16:46:12 +00:00
Károly Balogh
424f329173 m68k: use inlined realconsts also during normal float calculations on '881/040/060. also optimize them where possible 
git-svn-id: trunk@33671 -
 2016-05-10 18:19:41 +00:00
Károly Balogh
7710300c22 m68k: utilize FTST for comparing against float zero. also utilize FCMP realconst,fpreg on '881 for other realconst values 
git-svn-id: trunk@33668 -
 2016-05-10 15:38:13 +00:00
Károly Balogh
92b2cf917d m68k: when saving/restoring FPU registers, use the right FPU register size on ColdFire to calculate the stored size 
git-svn-id: trunk@33614 -
 2016-05-02 14:18:30 +00:00
Károly Balogh
4287f81b92 m68k: support and use float TResFlags in the rest of the CG. ColdFire FPU now works, and FSxx is no longer generated which is software supported on '060, and doesn't exist on CF. if we still want to support it later, we can add it to cg.g_flags2reg 
git-svn-id: trunk@33558 -
 2016-04-25 23:40:44 +00:00
Károly Balogh
9d2dad2463 m68k: added cpu type cfv4e, which is the only ColdFire with FPU, and GNU AS needs this to actually allow CF FPU code 
git-svn-id: trunk@33556 -
 2016-04-25 22:04:05 +00:00
Károly Balogh
bd564b8933 m68k: some code to support the ColdFire v4e FPU. not functional yet. 
git-svn-id: trunk@33533 -
 2016-04-18 03:25:32 +00:00
Károly Balogh
4e964c2ed7 m68k: rewrote fixref and a_load_ref_ref, fixing a bunch of problems on ColdFire, unifying and simplifying the code a lot, and hopefully not killing anything in the process 
git-svn-id: trunk@33446 -
 2016-04-08 03:27:19 +00:00
Jonas Maebe
0fc1fd6ac1 * replaced current_procinfo.currtrue/falselabel with storing the true/false 
labels of LOC_JUMP in the node's location. This generates some extra jumps
    for short circuit boolean and/or-expressions if optimizations are off, but
    with optimisations enabled the generated code is the same (except for JVM
    because the jump threading optimisation isn't enabled there yet).

git-svn-id: trunk@31431 -
 2015-08-27 18:28:57 +00:00
Károly Balogh
3650991d90 m68k: support LOC_REFERENCE/LOC_CREFERENCE for floating point instructions where possible 
git-svn-id: trunk@29714 -
 2015-02-15 20:15:21 +00:00
Károly Balogh
fdb09365ba m68k: instead of trying to mess with LOC_FLAGS, use LOC_REGISTER to return a boolean result of the compare. idea by Florian. fixes several issues with optimizer enabled and also results in better code in some cases. 
git-svn-id: trunk@29709 -
 2015-02-15 17:15:15 +00:00
Károly Balogh
9693b37c1a m68k: actually,overwrite the resflags with F_E, because only that would be valid after the FSxx/TST combination 
git-svn-id: trunk@29705 -
 2015-02-15 14:04:11 +00:00
Károly Balogh
c062e55aa2 m68k: after a compare on the FPU, move the condition flags back to the CPU. this should make floating point compare actually working 
git-svn-id: trunk@29704 -
 2015-02-15 13:41:40 +00:00
Károly Balogh
d000b1bc7c m68k: basic 68881 fpu support. probably still broken at umpzillion places, and mostly untested, but at least it builds the RTL and all packages successfully with -Cp68020 -Cf68881 instead of dying with random internalerrors() and now even emits actual FPU opcodes. 
git-svn-id: trunk@29370 -
 2015-01-02 05:29:45 +00:00
Károly Balogh
392da9e43f * fix warnings when compiling the compiler with DFA optimizer enabled on m68k 
git-svn-id: trunk@28499 -
 2014-08-20 13:49:47 +00:00
sergei
499ff505c8 * m68k: further improved code generation for comparison nodes, support LOC_REFERENCE for 32-bit compares and omit low dword, when possible, for 64-bit ones. 
git-svn-id: trunk@28297 -
 2014-08-02 12:37:40 +00:00
sergei
2c8264c42b * m68k: partially improved code generation for comparisons. 
git-svn-id: trunk@28283 -
 2014-07-31 18:44:07 +00:00
sergei
bd5ce35130 * m68k: completely replaced 64-bit comparison code with a clone of i386 implementation. No optimizations yet, but it already makes system unit about 300 instructions shorter due to changing node location to LOC_JUMP. 
* Cleaned up 32-bit comparison code and implemented one of the optimizations (TST instruction for comparison with constant zero which can act directly on references). This makes system unit shorter by about 1000 instructions.

git-svn-id: trunk@28260 -
 2014-07-24 19:44:41 +00:00
sergei
15e374f3c6 * m68k: fixed comparison of small sets, it should not modify sides. tw18013 is now correct when compiled with -O2. 
git-svn-id: trunk@28100 -
 2014-06-29 12:35:03 +00:00
sergei
c2ab16c320 - m68k: dropped t68kaddnode.second_cmpboolean, apparently its presence just breaks tbs/tb0246 without any value added. 
git-svn-id: trunk@28090 -
 2014-06-27 16:34:14 +00:00
sergei
193fa2b95e - m68k: removed some definitely misplaced code, comparison nodes are never handled in second_addfloat. 
git-svn-id: trunk@28087 -
 2014-06-27 13:23:12 +00:00
Károly Balogh
2936335f68 removed silly ancient writeln debug from me... 
git-svn-id: trunk@27821 -
 2014-05-28 18:36:58 +00:00
Károly Balogh
a82a3ec38e let the assembler decide about the size of the Bcc and BRA instructions, this makes code generated here work on a 68000 (and probably a lot smaller in size, no more forced 32bit displacements) 
git-svn-id: trunk@27084 -
 2014-03-10 18:50:05 +00:00
Jonas Maebe
4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 
ncgutil/thlcg2ll.location_force_fpureg()

git-svn-id: trunk@27071 -
 2014-03-10 09:01:05 +00:00
Károly Balogh
2791e8ad15 use optimized cg loading functions in 64bit compares instead of hardcoded move.ls (move.l #X,dn is 48bit long, clr.l/moveq.l is 16bit long) 
git-svn-id: trunk@26570 -
 2014-01-23 03:03:44 +00:00
svenbarth
8e60465eb4 Fix the last failing tcnvint test (plus another one) by using comparisons that are not necessarily 32-bit. 
m68k/n68kadd.pas, tn68kadd.second_cmpordinal:
  * use the size of the largest operand to select a fiting operand
  * ToDo: check whether a sign/zero extend of the value is necessary

git-svn-id: trunk@25628 -
 2013-10-03 11:59:25 +00:00
svenbarth
4d1fb1573e m68k: Fix handling of small sets (based on how ARM does it) 
Fixes 12 tests

git-svn-id: trunk@25589 -
 2013-09-28 08:17:13 +00:00
svenbarth
6f5a648516 Improve the cpu type handling for M68k just in case we should branch 2.8.0 before I can start working on M68k again. 
Therefor the cpu type (-Cp...) "coldfire" was split up into "isaa", "isaa+", "isab" and "isac". The Linux RTL can currently compiled for "68020", "isab" and "isac". For the other three Bcc.L must be handled differently (only Bcc.B/W supported) and for "68000" also EXT.L needs to be handled differently.

fpcdefs.inc:
  + define CPUCAPABILITIES if capabilities can be set for a certain CPU type (currently ARM, AVR and M68k)
options.pas:
  * check for CPUCAPABILITIES instead of specific CPUs
assemble.pas:
  - the handling of the CPU type is already done in m68k/ag68kgas.pas, Tm68kGNUAssembler.MakeCmdLine (and thereby already using the gascputypestr array!)
m68k/cpuinfo.pas:
  - tcputype: remove "cpu_coldfire"
  + tcputype: add "cpu_isa_a", "cpu_isa_a_p", "cpu_isa_b" and "cpu_isa_c"
  + add "cpu_coldfire" constant which contains all Coldfire specific cpu types
  * adjust "cputypestr" and  "gascputypestr"
  + add tcpuflags and cpu_capabilities (DBRA restriction was checked with CPUCOLDFIRE, CAS/TAS will be needed for atomic operations and BRAL restriction was discovered during testing of new cpu types)
m68k/cgcpu.pas:
  * adjust checks for "cpu_coldfire"
m68k/n68kadd.pas:
  * don't use a BRA.L if it is not supported, but (at least for now) a BRA.W
aggas.pas:
  * adjusted check for Coldfire

git-svn-id: trunk@25457 -
 2013-09-11 17:07:32 +00:00
Jonas Maebe
2dd75e707e * renamed thlcgobj.tcgsize2orddef to defutil.cgsize_orddef 
git-svn-id: trunk@24743 -
 2013-06-01 18:28:15 +00:00
svenbarth
78f0d6f70e Revert the changes from r23383 for m68k/n68kadd.pas. Memo to self: Don't change code if you don't really understand why it does things the way it does. 
With this change and the change from r23465 we are down from ~950 to ~650 failures :D

git-svn-id: trunk@23466 -
 2013-01-20 18:00:51 +00:00
svenbarth
ccecf2c13c Fix comparisons (aka usage of flag/CCR register) 
m68k/aasmcpu.pas, taicpu.spilling_get_operation_type:
  * add all Sxx instructions as "operand_write" instructions

m68k/n68kadd.pas, t68kaddnode.getresflags:
  * use the correct operation in case of swapped nodes

m68k/cgcpu.pas, tcg68k.g_flags2reg:
  - don't move a 0 to the register, because this will CLR it and thus the flags won't be valid anymore...
  - NEG would have been the wrong operation (NOT would have been correct), but it isn't needed anyway...
  * simplify the method by handling the address register case only when necessary

git-svn-id: trunk@23383 -
 2013-01-14 20:31:15 +00:00
svenbarth
9d4d7d748c m68k/n68kadd.pas: 
+ add support for 64-bit comparisons; the code is based on the code of mips/ncpuadd.pas, but heavily adjusted for m68k

git-svn-id: trunk@22913 -
 2012-11-01 21:27:02 +00:00
svenbarth
f0aad6dbc4 * m68k/n68kadd.pas, t68kaddnode.second_cmpordinal: 
for "CMP" it is important to note that the first operand (which can be basically a register, a constant or a reference) is substracted from the second operand (which needs to be a data register) and not the other way round

git-svn-id: trunk@22798 -
 2012-10-21 13:59:05 +00:00
svenbarth
5bb0e5992b * m68k/n68kadd.pas, t68kaddnode.second_cmpboolean: 
don't use "location.loc" if second_pass was not called on the node yet, but "expectloc"
* added test

git-svn-id: trunk@22789 -
 2012-10-20 20:32:46 +00:00
svenbarth
f746d9603a * m68k/n68kadd.pas, t68kaddnode.second_cmpsmallset: 
respect more location combinations than just LOC_CONSTANT and LOC_REGISTER
* added test

git-svn-id: trunk@22786 -
 2012-10-20 19:39:29 +00:00