Commit Graph

288 Commits

Author SHA1 Message Date
sergei
fffa4a35a0 * x86_64: Don't waste time initializing/finalizing saved_standard_registers and saved_mm_registers arrays on every procedure. Initialize once, reinitialize if target system happens to change, and let finalization happen implicitly on shutdown.
git-svn-id: trunk@19672 -
2011-11-23 20:06:38 +00:00
sergei
6a3fe72de9 + Support .rva directive in AT&T reader. Put it into base class because it generally applies to all targets with COFF output, but enabled for Windows targets only (others need additional testing).
+ Support .seh_handlerdata directive in Win64.

git-svn-id: trunk@19546 -
2011-10-25 15:18:47 +00:00
sergei
e11c880b1e x86 assembler improvements:
* Don't generate rex.w for "CALL|JMP|LCALL|LJMP regmem", they are 64-bit by default.
* LCALL,LJMP flagged as calljump instructions.
* LCALL,LJMP encode only far jumps and don't accept register operands.
* GAS writer: fixed writing rip-relative operands of calljump instructions.
+ test.

git-svn-id: trunk@19413 -
2011-10-08 11:34:04 +00:00
sergei
a463fbc578 * Reset unwind_info.flags between procedures. Writing non-zero flags without handler ends up in corrupt unwind info.
git-svn-id: trunk@19403 -
2011-10-07 14:46:56 +00:00
sergei
85f7914906 * Don't generate .seh_endprologue if SEH directives are present in the text of (pure assembler) procedure, as it results in duplicate .seh_endprologue.
* Added checks for .seh_endprologue presence and correct position.

git-svn-id: trunk@19388 -
2011-10-06 03:29:35 +00:00
sergei
0db44ae108 + Support SEH directives in x86_64 AT&T asmreader.
git-svn-id: trunk@19366 -
2011-10-04 12:26:41 +00:00
sergei
9eb451756b + Support .seh_handler directive
git-svn-id: trunk@19365 -
2011-10-04 12:19:24 +00:00
sergei
4c21beb48e win64 unwinding, misc fixes:
* Insert seh_endprologue directive after the last prologue instruction, not before it
* Omit seh_stackalloc for zero bytes
* (For now) ignore SEH directives in NASM and MASM writers, instead of failing with internal error.

git-svn-id: trunk@19246 -
2011-09-26 13:55:21 +00:00
sergei
d94460e3b3 * Made the x86-specific scalefactor optimization of tvecnode available on x86_64 as well, by moving update_reference_reg_mul method from ti386vecnode to newly introduced tx86vecnode.
git-svn-id: trunk@19245 -
2011-09-26 12:58:59 +00:00
sergei
b997094755 + Generate unwind bytecode for function prologues on win64.
* For now placed actual processing of unwind info under {$ifdef TEST_WIN64_UNWIND}, because in the current state it doesn't add much value.

git-svn-id: trunk@19200 -
2011-09-23 21:22:25 +00:00
sergei
1365467b0d + Support classes for creating unwind bytecode for Win64.
git-svn-id: trunk@19071 -
2011-09-15 15:35:08 +00:00
florian
e8dafe4dde * fixed change information for a lot of sse instructions
git-svn-id: trunk@18787 -
2011-08-20 12:28:49 +00:00
florian
c011949765 + iretq for x86_64
git-svn-id: trunk@18273 -
2011-08-19 12:56:26 +00:00
florian
8308b46a94 + support for assembler instructions with four operands
+ support for insertq, resolves #19910

git-svn-id: trunk@18206 -
2011-08-14 16:46:35 +00:00
florian
ff5f311b34 - removed no more used constants
git-svn-id: trunk@18199 -
2011-08-13 20:54:01 +00:00
sergei
0231863fce + Added missing PMULLD instruction, part of Mantis #19910
git-svn-id: trunk@18106 -
2011-08-06 06:59:33 +00:00
sergei
7d99f95c45 * Always create a section before emitting data to current_asmdata.asmlists[al_typedconsts]. Without it, such data ends up in sections created elsewhere, creating very non-obvious dependencies on other parts of compiler.
git-svn-id: trunk@17816 -
2011-06-24 02:05:56 +00:00
sergei
d4b2998e07 * Another attempt to fix x86_64 stack frame calculation, tested better this time.
git-svn-id: trunk@17709 -
2011-06-10 03:41:33 +00:00
sergei
c40b8d92c7 * Revert r17695 because it breaks cycling.
git-svn-id: trunk@17698 -
2011-06-08 19:19:24 +00:00
sergei
318a55b96c * x86_64-win64: fixed stack calculations so that 32-byte spilling area is only included once and only for non-leaf procedures (it was included twice with -O- and 3 times with -O2, wasting large amounts of stack memory).
git-svn-id: trunk@17695 -
2011-06-08 14:46:22 +00:00
sergei
354d0520b7 + x86 assembler: fixed MOVABS instruction (it is a x86_64-only subset of MOV with 8-byte immediates/offsets) and same-form encodings of MOV instruction.
git-svn-id: trunk@17666 -
2011-06-05 17:32:18 +00:00
sergei
9608c4eabe * Interface wrappers must be global when linking smart, Mantis #19462. Other targets already have this condition in place.
git-svn-id: trunk@17631 -
2011-06-02 10:49:28 +00:00
joost
45bc3fcae0 * Enabled safecall on x86_64-linux
git-svn-id: trunk@17629 -
2011-06-02 10:43:18 +00:00
sergei
d89aeeadaf x86 assembler:
* Adjust rip-relative offsets using values known from calcsize, instead of reinterpreting the tail of instruction. This is simpler and remains the same regardless of particular codes used in opcode table.
* Reduced maxinfolen to 8.
- 'jmp imm64' and 64-bit versions of 'in' do not exist, removed.

git-svn-id: trunk@17546 -
2011-05-23 20:43:50 +00:00
sergei
504e0c6816 x86 assembler fixes:
* mkx86ins.pp: 'regmem' operand type in x86ins.dat must be converted to OT_RM_GPR, not OT_REGMEM. The latter does not restrict register type, allowing to use e.g. xmm registers in place of regular ones. 
* Finished 'movd' and 'movq', added some tests for them to tasm2.pp.

git-svn-id: trunk@17515 -
2011-05-20 20:39:35 +00:00
sergei
08e895cf7c * Fixed handling of 'movq' instruction by assembler reader, resolves #18205.
git-svn-id: trunk@17497 -
2011-05-19 06:44:24 +00:00
sergei
1aa5c4ac0e * Fixed wrong ModRM byte in movq encoding, causing regression of test/cg/tcalext6 in r17490.
git-svn-id: trunk@17493 -
2011-05-18 14:55:26 +00:00
sergei
9e8a31193b x86 assembler:
* Optimized the opcode representation of movq and remaining 3DNow instructions
* Disallow immediates not fitting in 32 bits (Mantis #14685) + test
* Disallow push/pop with 32-bit operands in x86_64 + test

git-svn-id: trunk@17490 -
2011-05-17 20:06:12 +00:00
sergei
c28197bac3 * PSADBW second operand is xmmrm, not xmmreg
+ A couple of tests related to the recent assembler changes

git-svn-id: trunk@17460 -
2011-05-14 18:59:06 +00:00
sergei
958954890e A big update of x86 instruction table, part 2:
- Removed remaining address-size control codes \300 and \301
- Also removed codes \323, they are no longer necessary once REX is being written on the first literal.

git-svn-id: trunk@17457 -
2011-05-14 16:36:42 +00:00
sergei
3b979fef6d * Re-commit r17437 after more testing and fixing aasmcpu.pp in r17449.
git-svn-id: trunk@17452 -
2011-05-14 11:04:52 +00:00
sergei
b257231203 * Revert r17437, it breaks builds with -O2 and builds on i386 (although -O- on x86_64 is ok).
git-svn-id: trunk@17439 -
2011-05-12 23:53:18 +00:00
sergei
1d81a1244b A big update of x86 instruction table, part 1 (mostly SIMD instructions):
* Using ot_mmxrm and ot_xmmrm operand types to match arguments, reduces number of required entries by half.
* Replaced all literal $66, $F2 and $F3 prefixes with control codes (\361, \334 and \333, respectively).
* Prefix control codes imply writing REX, so code \323 after them is no longer necessary, removed.
* Fixed technology flags (SSSE3, SSE4.1, SSE4.2)
- Removed codes \300 and \301 (intended to generate address size prefix). FPC does not support this feature (the prefix itself is generated, but process_ea rejects operands needing non-default address size). Probably we don't even need to support it. But if we do, a much simpler solution is check all operands, like today's NASM does.
* Fixed/added some instructions along the way, namely CRC32, UNPCKHPD, CMPNEQSD.

git-svn-id: trunk@17437 -
2011-05-12 19:49:19 +00:00
sergei
de8ae0f873 x86 assembler improvements:
* Simplified REX handling: instead of useless adjusting instruction length on every REX change, adjust it just once, based on the final REX value.
* Similar for omitting REX.W in certain instructions: set a flag and consider it once the entire instruction has been processed. This removes the requirement for \335 to be the last opcode.
* maybewriterex also after $F2 prefix
* Fixed behavior of codes \310 and \311 (16- and 32-bit address respectively), this is needed for a few fancy instructions like LOOP and JCXZ, which honor address-size prefix instead of REX.
+ control code \361 for $66 prefix
+ IF_SSSE3, IF_SSE41, IF_SSE42 instruction flags (with dummy values)

x86/x86ins.dat:
* replaced literal $67 prefixes with \310 or \311
* marked encodings containing code \310 as NOX86_64
* replaced literal $48 prefixes with \326

git-svn-id: trunk@17433 -
2011-05-12 13:09:51 +00:00
sergei
6739cec2b9 * Flagged with NOX86_64 instructions/encodings that are invalid in 64-bit mode.
* AESKEYGENASSIST is not ATT-specific name, it is used by Intel-style assemblers as well. Also updated tests/test/taes1.pp to reflect the change.
+ Added SCASQ, resolves #16730 (other opcodes mentioned in that report were added/fixed earlier)

git-svn-id: trunk@17431 -
2011-05-11 15:50:59 +00:00
sergei
9bb0dc6cfe * mkx86ins.pp: ot_signed flag must not be set by literal opcodes. Ignore 2- and 3-byte literal sequences, not just 1-byte ones.
* x86ins.dat: replaced codes \17 with literal zeros. They aren't necessary for FPC, and they were removed from NASM quite a while ago.

git-svn-id: trunk@17430 -
2011-05-11 12:31:18 +00:00
Jonas Maebe
a08989a76b * zero/sign extend parameter values and return values < 32 bit to 32 bit on
x86_64 (mantis #19269)
  * this is also required for darwin/i386 and was already done there for
    parameters, but not yet for return values

git-svn-id: trunk@17388 -
2011-05-01 11:33:29 +00:00
pierre
af32b57170 * increase op2strtable size to string[15] and rectify askeygen to askeygenassist for ATT
git-svn-id: trunk@17358 -
2011-04-21 13:38:20 +00:00
sergei
f97f223de6 x86_64 assembler reader improvements:
+ Added new value TAttSuffix.attsufINTdual, assigned it to movsX and movzX instructions
* Moved suffix-to-size translation tables from rax86att.pas to itcpugas.pas
+ Added x86_64 specific suffix-to-size translation, enabling BQ and WQ suffixes (LQ seems unnecessary at the moment)
* Fixed logic of tx86attreader.is_asmopcode so it only assigns dual suffix to instructions that explicitly allow it. This disambiguates cases like movsbq=movs+bq vs. cmovbq=cmovb+q
* As a net result: movz[bw]q and movs[bw]q now compile for x86_64; cmovbw and cmovbl which were incorrectly handled for i386 are now fixed.
+ Test for correct assembling of cmov.

git-svn-id: trunk@17353 -
2011-04-20 11:18:13 +00:00
svenbarth
35b47e491c Rebase to revision 17306
git-svn-id: branches/svenbarth/classhelpers@17314 -
2011-04-13 10:04:14 +00:00
sergei
c939beee70 * Changed register allocation order for x86_64, putting first registers that don't need to be preserved by procedure. This way registers needing preservation are allocated less frequently (and for non-complex leaf functions not allocated at all), reducing amount of entry/exit code.
git-svn-id: trunk@17284 -
2011-04-10 18:04:17 +00:00
florian
9279c6955e * support for SSSE3, SSE4,1, SSE4.2, AES instructions set by Emelyanov Roman, resolves #18527
+ test for aes support

git-svn-id: trunk@17256 -
2011-04-05 20:22:57 +00:00
svenbarth
96116a6c3a Several adjustments because virtual methods in helpers are just normal methods and a VMT isn't generated for them either.
* $CPU/cgcpu.pas: disable the generation of VMT loading code
* dbgstabs.pas, dbgdwarf.pas: treat virtual methods of helpers as normal methods
* ncgcal.pas: don't register virtual helper methods for WPO 
* ncgrtti.pas: write virtual helper methods as normal methods to RTTI
* nobj.pas: correctly handle final and override cases in helpers
* pdecvar.pas: property getters
* rautils.pas: no VMT offset in records

git-svn-id: branches/svenbarth/classhelpers@17150 -
2011-03-20 10:41:45 +00:00
florian
af020e8ebc * fix assembling of ljmp mem, resolves #18556
git-svn-id: trunk@16802 -
2011-01-23 12:18:14 +00:00
Jonas Maebe
067536f8da * pass large "const" record parameters by reference for non-cdecl/cppdecl
(mantis #17442)

git-svn-id: trunk@16620 -
2010-12-23 16:11:06 +00:00
paul
b317139006 compiler: fix compilation problems caused by tprocdef._class -> tprocdef.struct rename which was found by make fullcycle
git-svn-id: branches/paul/extended_records@16530 -
2010-12-10 06:50:58 +00:00
Jonas Maebe
f8369032da * same fixes as in r16255 for x86_64 (fixes webtbs/tw17714 on Darwin/x86_64)
git-svn-id: trunk@16508 -
2010-12-05 16:45:31 +00:00
Jonas Maebe
d1264eeb3a * fixed optimized division of signed values by constant power of 2 if the
constant is > high(longint), because then it must be loaded into a register
    first since such values cannot be encoded directly in non-mov x86-64
    instructions (mantis #17836)

git-svn-id: trunk@16305 -
2010-11-05 15:32:07 +00:00
florian
d6d3791939 * fix compilation of cmpxchg16b
git-svn-id: trunk@16283 -
2010-11-01 08:13:27 +00:00
joost
07bf44517c * Merged XPCom branch into trunk, added support for constref and changed
the IInterface implementation to be XPCom-compatible
--- Merging r15997 through r16179 into '.':
U    rtl/inc/variants.pp
U    rtl/inc/objpash.inc
U    rtl/inc/objpas.inc
U    rtl/objpas/classes/persist.inc
U    rtl/objpas/classes/compon.inc
U    rtl/objpas/classes/classesh.inc
A    tests/test/tconstref1.pp
A    tests/test/tconstref2.pp
A    tests/test/tconstref3.pp
U    tests/test/tinterface4.pp
A    tests/test/tconstref4.pp
U    tests/webtbs/tw10897.pp
U    tests/webtbs/tw4086.pp
U    tests/webtbs/tw15363.pp
U    tests/webtbs/tw2177.pp
U    tests/webtbs/tw16592.pp
U    tests/tbs/tb0546.pp
U    compiler/sparc/cpupara.pas
U    compiler/i386/cpupara.pas
U    compiler/pdecsub.pas
U    compiler/symdef.pas
U    compiler/powerpc/cpupara.pas
U    compiler/avr/cpupara.pas
U    compiler/browcol.pas
U    compiler/defcmp.pas
U    compiler/powerpc64/cpupara.pas
U    compiler/ncgrtti.pas
U    compiler/x86_64/cpupara.pas
U    compiler/opttail.pas
U    compiler/htypechk.pas
U    compiler/tokens.pas
U    compiler/objcutil.pas
U    compiler/ncal.pas
U    compiler/symtable.pas
U    compiler/symsym.pas
U    compiler/m68k/cpupara.pas
U    compiler/regvars.pas
U    compiler/arm/cpupara.pas
U    compiler/symconst.pas
U    compiler/mips/cpupara.pas
U    compiler/paramgr.pas
U    compiler/psub.pas
U    compiler/pdecvar.pas
U    compiler/dbgstabs.pas
U    compiler/options.pas
U    packages/fcl-fpcunit/src/testutils.pp

git-svn-id: trunk@16180 -
2010-10-17 20:58:22 +00:00