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9303a8f61a
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133 Commits

Author SHA1 Message Date
nickysn
9303a8f61a * changed the x86 TInsProp.Ch structure from a 3-element array to a pascal set; 
this removes the limit of 3 Ch_XXX flags per instruction (thus allowing adding
  more precise flags, e.g. for tracking only certain bits of the flags register,
  etc.) and avoids the ugliness of having the Ch_None filler, which makes
  x86ins.dat less readable.

git-svn-id: trunk@35850 -
 2017-04-19 16:48:35 +00:00
nickysn
189e49998c * fixes to the x86 instruction flags tracking attributes: 
* AAA and AAS also read flags (AF)
  * CMC reads and writes flags (it inverts CF)
  * CMPSx and SCASx write flags
  * CMPSx, SCASx, LODSx, STOSx, MOVSx read the direction flag
  * NOT doesn't affect flags
  * REP isn't affected by and doesn't affect flags
  * REPE/REPNE/REPZ/REPNZ/REPC/REPNC don't write flags, only read them
  * ROL and ROR don't read flags
  * SAL doesn't read flags
  * SHLD and SHRD don't read flags

git-svn-id: trunk@35849 -
 2017-04-19 15:42:50 +00:00
florian
48fbd569fd * support for the CDQE instruction, by Emelyanov Roman, resolves #30978 
git-svn-id: trunk@34982 -
 2016-11-27 12:42:22 +00:00
sergei
133fcb5ab2 * Fixed VMOVQ instruction encoding, now assembles correctly also in 32-bit code. 
+ Test

git-svn-id: trunk@34949 -
 2016-11-21 13:59:44 +00:00
sergei
ebe134febc * Fixed memory reference size for MOVSS instruction, Mantis #29954. 
git-svn-id: trunk@34943 -
 2016-11-21 03:31:25 +00:00
sergei
870fda34d5 * x86 AT&T reader and writer: cleaned up usage of attsufMM suffix: 
* It is now only used to select size of vector instructions (i.e. 128 or 256 bits)
  * Scalar instructions reverted to use attsufINT suffix (selecting between 32 or 64 bits).
  * Additionally, vcvtsi2sd and vcvtsi2ss with rm64 operand are x86_64 only.

git-svn-id: trunk@34942 -
 2016-11-21 02:07:13 +00:00
sergei
edf943a4f6 * Changed memory operand size for VMOVSS instruction to 32 bits, Mantis #29957. 
git-svn-id: trunk@34918 -
 2016-11-18 23:37:01 +00:00
florian
56252d59f0 + support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933 
git-svn-id: trunk@34917 -
 2016-11-18 20:19:39 +00:00
florian
a7516dfb50 * fix modification information of VCOMISS and VCOMISD 
git-svn-id: trunk@33874 -
 2016-06-01 19:58:43 +00:00
florian
0c13f3ce3e * fix modification information for vand* 
git-svn-id: trunk@33593 -
 2016-05-01 12:00:25 +00:00
florian
406e3c4ac1 + support xgetbv instruction, resolves issue #29958 
git-svn-id: trunk@33418 -
 2016-04-03 20:53:10 +00:00
florian
8d5cc3dfa4 * (extended and modified) patch by Emelyanov Roman to add suport of RDRAND, RDSEED and TSX instructions set, resolves issue #29893. 
In comparison with the original patch, support for a i386 has been added as well as a test program. 
  Further, a small issue with xbegin has been fixed

git-svn-id: trunk@33375 -
 2016-03-28 19:08:13 +00:00
nickysn
cf3230b100 - removed IF_CENTAUR and replaced it with IF_CYRIX. Rationale: only 3 Centaur - 
specific instructions were marked as CENTAUR, all the others were marked
  CYRIX, so it wasn't an accurate flag at all

git-svn-id: trunk@33326 -
 2016-03-25 17:01:11 +00:00
nickysn
9a2f5e01d7 + added range checking for the immediate operand of NEC V20/V30's instructions CLR1, SET1, NOT1 and TEST1 
git-svn-id: trunk@33322 -
 2016-03-24 16:05:11 +00:00
nickysn
0be6d062ac + added range checking for the imm4 operand of NEC V20/V30's instructions 
'EXT reg8,imm4' and 'INS reg8,imm4'

git-svn-id: trunk@33321 -
 2016-03-24 15:45:23 +00:00
sergei
0f301b4c57 * Fixed spilling info for vcvt* instructions, part of Mantis #29783. 
git-svn-id: trunk@33208 -
 2016-03-09 16:36:30 +00:00
nickysn
80b3e3020a * the SEGFS and SEGGS prefixes are 386+ 
git-svn-id: trunk@32925 -
 2016-01-11 15:51:40 +00:00
nickysn
741a3eedf9 * fixed the cpu level of several 186+ instructions, that were mistakenly marked as either 286+ or 8086+ 
git-svn-id: trunk@32921 -
 2016-01-11 13:22:08 +00:00
nickysn
6037976202 * several imul variants, featuring 32-bit or 64-bit registers marked 386+, instead of 286+ 
git-svn-id: trunk@32889 -
 2016-01-08 17:07:36 +00:00
nickysn
e877bae4fc + add 'jmp rm16' and 'call rm16' before the rm32 versions on i8086, so the 
16-bit version is picked up by default for opsize=S_NO. Previously the 386
  version was picked on i8086, but the generated code was correct, because we
  don't yet generate a 0x66 prefix for "\325", which leads to many 32-bit
  instructions not being assembled correctly with the internal asm obj writer on
  the i8086

git-svn-id: trunk@32887 -
 2016-01-08 16:41:21 +00:00
nickysn
66bad5a1cf * pushf and popf are 8086 level instructions, not 186+ 
git-svn-id: trunk@32677 -
 2015-12-17 15:23:21 +00:00
florian
a3964d9ee0 + support for RDTSCP, resolves issue #28916 
git-svn-id: trunk@32652 -
 2015-12-13 13:28:51 +00:00
sergei
a78250a78b * x87 FBSTP and FBLD instructions cannot have size suffix in ATT syntax. Mantis #29095. 
git-svn-id: trunk@32541 -
 2015-11-27 03:59:06 +00:00
nickysn
2cf6852910 + added i8086 instruction entries for Jcc near (which is actually a 386+ 
instruction), that encode it as two i8086 compatible instructions:
    JNcc short +3
    JMP near target

git-svn-id: trunk@30612 -
 2015-04-16 17:07:07 +00:00
florian
99635658ec * corrects change flags for VSQRTSD 
git-svn-id: trunk@30037 -
 2015-02-28 22:42:25 +00:00
florian
d6e4af8279 + applied remaining patches of Torsten Grundke: adds gather instructions of avx2 
git-svn-id: trunk@29745 -
 2015-02-17 21:43:46 +00:00
florian
842e027a9f + prove of concept how FMA4 could be supported in inline assembler 
git-svn-id: trunk@27214 -
 2014-03-20 21:25:38 +00:00
florian
a79be2b05c + support for FMA instructions in inline assembler 
+ extended avx test code with FMA

git-svn-id: trunk@27209 -
 2014-03-20 20:06:56 +00:00
florian
aa107b914c * merged avx2 branch, developed by Torsten Grundke 
git-svn-id: trunk@27200 -
 2014-03-20 12:03:52 +00:00
florian
13cb468a8e * fixed modification information for some avx instructions 
git-svn-id: trunk@26840 -
 2014-02-22 15:52:33 +00:00
florian
be0a29da95 * fix modification information for bmi instructions 
git-svn-id: trunk@26738 -
 2014-02-08 21:38:21 +00:00
Jonas Maebe
a1eb9a0f99 * fixed spilling of CMOVcc instruction: it "reads" operand two (in the sense 
that the value of operand two is used/kept in case the condition is false)
    (fixes mantis #25672)

git-svn-id: trunk@26674 -
 2014-02-05 00:27:21 +00:00
florian
8989a40b4f * more flags to mark changes fixed 
git-svn-id: trunk@26626 -
 2014-01-30 17:34:28 +00:00
florian
2ec5a649d7 * set Ch_* for more operations 
* Ch_* flags for VMOVSD and VMOVSS are now set for the 2 operand variants

git-svn-id: trunk@26586 -
 2014-01-26 12:37:50 +00:00
florian
7028210817 + tzcnt assembler instruction 
git-svn-id: trunk@26506 -
 2014-01-18 12:11:50 +00:00
florian
f132a804d6 + handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics 
git-svn-id: trunk@25909 -
 2013-11-01 19:01:39 +00:00
nickysn
0f69362edd - rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction, 
using it in inline asm causes an internal error and removing it didn't show
  any regressions after running the testsuite on i386-linux.

git-svn-id: trunk@25827 -
 2013-10-18 23:26:58 +00:00
nickysn
4aa010eedc + support LEA with 16-bit operand size 
git-svn-id: trunk@25808 -
 2013-10-17 16:11:08 +00:00
nickysn
f6e846c574 + added the NEC V20/V30 instructions 
git-svn-id: trunk@25750 -
 2013-10-11 21:27:56 +00:00
florian
9b6094a58c + added a few BMI instructions to see if they can be encoded 
git-svn-id: trunk@24907 -
 2013-06-16 09:35:21 +00:00
florian
e81d2d1f3b * basic avx support for floating point operations (use -Cfavx to activate) 
git-svn-id: trunk@24896 -
 2013-06-14 20:03:01 +00:00
florian
283ff05127 * merged avx support in inline assembler developed by Torsten Grundke 
git-svn-id: trunk@22568 -
 2012-10-06 19:47:18 +00:00
florian
fc569e224d * handle all operand combinations of xadd, resolves #21146 
git-svn-id: trunk@20177 -
 2012-01-25 21:26:59 +00:00
sergei
e11c880b1e x86 assembler improvements: 
* Don't generate rex.w for "CALL|JMP|LCALL|LJMP regmem", they are 64-bit by default.
* LCALL,LJMP flagged as calljump instructions.
* LCALL,LJMP encode only far jumps and don't accept register operands.
* GAS writer: fixed writing rip-relative operands of calljump instructions.
+ test.

git-svn-id: trunk@19413 -
 2011-10-08 11:34:04 +00:00
florian
e8dafe4dde * fixed change information for a lot of sse instructions 
git-svn-id: trunk@18787 -
 2011-08-20 12:28:49 +00:00
florian
c011949765 + iretq for x86_64 
git-svn-id: trunk@18273 -
 2011-08-19 12:56:26 +00:00
florian
8308b46a94 + support for assembler instructions with four operands 
+ support for insertq, resolves #19910

git-svn-id: trunk@18206 -
 2011-08-14 16:46:35 +00:00
sergei
0231863fce + Added missing PMULLD instruction, part of Mantis #19910 
git-svn-id: trunk@18106 -
 2011-08-06 06:59:33 +00:00
sergei
354d0520b7 + x86 assembler: fixed MOVABS instruction (it is a x86_64-only subset of MOV with 8-byte immediates/offsets) and same-form encodings of MOV instruction. 
git-svn-id: trunk@17666 -
 2011-06-05 17:32:18 +00:00
sergei
d89aeeadaf x86 assembler: 
* Adjust rip-relative offsets using values known from calcsize, instead of reinterpreting the tail of instruction. This is simpler and remains the same regardless of particular codes used in opcode table.
* Reduced maxinfolen to 8.
- 'jmp imm64' and 64-bit versions of 'in' do not exist, removed.

git-svn-id: trunk@17546 -
 2011-05-23 20:43:50 +00:00