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r39725 | pierre | 2018-09-10 13:28:33 +0000 (Mon, 10 Sep 2018) | 1 line
Add branches for 3.2.0, 3.2.1 and 3.3.1 versions
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--- Merging r39725 into '.':
U tests/utils/testsuite/utests.pp
--- Recording mergeinfo for merge of r39725 into '.':
U .
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r39733 | pierre | 2018-09-11 08:16:56 +0000 (Tue, 11 Sep 2018) | 1 line
sparc64-linux objects recompiled with GCC 7.3.0
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--- Merging r39733 into '.':
U tests/test/cg/obj/readme.txt
U tests/test/cg/obj/linux/sparc64/ctest.o
U tests/test/cg/obj/linux/sparc64/cpptcl1.o
U tests/test/cg/obj/linux/sparc64/cpptcl2.o
U tests/test/cg/obj/linux/sparc64/tcext3.o
U tests/test/cg/obj/linux/sparc64/tcext4.o
U tests/test/cg/obj/linux/sparc64/tcext5.o
U tests/test/cg/obj/linux/sparc64/tcext6.o
--- Recording mergeinfo for merge of r39733 into '.':
G .
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r39808 | pierre | 2018-09-26 09:29:33 +0000 (Wed, 26 Sep 2018) | 1 line
Disable libraries not compiling for jvm-java or jvm-android targets
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--- Merging r39808 into '.':
U packages/fppkg/fpmake.pp
U packages/fcl-base/fpmake.pp
U packages/rtl-extra/fpmake.pp
U packages/hermes/fpmake.pp
U packages/fcl-extra/fpmake.pp
U packages/fcl-db/fpmake.pp
U packages/unzip/fpmake.pp
U packages/odbc/fpmake.pp
U packages/gdbm/fpmake.pp
U packages/pthreads/fpmake.pp
U packages/fcl-json/fpmake.pp
U packages/pcap/fpmake.pp
U packages/numlib/fpmake.pp
U packages/rtl-generics/fpmake.pp
U packages/zlib/fpmake.pp
U packages/paszlib/fpmake.pp
U packages/webidl/fpmake.pp
U packages/regexpr/fpmake.pp
U packages/libgd/fpmake.pp
U packages/fcl-net/fpmake.pp
U packages/fcl-res/fpmake.pp
U packages/libpng/fpmake.pp
U packages/dblib/fpmake.pp
U packages/tcl/fpmake.pp
U packages/openssl/fpmake.pp
U packages/ibase/fpmake.pp
U packages/bzip2/fpmake.pp
U packages/fcl-sdo/fpmake.pp
U packages/fcl-sound/fpmake.pp
U packages/fcl-passrc/fpmake.pp
U packages/fcl-stl/fpmake.pp
U packages/libmicrohttpd/fpmake.pp
U packages/mysql/fpmake.pp
U packages/postgres/fpmake.pp
U packages/httpd22/fpmake.pp
U packages/httpd24/fpmake.pp
U packages/rtl-console/fpmake.pp
U packages/sqlite/fpmake.pp
U packages/fftw/fpmake.pp
U packages/fcl-pdf/fpmake.pp
U packages/rtl-objpas/fpmake.pp
U packages/fcl-image/fpmake.pp
U packages/pasjpeg/fpmake.pp
U packages/chm/fpmake.pp
U packages/fcl-registry/fpmake.pp
U packages/libtar/fpmake.pp
U packages/symbolic/fpmake.pp
U packages/libenet/fpmake.pp
U packages/imagemagick/fpmake.pp
U packages/fcl-xml/fpmake.pp
U packages/oracle/fpmake.pp
U packages/fcl-fpcunit/fpmake.pp
U packages/fcl-js/fpmake.pp
U packages/fcl-async/fpmake.pp
U packages/fcl-process/fpmake.pp
U packages/pastojs/fpmake.pp
U packages/hash/fpmake.pp
U packages/rtl-unicode/fpmake.pp
U packages/fpmkunit/fpmake.pp
--- Recording mergeinfo for merge of r39808 into '.':
G .
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r40027 | pierre | 2018-10-24 21:37:54 +0000 (Wed, 24 Oct 2018) | 1 line
Fix compilation of RTL for watcom target
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--- Merging r40027 into '.':
U compiler/x86/agx86int.pas
--- Recording mergeinfo for merge of r40027 into '.':
G .
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r40028 | pierre | 2018-10-25 06:39:42 +0000 (Thu, 25 Oct 2018) | 1 line
Try to fix compilation error after commit #40027
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--- Merging r40028 into '.':
G compiler/x86/agx86int.pas
--- Recording mergeinfo for merge of r40028 into '.':
G .
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r40102 | pierre | 2018-10-31 09:07:57 +0000 (Wed, 31 Oct 2018) | 1 line
Replace aint (which is a compiler specific type) by ptruint type, which is defined in system unit
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--- Merging r40102 into '.':
U tests/test/tarray5.pp
--- Recording mergeinfo for merge of r40102 into '.':
G .
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r40103 | pierre | 2018-10-31 09:59:45 +0000 (Wed, 31 Oct 2018) | 1 line
Use pdword to avoid range check erro in tentryfile.getdword method
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--- Merging r40103 into '.':
U compiler/entfile.pas
--- Recording mergeinfo for merge of r40103 into '.':
G .
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r40104 | pierre | 2018-10-31 10:21:51 +0000 (Wed, 31 Oct 2018) | 1 line
Use longint type instead of AWord for Initial parameter in CalcExecutionWeigths (to avoid range error for avr compiler)
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@@
begin
Result:=fen_false;
n.allocoptinfo;
<<<<<<< MINE (select with 'mc') (367)
Weight:=PAWord(arg)^;
||||||| ORIGINAL (367)
Weight:=max(PAWord(arg)^,1);
=======
Weight:=max(plongint(arg)^,1);
>>>>>>> THEIRS (select with 'tc') (367)
case n.nodetype of
casen:
begin
--- Merging r40104 into '.':
C compiler/optutils.pas
--- Recording mergeinfo for merge of r40104 into '.':
G .
Summary of conflicts:
Text conflicts: 1
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r40110 | pierre | 2018-10-31 14:51:23 +0000 (Wed, 31 Oct 2018) | 1 line
Avoid range check error in MaskLength evaluation
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--- Merging r40110 into '.':
U compiler/x86/aoptx86.pas
--- Recording mergeinfo for merge of r40110 into '.':
G .
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r40111 | pierre | 2018-10-31 15:47:53 +0000 (Wed, 31 Oct 2018) | 1 line
Complement commit 40104, by changing type of executionweight in toptinfo record and adapt pass_2 code
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--- Merging r40111 into '.':
U compiler/pass_2.pas
U compiler/optbase.pas
--- Recording mergeinfo for merge of r40111 into '.':
G .
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r40112 | pierre | 2018-10-31 15:48:32 +0000 (Wed, 31 Oct 2018) | 1 line
Disable range check completely in arm/cgcpu unit
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--- Merging r40112 into '.':
U compiler/arm/cgcpu.pas
--- Recording mergeinfo for merge of r40112 into '.':
G .
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r40113 | pierre | 2018-10-31 15:49:14 +0000 (Wed, 31 Oct 2018) | 1 line
Avoid overflow in code
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--- Merging r40113 into '.':
U compiler/symdef.pas
--- Recording mergeinfo for merge of r40113 into '.':
G .
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r40114 | pierre | 2018-10-31 15:50:26 +0000 (Wed, 31 Oct 2018) | 1 line
Add explicit rtlclean/rtl targets in fullcycle rule if DOWPOCYCLE is set
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--- Merging r40114 into '.':
U compiler/Makefile.fpc
U compiler/Makefile
--- Recording mergeinfo for merge of r40114 into '.':
G .
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r40120 | pierre | 2018-10-31 23:15:22 +0000 (Wed, 31 Oct 2018) | 1 line
Change RemoveCurrentP parameter type to tai, because GetNextInstruction does not always return a taicpu, adapt code in avr/aoptcpu unit
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--- Merging r40120 into '.':
U compiler/aoptobj.pas
U compiler/avr/aoptcpu.pas
--- Recording mergeinfo for merge of r40120 into '.':
G .
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r40121 | pierre | 2018-10-31 23:16:51 +0000 (Wed, 31 Oct 2018) | 1 line
Add check about tloadnode.symtableentry type before typecast
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--- Merging r40121 into '.':
U compiler/ncal.pas
--- Recording mergeinfo for merge of r40121 into '.':
G .
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r40122 | pierre | 2018-10-31 23:18:09 +0000 (Wed, 31 Oct 2018) | 1 line
Fix typecast in FindRegDeAlloc call
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--- Merging r40122 into '.':
U compiler/arm/aoptcpu.pas
--- Recording mergeinfo for merge of r40122 into '.':
G .
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r40123 | pierre | 2018-10-31 23:19:39 +0000 (Wed, 31 Oct 2018) | 1 line
Remove unneeded typecasts in TryTOptimizeMove
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--- Merging r40123 into '.':
U compiler/m68k/aoptcpu.pas
--- Recording mergeinfo for merge of r40123 into '.':
G .
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r40124 | pierre | 2018-10-31 23:20:29 +0000 (Wed, 31 Oct 2018) | 1 line
Add global range check disable for i8086 cgcpu and x86 nx86add units
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--- Merging r40124 into '.':
U compiler/i8086/cgcpu.pas
U compiler/x86/nx86add.pas
--- Recording mergeinfo for merge of r40124 into '.':
G .
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r40131 | pierre | 2018-11-01 07:01:02 +0000 (Thu, 01 Nov 2018) | 1 line
Remove another wrong typecast when testing that a tai is an instruction
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--- Merging r40131 into '.':
G compiler/m68k/aoptcpu.pas
--- Recording mergeinfo for merge of r40131 into '.':
G .
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r40236 | pierre | 2018-11-06 07:40:31 +0000 (Tue, 06 Nov 2018) | 1 line
Really change extension of hs1 local variable in get_exepath
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--- Merging r40236 into '.':
U compiler/globals.pas
--- Recording mergeinfo for merge of r40236 into '.':
G .
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r40237 | pierre | 2018-11-06 07:41:15 +0000 (Tue, 06 Nov 2018) | 1 line
Disable range checking in rax86int unit
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--- Merging r40237 into '.':
U compiler/x86/rax86int.pas
--- Recording mergeinfo for merge of r40237 into '.':
G .
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r40278 | pierre | 2018-11-08 20:19:54 +0000 (Thu, 08 Nov 2018) | 1 line
Downgrade EXTDEBUG warning to note about zero size temp, as it is used for empty sets
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--- Merging r40278 into '.':
U compiler/tgobj.pas
--- Recording mergeinfo for merge of r40278 into '.':
G .
git-svn-id: branches/fixes_3_2@40624 -
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r39983 | florian | 2018-10-18 20:28:03 +0200 (Thu, 18 Oct 2018) | 3 lines
* properly take care of register allocations between the first and second instruction for the FoldLea optimization
* check for ait_instruction after a GetNextInstruction function call
* cosmetics
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r39986 | pierre | 2018-10-18 22:21:54 +0200 (Thu, 18 Oct 2018) | 1 line
Fix for bug report #34380
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r40109 | pierre | 2018-10-31 15:43:18 +0100 (Wed, 31 Oct 2018) | 1 line
Use correct field for sl_absolutetype or sl_typeconv ppropaccesslistitem type (revealed by compilation with -CriotR)
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git-svn-id: branches/fixes_3_2@40482 -
so that they can still be freed after the reference has been changed
(e.g. in case of array indexing or record field accesses) (mantis #33628)
git-svn-id: trunk@38814 -
tcpuparamanager, very similar to the existing get_volatile_registers_XXX. The
new methods are called get_saved_registers_XXX, where XXX is the register
type ("int", "address", "fpu" or "mm")
git-svn-id: trunk@38794 -
* allow -128 to 255 as a constant for instructions taking a byte sized constants (this is also what GNU As accepts), resolves#32039
git-svn-id: trunk@38316 -
inline assembly, and fixed check after r35959 (mantis #32318)
o can also subscript parameters passed by value on the stack
o can also subscript local variables, the parameters passed by reference
that are subsequently copied into a local
git-svn-id: trunk@37886 -
* changed most of the variables in the assembler readers used to store constants from aint to tcgint
as aint has only the size of the accumular while some CPUs (AVR) allow larger constants in instructions
+ allow access to absolute symbols with address type in inline assembler
* allow absolute addresses in avr inline assembler
+ tests
git-svn-id: trunk@37411 -
from cpubase unit to a method in the tcg class. The reason for doing that is
that this is now a standard part of the 16-bit and 8-bit code generators and
moving to the tcg class allows doing extra checks (not done yet, but for
example, in the future, we can keep track of whether there was an extra
register allocated with getintregister and halt with an internalerror in case
GetNextReg() is called for registers, which weren't allocated as a part of a
sequence, therefore catching a certain class of 8-bit and 16-bit code
generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
anything. It might be added to the tcg class, in case it's ever needed, but
for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.
git-svn-id: trunk@37180 -
shiftcount>=size*8-1. This is commonly used by code, that extracts the sign
bit and improves code generation for signed division by power-of-2 as well.
This also fixes building avr-embedded (mantis #32241), which was caused by an
infinite loop in the register allocator, when regvars are enabled, due to too
much register pressure, when building charset.pp after r36842.
git-svn-id: trunk@36867 -
