Commit Graph

86 Commits

Author SHA1 Message Date
sergei
cd27d64cd5 + Support (as target-independent as possible) optimization of division by constants:
The code generator gets two new methods, a_mul_reg_reg_pair and g_div_const_reg_reg. The first one is basically 32x32 to 64 bits multiplication (or any other size, with result having twice the size of arguments), which must be implemented for every target. The second one actually does the job, its default implementation taken from powerpc64 and is sufficiently good for all three-address targets.

+ Enabled optimized division for MIPS target, target-specific changes are under 30 lines.

git-svn-id: trunk@27904 -
2014-06-08 22:50:24 +00:00
sergei
4202343033 * MIPS: emit ".set nomips16" and ".set noreorder" directives for procedures declared as "assembler nostackframe", as it is done for regular procedures. Handwritten assembler routines typically utilize delay slots, and it is desirable that assembler does not mess it up.
git-svn-id: trunk@27847 -
2014-06-04 00:26:44 +00:00
sergei
ed1555b918 * Moved generation of .ent/.end directives out of generic code generator.
* Generation of .ent/.end directives for Alpha is dropped, but that target has more important issues to solve.

git-svn-id: trunk@26757 -
2014-02-12 17:30:48 +00:00
sergei
d7c7ee2c2a * MIPS: fixed 8/16 bit arithmetic shifting to be done without using an additional register.
git-svn-id: trunk@26736 -
2014-02-08 21:13:58 +00:00
sergei
0d3f36eebf - Remove references to global variable 'cg' from methods of tcg and some of its descendants.
git-svn-id: trunk@26665 -
2014-02-03 12:27:48 +00:00
nickysn
85dd9e5789 + added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1)
git-svn-id: trunk@26561 -
2014-01-22 15:00:34 +00:00
sergei
2a112ad01b * MIPS: don't optimize reference twice for 64-bit loads and stores. Now loading/storing 64-bit value to global variable takes typically 3 instructions.
git-svn-id: trunk@26139 -
2013-11-25 14:27:35 +00:00
sergei
e10e383b8e * MIPS: ".set macro"/".set nomacro" directives around ".cprestore" are necessary only when offset is outside smallint range. Otherwise they just clutter the assembler file.
git-svn-id: trunk@25767 -
2013-10-13 20:23:43 +00:00
sergei
9494fadf08 * MIPS: set pi_do_call flag for assembler procedures with stackframes, so in PIC mode it further receives pi_needs_got in PIC mode and allocates the GP save temp.
* Deallocate GP save temp in epilogue to avoid warnings when compiled with -dEXTDEBUG
* g_concatcopy: don't check alignment, this allows single byte or word locations to be copied with 2 instructions. Larger unaligned references are supposed to be handled in g_concatcopy_unaligned instead.

git-svn-id: trunk@25147 -
2013-07-20 13:42:41 +00:00
sergei
f80ce76a69 + MIPS: emulate "flags", i.e. support LOC_FLAGS location. This allows to generate differently optimized code for branching and for conversion to register, typically saving a register and instruction per compare.
git-svn-id: trunk@25131 -
2013-07-19 14:06:47 +00:00
sergei
9a6edd0fb8 * MIPS: handle restoring GP after calls without GAS macro processing, removes ugly workaround for GAS bug.
git-svn-id: trunk@25130 -
2013-07-19 08:04:06 +00:00
sergei
9e4cc57768 * MIPS: handle 8 and 16-bit arithmetic shifts internally, by shifting argument left by 24/16 bits, followed with 32-bit arithmetic shift right by appropriately adjusted amount.
This approach should be usable for other non-x86 targets as well.

git-svn-id: trunk@25062 -
2013-07-08 08:45:16 +00:00
sergei
59d6df4fca * MIPS: replaced opcode mapping functions with array, much shorter that way. Separate "overflow" mapping is also no longer needed.
* Use SRAV/SRLV/SLLV opcodes for shifts by variable amount.

git-svn-id: trunk@25038 -
2013-07-04 14:26:44 +00:00
sergei
7a28815182 * r24895 used wrong expression for swapping sides of comparison, and it went undetected by tests. Fixed.
git-svn-id: trunk@25007 -
2013-06-28 15:40:37 +00:00
sergei
c855868a3d * MIPS: get rid of macros in comparison operations, use immediate operands for comparison with constants when possible.
+ InternalError if valid GP is needed but pi_needs_got was not set in pass 1.

git-svn-id: trunk@25003 -
2013-06-28 10:22:26 +00:00
sergei
89c9cdf6c4 + MIPS: implemented parameter location reusing, eliminating second copy of (potentially large) records passed by value. When parameter is passed both in registers and stack, let it have a single LOC_REFERENCE location on callee side, and store relevant registers on stack (into 16-byte area reserved by ABI) early in prologue.
git-svn-id: trunk@24970 -
2013-06-25 08:15:17 +00:00
sergei
8b8553991a + MIPS: prevent coalescing written-to registers with $sp,$fp,$zero and $at.
+ Implemented subset of "spill replace" functionality, replacing moves from/to spilled registers with loads/stores to spill locations. This helps to reduce amount of instructions.

git-svn-id: trunk@24900 -
2013-06-15 04:04:08 +00:00
sergei
6a8e4f0381 * MIPS: generate real instructions, not macros, for comparisons with $zero.
* g_concatcopy, g_concatcopy_unaligned: call a_cmp_reg_reg_label instead of duplicating code.

git-svn-id: trunk@24895 -
2013-06-14 07:27:48 +00:00
sergei
fb88cc4257 * TCGMIPS.a_load_reg_reg: reduce code duplication, and don't generate same register move for OS_32->OS_S32 and vice versa. Such moves explode into at least 4 instructions if register needs spilling, after which they are no longer recognized and cannot be removed by reg.allocator. So it's much better not to generate them in first place.
* Implemented overflow checking for multiplication, no longer generate MULO and MULOU macros.

git-svn-id: trunk@24894 -
2013-06-14 00:12:17 +00:00
sergei
7e0ae2e984 * MIPS: fixed cgsize2subreg to return correct result for float registers.
- TCGMIPS.getfpuregister override is no longer necessary with the above fix.

git-svn-id: trunk@24893 -
2013-06-13 23:50:20 +00:00
sergei
562714129f * MIPS: get completely rid of LI macro, generate equivalent CPU instructions instead.
git-svn-id: trunk@24862 -
2013-06-10 02:07:21 +00:00
sergei
c31321c2fe * TCGMIPS.handle_reg_const_reg(): fixed to generate 'real' CPU instructions, so macro processing by assembler is no longer needed.
git-svn-id: trunk@24564 -
2013-05-24 03:56:51 +00:00
sergei
d367148f75 - Removed obsolete comments (copypasted from other CPU code, most likely).
- Removed topsize, MIPS target does not use it.

git-svn-id: trunk@24535 -
2013-05-20 10:39:05 +00:00
sergei
300289dd89 * MIPS: reworked 64-bit code generation, implemented overflow checking and optimized operations with constants.
git-svn-id: trunk@24508 -
2013-05-15 10:02:08 +00:00
sergei
bfd7401541 * MIPS: overflow checking added in r24445 works only when source and destination of operation are different registers. Fixed cases of operations on same register.
git-svn-id: trunk@24507 -
2013-05-15 09:55:47 +00:00
sergei
7cfc737866 * MIPS: rewrote 32-bit code generation methods, reducing code duplication.
+ Implemented overflow checking for unsigned 32-bit addition and subtraction.
* Use optimize_op_const instead of custom optimizations.
* Change AND/OR/XOR into ANDI/ORI/XORI if they use immediate operands, and use correct range for these immediate operands, must be 0..65535 unlike -32768..32767 for arithmetic operations.
* Don't treat AND/OR/XOR as macros, no longer necessary.
* Don't treat BEQ/BNE as macros either.

git-svn-id: trunk@24445 -
2013-05-05 05:55:03 +00:00
sergei
504b6754b7 * MIPS small improvements:
* TCGMIPS.a_load_reg_reg: generate CPU instructions instead of macros
  * TCGMIPS.a_cmp_const_reg_label: load constant using a_load_const_reg instead of LI macro (it may also end up with LI, but tries to optimize when possible).
  - removed unused variables.

git-svn-id: trunk@24418 -
2013-05-04 07:33:34 +00:00
pierre
702effaad0 Force use of PIC compatible calling for register variable calls as procvars might be internal or external and thus require PIC
git-svn-id: trunk@24005 -
2013-03-25 21:53:31 +00:00
sergei
6f1997f5e5 + MIPS: added profiling support
git-svn-id: trunk@23950 -
2013-03-21 13:40:50 +00:00
sergei
1c652eb8f9 MIPS procinfo improvements:
- Removed TMIPSProcInfo.needs_frame_pointer, it duplicates pi_needs_stackframe flag.
- Don't save RA for leaf procedures.
* GP is caller-saved register, it does not need saving/restoring as nonvolatile registers. Handle its restore position as a "normal" temp, whose offset is known before secondpass. This allows to handle PIC calls without involving GAS macro processing.

git-svn-id: trunk@23885 -
2013-03-17 08:43:39 +00:00
sergei
823e3ea398 MIPS: reworked PIC/call code:
+ Favor 'weak' parameter in a_call_name of both thlcgmips and TCGMIPS.
* make_simple_ref and a_loadaddr_ref_reg: require input references to be 'raw' (no refaddr=addr_pic, etc) and do not use GP as base/index. If it's not true, raise an internal error. When addr_pic_call16 or so needs to be generated, it must be done without calling the mentioned methods.
* thlcgmips.a_call_name: generate PIC sequence for procedures declared as 'external', instead of 'cdecl', this is more correct because ABI has only one calling convention.
- make_simple_ref_fpu removed, there's no reason to handle references to floating-point data in different way.
- a_loadaddr_ref_cgpara override also removed, generic method does the job just well.
- thlcgmips.a_call_ref and a_call_reg overrides removed because indirect calls are now always done using $t9.

git-svn-id: trunk@23698 -
2013-03-05 19:31:20 +00:00
sergei
a1b50f643e - removed never used function.
git-svn-id: trunk@23697 -
2013-03-05 18:05:52 +00:00
sergei
d190d4676b - MIPS: removed comment generation in function prologues, it clutters listing more than it helps. Also removed some unused variables.
git-svn-id: trunk@23661 -
2013-02-25 21:40:03 +00:00
sergei
354ebb822a * MIPS: fixed layout of stack frame in case procedure does only low-level calls (via a_call_name, etc.). A 16-byte outgoing parameter area must be allocated regardless of actual parameter count.
* Abort if attempting to emit a call without pi_do_call flag set, because the outgoing parameter area determines layout of temps and therefore cannot be created/changed during pass 2.
* Bypass g_concatcopy_move if procedure is a leaf one, due to the restriction mentioned above.

git-svn-id: trunk@23644 -
2013-02-21 20:57:38 +00:00
sergei
69c8f6cf7d * Typo in previous commit
git-svn-id: trunk@23639 -
2013-02-20 23:03:45 +00:00
sergei
d7c96dea8b * MIPS: refactoring: removed handle_load_store and handle_load_store_fpu.
git-svn-id: trunk@23637 -
2013-02-20 20:59:33 +00:00
sergei
30247d8961 * MIPS: fixed parameter handling for big-endian targets, and removed a lot of garbage.
* Parameters passed in registers are no longer forced to stack, therefore assembler routines using 'lw' instruction to load such parameters must have it changed to 'move' (tb0072.pp).

git-svn-id: trunk@23627 -
2013-02-18 04:20:10 +00:00
pierre
2916235cfe Fix make_simple_ref for pic address with big offsets
git-svn-id: trunk@23584 -
2013-02-08 15:47:14 +00:00
sergei
d82387ff72 * MIPS: fixed parameter management to properly align records smaller than 32 bits on big-endian targets.
* Also changed parameter management to allocate a single LOC_REFERENCE location for any parameter (or part of a parameter) passed on stack. Such locations can now be handled by generic code. As a consequence, TGMIPS.a_load_const_cgpara and a_load_ref_cgpara methods are no longer necessary (moreover they were ignoring parameter shifting).
* a_loadfpu_ref_cgpara patched to handle 64-bit location, which are now possible.

* This change eliminates code generation madness where each word of a record was copied individually, thus passing by value a 32K-word sized record was bloating into 64K instructions, multiply this number by 2 for larger records due to limited immediate offsets, and by another 2 for global record in PIC mode :/

git-svn-id: trunk@23575 -
2013-02-05 22:21:09 +00:00
sergei
ef38193043 * MIPS: Once again fixed g_external_wrapper. My initial assumption about .cpload was wrong: it is optimized into position-dependent sequence only if "-KPIC -mno-shared" is passed to GAS command line, without -KPIC it is ignored altogether. Therefore r23566 breaks some non-PIC tests.
git-svn-id: trunk@23567 -
2013-02-03 21:53:30 +00:00
sergei
9bc758d62b * Forgot to set base register to NR_GP
git-svn-id: trunk@23566 -
2013-02-03 01:46:49 +00:00
sergei
a0c1e1b07f * MIPS: fixed a_call_name and a_call_reg methods to workaround a bug in GAS <2.21, see comments in source for details.
+ g_external_wrapper method.

git-svn-id: trunk@23565 -
2013-02-02 23:52:58 +00:00
sergei
8bfbee747a * MIPS: Rewrote g_intf_wrapper method to support instance offsets greater than 32767 and PIC (the latter part untested yet).
git-svn-id: trunk@23557 -
2013-02-01 18:28:46 +00:00
pierre
7e79042d58 Reorganize for better pic support (not yet working completly ...)
git-svn-id: trunk@23550 -
2013-01-31 13:35:52 +00:00
sergei
162896e7d7 * MIPS code generator fixes and improvements:
- removed a_jmp_cond, it's not virtual and not applicable to this CPU.
* a_loadfpu_reg_cgpara: use direct register moves for simple destinations.
* g_concatcopy: don't take address of source/destination for small amounts of data if possible, for single 32-bit moves this reduces number of generated instructions from 4 to 2.
* g_intf_wrapper: 'Self' is in R4 (a0), not R2. Fixes test/tinterface1.pp.

* mips/cpupara.pas: for functions with result returned in parameter, pass its address in a0 only if result is a record. ABI does not specify behavior for types except records/unions. At the same time, Pascal code relies on the fact that results like strings/interfaces does not change their locations, i.e. "function foo(<self>): IInterface" can be invoked as "procedure foo(<self>, out obj)". This fixes test/tdel1.pp and some Variant-related tests.

git-svn-id: trunk@23377 -
2013-01-13 18:24:06 +00:00
Jonas Maebe
69c29a415f * pass the procdef to getintparaloc instead of only the proccalloption, so
that the type of the parameters can be determined automatically
   o added compilerproc declarations for all helpers called in the compiler
     via their assembler name, so we can look up the corresponding procdef

git-svn-id: trunk@23325 -
2013-01-06 15:05:40 +00:00
sergei
db72b8d7fd * TCGMips.a_loadfpu_reg_cgpara: temps of type Double need 8-byte alignment, according to description of sdcX/ldcX instructions. Using TCGSize2Size to specify alignment is somewhat weird, but it is being used in other CPU back-ends and looks working.
git-svn-id: trunk@23146 -
2012-12-15 08:47:11 +00:00
pierre
ff78c930c5 Fix problem in 64bit substraction
git-svn-id: trunk@22521 -
2012-10-02 23:35:02 +00:00
pierre
15f4e1279b Add RS_GP to list of saved registers if pi_needs_got flag is set
git-svn-id: trunk@22450 -
2012-09-24 21:01:47 +00:00
pierre
c72f27e53e Remove more TABs in source
git-svn-id: trunk@22334 -
2012-09-06 08:07:38 +00:00