paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-06-03 13:58:32 +02:00
Code Issues Packages Projects Releases Wiki Activity
43,317 Commits 100 Branches 75 Tags 313 MiB
b594eee70b
Commit Graph

1016 Commits

Author SHA1 Message Date
nickysn
0020a2ed10 + when targeting the i8087, emit FWAIT prefix manually for the 8087 instructions 
that require it in the NASM asm writer, since NASM doesn't do it itself.

git-svn-id: trunk@26107 -
 2013-11-19 01:26:57 +00:00
nickysn
12b2f86e99 + added function requires_fwait_on_8087(), which checks whether a given 
instruction needs adding a FWAIT prefix on the i8087.

git-svn-id: trunk@26106 -
 2013-11-18 23:38:57 +00:00
sergei
bca2c464da * Don't generate x87 instructions for sin and cos on win64, somehow managed to not commit this part in r25995. Mantis #17273. 
git-svn-id: trunk@26094 -
 2013-11-15 10:37:59 +00:00
nickysn
dea947f87b * fixed tcgx86.a_op_const_ref for shl/shr/sar/rol/ror on i8086 and x86_64 
git-svn-id: trunk@26018 -
 2013-11-10 20:39:47 +00:00
sergei
2b1e5f7014 * Mantis #17273: don't generate x87 instructions on win64 target. 
git-svn-id: trunk@25995 -
 2013-11-08 13:31:07 +00:00
nickysn
d0f988f7a8 * don't use LEA in the code generator on i8086, as this breaks it quite badly. 
While it is possible to use 16-bit LEA on the i8086, it's probably not worth
  doing it in the code generator, because of the unpleasant register
  restrictions that 16-bit references have.

git-svn-id: trunk@25989 -
 2013-11-07 17:00:58 +00:00
florian
f132a804d6 + handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics 
git-svn-id: trunk@25909 -
 2013-11-01 19:01:39 +00:00
florian
7fc1d70e49 * do reg2=reg1*const by lea if possible 
git-svn-id: trunk@25908 -
 2013-11-01 19:01:36 +00:00
florian
f56d2d4b09 * be able to replace lea by add when spilling 
git-svn-id: trunk@25901 -
 2013-11-01 19:01:20 +00:00
florian
3c58cad96b * make use of lea if possible 
git-svn-id: trunk@25898 -
 2013-11-01 19:01:11 +00:00
sergei
486a7ef81e * tx86inlinenode.second_popcnt: use emit_ref_reg instead of appending instruction directly, this provides proper PIC handling of the reference. emit_reg_reg part is not strictly necessary, but done for consistency. 
git-svn-id: trunk@25878 -
 2013-10-28 16:40:42 +00:00
nickysn
9f979eb5c6 * put the i8086-msdos dwarf debug sections in USE32 class=DWARF segments because 
wlink wants them this way

git-svn-id: trunk@25873 -
 2013-10-27 20:28:43 +00:00
nickysn
e6a4435330 + support the aitconst_XXbit_unaligned const types in the NASM asm writer. This 
fixes DWARF support when using NASM.

git-svn-id: trunk@25866 -
 2013-10-27 15:21:30 +00:00
nickysn
0f69362edd - rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction, 
using it in inline asm causes an internal error and removing it didn't show
  any regressions after running the testsuite on i386-linux.

git-svn-id: trunk@25827 -
 2013-10-18 23:26:58 +00:00
nickysn
4aa010eedc + support LEA with 16-bit operand size 
git-svn-id: trunk@25808 -
 2013-10-17 16:11:08 +00:00
nickysn
f6e846c574 + added the NEC V20/V30 instructions 
git-svn-id: trunk@25750 -
 2013-10-11 21:27:56 +00:00
nickysn
67fdcb02f2 * in tcgx86.make_simple_ref, on the i8086, emit 'mov es, reg', instead of 
'push reg/pop es', since that is a lot faster on 8088..80386

git-svn-id: trunk@25700 -
 2013-10-06 19:52:38 +00:00
nickysn
6be9627e74 * use all kinds of copy and not just copy_string in Tcgx86.g_concatcopy, when 
segments are specified on the i8086

git-svn-id: trunk@25698 -
 2013-10-06 19:04:13 +00:00
sergei
5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 
git-svn-id: trunk@25627 -
 2013-10-03 08:08:04 +00:00
sergei
2c79314d59 * IF_SANDYBRIDGE designates CPU family, not feature. Mostly a cosmetic change, since we don't use these flags for anything. 
git-svn-id: trunk@25626 -
 2013-10-03 06:06:34 +00:00
nickysn
bd0585274e * tsettings.enablecld converted to a targetswitch ts_cld 
git-svn-id: trunk@25592 -
 2013-09-28 13:41:58 +00:00
nickysn
52fcc0a407 + added a new x86-specific compiler option 'enablecld', which controls whether 
the compiler should emit a CLD before using the x86 string instructions.

git-svn-id: trunk@25590 -
 2013-09-28 11:54:02 +00:00
nickysn
661e11ecb8 * on i8086 added section .fpc to the group 'dgroup'. This fixes a bug that caused the bss section to not be left out from the executable in tiny model, which caused, ironically, tiny model executables to be larger than the small model executables 
git-svn-id: trunk@25525 -
 2013-09-21 11:28:01 +00:00
nickysn
8608969eb8 * tx86casenode.genjumptable: explicitly emit near pointers in the case jump table on i8086, regardless of the memory model 
git-svn-id: trunk@25503 -
 2013-09-16 19:58:45 +00:00
sergei
5de4bdac40 * tx86addnode.second_cmpfloat: use getresflags() to reduce code duplication. 
git-svn-id: trunk@25443 -
 2013-09-09 11:25:49 +00:00
nickysn
4f96e8a20d * convert i8086 inline asm instruction 'call symbol' to 'call far symbol' in memory models with far code 
git-svn-id: trunk@25438 -
 2013-09-08 16:34:12 +00:00
sergei
7e6a7f20cc - Removed unused variables and dead assignments. 
git-svn-id: trunk@25424 -
 2013-09-05 09:05:56 +00:00
Jonas Maebe
1a78ec1f11 * workaround for bug in Apple's assembler regarding movq/vmovq and integer 
registers

git-svn-id: trunk@25396 -
 2013-09-02 14:39:26 +00:00
nickysn
f9d0caa7c7 * pass the option -w-orphan-labels to nasm to avoid the spurious warnings about labels without a trailing colon and without an instruction on the same line 
git-svn-id: trunk@25358 -
 2013-08-23 23:40:24 +00:00
Jonas Maebe
3b9b6a0cd7 * explicitly define the asmsymbols for Darwin call stubs as local 
git-svn-id: trunk@25264 -
 2013-08-16 10:07:46 +00:00
sergei
e1550e1aed * Restore registers in correct order (for push/pop it *does* matter), fixes crashes caused by r25224. 
git-svn-id: trunk@25228 -
 2013-08-08 05:35:51 +00:00
sergei
5c4abfa75a + Implemented saving/restoring registers using PUSH/POP instructions on i386 targets with non-fixed stack. Provides some advantage in code size (e.g. the compiler becomes about 20KBytes smaller). 
* This should be applicable to i8086 targets as well (but needs testing), by copying changes from i386/cgcpu.pas to i8086/cgcpu.pas and removing "$ifdef i386" lines in cgx86.pas.

git-svn-id: trunk@25224 -
 2013-08-07 09:59:07 +00:00
sergei
a21a20d559 + i8086-specific version of g_stackpointer_alloc. 
git-svn-id: trunk@25219 -
 2013-08-06 08:11:39 +00:00
sergei
1f72143eef * In preparation for fixing Mantis #24791: Copy related code from tcgx86.g_proc_entry to tcgx86_64.g_proc_entry, and remove win64-specific stuff from tcgx86 version. 
git-svn-id: trunk@25218 -
 2013-08-06 07:34:50 +00:00
sergei
ea65e272dd * Changed global variable into field. 
git-svn-id: trunk@25217 -
 2013-08-05 16:32:37 +00:00
florian
507edb16de * use add/sub instead of inc/dec on modern CPUs when optimizing for speed 
git-svn-id: trunk@25057 -
 2013-07-07 19:50:13 +00:00
nickysn
7e70a5f763 * i8086 fix after r25010: i8086 doesn't support lea sp,[sp-XXX] 
git-svn-id: trunk@25012 -
 2013-06-29 12:21:15 +00:00
florian
94cf650d9a * use lea to adjust stack pointer, this is equal or faster on all modern CPUs than add/sub 
git-svn-id: trunk@25010 -
 2013-06-28 17:06:57 +00:00
florian
466eb4c684 * use MOVAPS/MOVAPD for reg -> reg moves to reduce data dependencies 
git-svn-id: trunk@24967 -
 2013-06-24 20:55:04 +00:00
nickysn
58b22adaf1 + added function cpubase.segment_regs_equal, which checks whether 2 segment regs are equal in the current memory model 
git-svn-id: trunk@24949 -
 2013-06-23 11:27:00 +00:00
florian
fc72490166 * handle LOC_*FPUREGISTER correctly when using sse2 sqr, resolve #26408 
git-svn-id: trunk@24909 -
 2013-06-16 18:48:08 +00:00
florian
9b6094a58c + added a few BMI instructions to see if they can be encoded 
git-svn-id: trunk@24907 -
 2013-06-16 09:35:21 +00:00
florian
0a84f1f10c + avx uses add to multiply by 2 
* formatting

git-svn-id: trunk@24906 -
 2013-06-15 21:18:40 +00:00
florian
d8ff85846f * don't reuse mm registers used by child nodes 
git-svn-id: trunk@24897 -
 2013-06-14 20:52:36 +00:00
florian
e81d2d1f3b * basic avx support for floating point operations (use -Cfavx to activate) 
git-svn-id: trunk@24896 -
 2013-06-14 20:03:01 +00:00
svenbarth
b6bfa864d4 Disallow the usage of the inline assembler inside generics, because there are currently two problems: 
1. At least on x86 the assembler reader initializes the parameter location informations which results in InternalError 200301231
2. Assembler tokens are not stored in the token stream and thus won't be reproduced during specialization

x86/rax86int.pas, tx86intreader.Assemble:
  * check for "parse_generic" before calling generate_parameter_info
pstatmnt.pas, assembler_block & statement:
  * generate an error message if an asm statement should be parsed inside a generic

+ added test

git-svn-id: trunk@24892 -
 2013-06-13 19:42:49 +00:00
nickysn
4840a33b80 * also return true in is_calljmp() for the A_JCXZ instruction on the i8086 
git-svn-id: trunk@24886 -
 2013-06-12 23:42:45 +00:00
nickysn
511b1f37c1 * write the segment of aitconst_farptr on a separate line to avoid long symbol truncation, due to line length limit; this fixes compilation of sysutils in the medium memory model 
git-svn-id: trunk@24879 -
 2013-06-12 01:32:18 +00:00
nickysn
9dbbffba61 + added trefaddr.addr_seg for referencing the segment of a symbol 
git-svn-id: trunk@24859 -
 2013-06-10 01:16:37 +00:00
nickysn
62316da236 * a_call_reg moved to a_call_reg_near 
git-svn-id: trunk@24855 -
 2013-06-09 22:09:39 +00:00
nickysn
e4a1230356 + added support for far pointer constants in the assembly output 
git-svn-id: trunk@24854 -
 2013-06-09 22:01:04 +00:00
nickysn
604b7c9deb + added cg.a_call_ref_near and a_call_ref_far 
git-svn-id: trunk@24853 -
 2013-06-09 20:22:47 +00:00
nickysn
3631198b34 + declare the text segment with class=code in the nasm header for far code memory models also 
git-svn-id: trunk@24834 -
 2013-06-09 13:01:40 +00:00
nickysn
9a6c242f97 + emit proper far calls/jmps for addr_far in the nasm assembly output 
git-svn-id: trunk@24833 -
 2013-06-09 12:59:44 +00:00
nickysn
3280514d2b * in i8086 far code models, put the code in a section called module_name+'_TEXT', so each unit gets a separate code segment 
git-svn-id: trunk@24831 -
 2013-06-09 12:26:33 +00:00
nickysn
b74af9fda0 * declare the text segment with class=code on i8086-msdos 
git-svn-id: trunk@24830 -
 2013-06-09 12:13:52 +00:00
nickysn
ec497ae11e + the regular tcgx86.a_call_name and .a_call_name_static moved to .a_call_name_near and .a_call_name_static_near, because a_call_name and a_call_name_static are going to be overriden in tcg8086 
git-svn-id: trunk@24827 -
 2013-06-09 10:42:39 +00:00
nickysn
2279e51a95 + added trefaddr.addr_far for emitting far calls 
git-svn-id: trunk@24826 -
 2013-06-09 10:24:06 +00:00
nickysn
b409d600ee + implemented the tiny memory model for i8086-msdos; we now produce working dos .com files as well 
git-svn-id: trunk@24793 -
 2013-06-02 23:02:10 +00:00
nickysn
90ecd72286 * x86_64 compilation fixed after r24752 
git-svn-id: trunk@24755 -
 2013-06-01 22:38:07 +00:00
nickysn
ec76b2cf40 * refactored the segment-in-integer-register reference support, so it's handled in make_simple_ref, instead of all over the place in the code generator 
git-svn-id: trunk@24752 -
 2013-06-01 22:18:09 +00:00
Jonas Maebe
2dd75e707e * renamed thlcgobj.tcgsize2orddef to defutil.cgsize_orddef 
git-svn-id: trunk@24743 -
 2013-06-01 18:28:15 +00:00
nickysn
525246f61b * support i8086 far references in tx86addnode.emit_op_right_left 
git-svn-id: trunk@24737 -
 2013-06-01 17:51:58 +00:00
nickysn
c9c882c30a * always use 16-bit pushes for pushing/popping the segment registers on i8086 in Tcgx86.g_concatcopy 
git-svn-id: trunk@24735 -
 2013-06-01 17:49:49 +00:00
nickysn
e243b6b869 * never use the 66h prefix when pushing/popping segment registers on i8086, as the stack is aligned on 2 bytes there 
git-svn-id: trunk@24729 -
 2013-06-01 16:03:14 +00:00
nickysn
c2e3fb5918 + emit proper interrupt procedure entry/exit code on i8086 
git-svn-id: trunk@24728 -
 2013-06-01 15:50:11 +00:00
Jonas Maebe
5051453806 + support for LOC_(C)MMREGISTER in hlcg 
o migrated location_force_mmregister_scalar from ncgutil to hlcgobj

git-svn-id: trunk@24661 -
 2013-05-31 12:05:14 +00:00
nickysn
db5573b395 * fixed the nasm assembly output for SAR/SAL with a memory reference 
git-svn-id: trunk@24656 -
 2013-05-31 08:21:42 +00:00
nickysn
125a6a8720 * register id of (e)flags changed, so it doesn't overlap with dr0 
git-svn-id: trunk@24647 -
 2013-05-30 16:40:59 +00:00
Jonas Maebe
d6180b1e70 * properly propagate PIC-related suffixes from the x86 assembler reader in 
case the operand was parsed as a symbol

git-svn-id: trunk@24638 -
 2013-05-30 12:20:48 +00:00
nickysn
1797c8b803 * i8086 fixes for the handling of large sets in tx86innode.pass_generate_code; test/cg/tin.pp works now 
git-svn-id: trunk@24634 -
 2013-05-30 10:16:05 +00:00
nickysn
de345ac191 * added missing setbase fixup in tx86innode.pass_generate_code for the case of LOC_CONSTANT in LOC_REFERENCE for large sets 
git-svn-id: trunk@24619 -
 2013-05-26 10:53:42 +00:00
nickysn
533bd30094 * some more i8086 bug fixes in tx86innode.pass_generate_code 
git-svn-id: trunk@24618 -
 2013-05-26 09:08:28 +00:00
nickysn
967e10ea95 * i8086 fixes in tx86innode.pass_generate_code 
git-svn-id: trunk@24617 -
 2013-05-25 22:46:50 +00:00
nickysn
f3ad9ce9ce * i8086 fixes in tx86typeconvnode.second_int_to_bool; this fixes tcnvint2.pp 
git-svn-id: trunk@24615 -
 2013-05-25 21:19:55 +00:00
nickysn
b43c4c4aca * i8086 fixes in tx86typeconvnode.second_int_to_real 
git-svn-id: trunk@24606 -
 2013-05-25 16:37:41 +00:00
nickysn
2b583bb265 * do not use fsin and fcos on 286-, since they're 387+ 
git-svn-id: trunk@24596 -
 2013-05-25 15:24:53 +00:00
nickysn
09249b31b8 * use the generic implementation of second_IncludeExclude in case the cpu is earlier than 386, since then it does not support BTR and BTS 
git-svn-id: trunk@24593 -
 2013-05-25 14:18:55 +00:00
florian
2ec15deaba * more readable register allocation comments 
git-svn-id: trunk@24585 -
 2013-05-24 19:03:50 +00:00
nickysn
fd429612f8 + initial (and not yet fully complete) implementation of far pointers on the i8086 
git-svn-id: trunk@24553 -
 2013-05-22 16:26:33 +00:00
nickysn
f571aebdd0 * tx86pointertyp moved from unit symdef to symconst, so it can be used by ppudump 
git-svn-id: trunk@24547 -
 2013-05-21 14:18:48 +00:00
nickysn
b9084a22ca * in the nasm writer only declare labels as global if they have labsym.bind=AB_GLOBAL; this fixes compilation of i8086-msdos programs that use multiple units 
git-svn-id: trunk@24529 -
 2013-05-19 17:51:29 +00:00
nickysn
ecb5a4866d * refactored the int64 result passing in ax:bx:cx:dx to use 4 paralocs, instead of the GetNextReg hack 
git-svn-id: trunk@24527 -
 2013-05-19 12:50:15 +00:00
nickysn
9f0c23bd4c * fixed round() on i8086 after r24502 
git-svn-id: trunk@24503 -
 2013-05-15 00:45:08 +00:00
nickysn
3665ed4b03 + enabled returning int64 in ax:bx:cx:dx for the i8086 
git-svn-id: trunk@24502 -
 2013-05-14 22:45:57 +00:00
nickysn
6b2f59c3e0 + preparations for returning int64 in ax:bx:cx:dx on i8086 
git-svn-id: trunk@24498 -
 2013-05-14 22:19:17 +00:00
nickysn
e2cd2813ce + stop with an internal error if GetNextReg is called with a non-imaginary register 
git-svn-id: trunk@24493 -
 2013-05-13 22:34:13 +00:00
nickysn
92afd7cccd + R_SUBH support added in x86/aasmcpu.spilling_create_load and spilling_create_store 
git-svn-id: trunk@24477 -
 2013-05-09 14:10:45 +00:00
nickysn
2a9d38d878 + proper spilling support for R_SUBH (i.e. AH,BH,CH,DH) x86 registers in trgx86.do_spill_replace 
git-svn-id: trunk@24476 -
 2013-05-09 11:57:00 +00:00
nickysn
0a8e008a0d + the ES register made volatile on i8086 as per the 16-bit x86 calling conventions 
git-svn-id: trunk@24462 -
 2013-05-07 14:27:21 +00:00
nickysn
b0f7786782 + added support for special versions of near data pointers associated with a x86 segment register. They are supported on all x86 platforms: i8086, i386 and x86_64 
git-svn-id: trunk@24453 -
 2013-05-05 17:22:37 +00:00
nickysn
fe275c4f47 * set nasm cpu type according to the current cpu level set by -Cp 
git-svn-id: trunk@24402 -
 2013-05-01 15:47:23 +00:00
nickysn
4c95592e08 * don't use 'fnstsw ax' if the current cpu level is below 286 
git-svn-id: trunk@24401 -
 2013-05-01 15:42:02 +00:00
nickysn
e4f3dd1264 * do not emit shl/shr with a const different than 1 on 8086 
git-svn-id: trunk@24382 -
 2013-04-29 23:02:09 +00:00
nickysn
99d3b453a4 * got rid of the i8086 nasm warning 'segment attributes specified on redeclaration of segment' 
git-svn-id: trunk@24336 -
 2013-04-26 22:17:42 +00:00
florian
0e41df598e * merge i8086 branch by Nikolay Nikolov 
git-svn-id: trunk@24324 -
 2013-04-25 20:23:51 +00:00
florian
926dd1b41e * command line compilation of i8086 fixed 
git-svn-id: branches/i8086@24291 -
 2013-04-21 18:32:09 +00:00
nickysn
fef3732884 * i8086 compilation fixes 
git-svn-id: branches/i8086@24244 -
 2013-04-14 16:34:02 +00:00
nickysn
3152df6e7f * fixed bugs in tx86inlinenode, introduced in r24237 
git-svn-id: branches/i8086@24243 -
 2013-04-14 16:16:47 +00:00
nickysn
97ca0fa323 - removed ti8086inlinenode.second_round_real, second_trunc_real and load_fpu_location as they mostly repeat the code in tx86inlinenode.load_fpu_location; tx86inlinenode.load_fpu_location adapted for i8086 instead 
git-svn-id: branches/i8086@24237 -
 2013-04-14 14:25:22 +00:00
nickysn
107a6f6552 * i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc 
git-svn-id: branches/i8086@24232 -
 2013-04-12 12:06:28 +00:00
Jonas Maebe
8b8a786823 * moved ARM/x86 ifdef'ed code from ncgcal to virtual methods 
git-svn-id: trunk@24179 -
 2013-04-07 13:42:06 +00:00
nickysn
59976c3ac8 * use FixNonCommutativeOpcodes in agx86int.pas as well (fixes compilation for i386) 
git-svn-id: branches/i8086@24168 -
 2013-04-06 23:23:25 +00:00
florian
ad0b0455d8 * extended comment 
git-svn-id: branches/i8086@24152 -
 2013-04-04 21:06:10 +00:00
nickysn
c3aaa37c0c * fixed a bug which caused non commutative fpu instructions to be wrong when using an intel-style external assembler and compiling a smartlinked unit 
git-svn-id: branches/i8086@24151 -
 2013-04-04 20:17:50 +00:00
nickysn
324b4a8a0a * declare the .bss sections with class=bss, so wlink treats them as bss sections and leaves them out of the executable 
git-svn-id: branches/i8086@24064 -
 2013-03-30 00:49:11 +00:00
nickysn
e16e08b2b6 + added CPU 286 nasm directive to the i8086 assembly output in order to catch 386+ instructions; the RTL now compiles without generating any 386+ instructions 
git-svn-id: branches/i8086@24010 -
 2013-03-26 00:57:38 +00:00
nickysn
44ef72e1a4 * use the generic implementation of abs for the i8086 
git-svn-id: branches/i8086@24004 -
 2013-03-25 21:43:47 +00:00
nickysn
8d75441b6e * do not generate prefetchnt instructions on the i8086 
git-svn-id: branches/i8086@24003 -
 2013-03-25 19:18:18 +00:00
nickysn
eefc9eed90 * do not use 'NEAR' conditional jumps on the i8086, because they are 386+ 
git-svn-id: branches/i8086@23993 -
 2013-03-25 00:24:35 +00:00
nickysn
1f5d384a1e * i8086 fix in tx86casenode.genlinearlist 
git-svn-id: branches/i8086@23990 -
 2013-03-24 23:03:06 +00:00
nickysn
1646f53d59 * fixed the 'unresolved externals' linker error when smartlinking msdos executables 
git-svn-id: branches/i8086@23968 -
 2013-03-23 00:47:12 +00:00
florian
24f9d0d770 * cancel warning on i8086 because it stops compilation (the compiler is normally build with -Sew) 
git-svn-id: branches/i8086@23933 -
 2013-03-19 20:10:52 +00:00
nickysn
b930c9a0db * all the remaining cases of the 'in' operator fixed (hopefully) for i8086 
git-svn-id: branches/i8086@23905 -
 2013-03-17 20:38:44 +00:00
nickysn
8ca0b443b8 * another case of the 'in' operator fixed for i8086 ('x in const', when use_small=false and genjumps=false) 
git-svn-id: branches/i8086@23903 -
 2013-03-17 20:18:57 +00:00
nickysn
d7c9603351 * i8086 fixes for the 'in' operator in the case of 'unsigned,small,non_constant IN smallset' 
git-svn-id: branches/i8086@23901 -
 2013-03-17 17:40:15 +00:00
nickysn
e6c8ac6694 * use the generic tcgaddnode.second_addsmallset on i8086, because the BTx instructions are 386+ 
git-svn-id: branches/i8086@23895 -
 2013-03-17 15:40:54 +00:00
florian
20a534e63f * fixed code which causes range check errors when compiled with -Cr 
git-svn-id: trunk@23889 -
 2013-03-17 14:24:50 +00:00
nickysn
fbc41991f9 * i8086 fixes in tcgx86.a_op_reg_reg for 16-bit OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR 
git-svn-id: branches/i8086@23881 -
 2013-03-17 00:05:05 +00:00
florian
d6f0a1a0df * do not generate scaled indicies for case table jumps for i8086 
git-svn-id: branches/i8086@23872 -
 2013-03-16 19:52:53 +00:00
florian
edd4c1ce4b * proper fix to avoid sp relative adressing as r23867 tries 
git-svn-id: branches/i8086@23868 -
 2013-03-16 16:51:31 +00:00
florian
b321f867c6 + trgintcpu.add_cpu_interferences for i8086 so references are properly build 
* empty make_simple_ref code path for i8086

git-svn-id: branches/i8086@23782 -
 2013-03-10 18:51:42 +00:00
nickysn
c467035a1c added group directive, so that the .data, .rodata and .bss sections go to the same segment 
git-svn-id: branches/i8086@23754 -
 2013-03-09 18:30:11 +00:00
nickysn
95b15d15bd another nested ifdef cleaned up 
git-svn-id: branches/i8086@23741 -
 2013-03-09 11:35:42 +00:00
nickysn
981f0a5c6c nested ifdefs converted to series of elseif + some other ifdefs cleaned up 
git-svn-id: branches/i8086@23740 -
 2013-03-09 11:25:25 +00:00
nickysn
5f7d432ff9 i8086 fixes in Tcgx86.g_concatcopy and TCGSize2OpSize 
git-svn-id: branches/i8086@23720 -
 2013-03-08 00:13:02 +00:00
nickysn
eff0894a66 all the extra i8086 units added 
git-svn-id: branches/i8086@23718 -
 2013-03-08 00:04:45 +00:00
nickysn
4440015db3 added i8086 specific adaptations to the NASM assembly writer 
git-svn-id: branches/i8086@23714 -
 2013-03-07 22:51:42 +00:00
nickysn
a4b1a9011b i8086 specific stuff added to x86/cpubase.pas 
git-svn-id: branches/i8086@23713 -
 2013-03-07 22:49:35 +00:00
Jonas Maebe
5d628b29bb * set the subregsize of OS_M64 SSE registers to R_SUBQ so we can 
differentiate between 64 bit and 128 bit (R_SUBMMWHOLE) SSE vector regs,
    and support spilling/assembling for R_SUBQ SSE registers (8 bytes)
    (mantis #23962)

    We currently never use the full 128 bit of an SSE register, and
    spilling for those hasn't been implemented yet either (R_SUBMMWHOLE
    SSE regs are spilled into a 4-byte temp currently -> can overwrite data)

git-svn-id: trunk@23700 -
 2013-03-06 12:42:46 +00:00
yury
8ae7c5784c * Sync with trunk r23500. 
git-svn-id: branches/targetandroid@23501 -
 2013-01-23 07:53:13 +00:00
yury
e13e2e1697 * Turn off special handling of interrupt calling convention for i386-android. 
git-svn-id: branches/targetandroid@23492 -
 2013-01-22 14:43:42 +00:00
yury
0960ee2034 * Add missing checks for android target. 
git-svn-id: branches/targetandroid@23477 -
 2013-01-21 12:08:25 +00:00
paul
5d74e0578a compiler: remove unused variables and unneeded assignments 
git-svn-id: trunk@23467 -
 2013-01-21 01:24:36 +00:00
yury
c2fed960c9 * Add android to supported targets for assemblers. It fixes assembling for i386-android. 
git-svn-id: branches/targetandroid@23441 -
 2013-01-18 14:51:09 +00:00
sergei
7530fb3352 * tcgx86.make_simple_ref: handle references to absolute addresses (these are quite rare on x86_64, but still worth to handle correctly). 
* If possible, use reference base instead of index, this yields shorter instructions.
* Added comment about offset limits for rip-relative addressing.
- Removed code related to taking threadvar address on win32, it is incorrect because Windows TLS is not directly accessible via segment registers (fs:0x2c points to array of pointers to TLS storages of each module, so at least double indirection is needed).

git-svn-id: trunk@23342 -
 2013-01-07 16:00:12 +00:00
florian
feefcb6d3d * don't generate dec for case nodes of unsigned types because dec does not set the carry flag, resolves #23503 
git-svn-id: trunk@23229 -
 2012-12-27 19:35:58 +00:00
Jonas Maebe
68dd05e259 * fixed std_regname() for xmm registers with custom sizes 
* fixed findreg_by_number() for xmm registers with R_SUBNONE
    (from the assembler reader)

git-svn-id: trunk@23151 -
 2012-12-15 22:47:12 +00:00
Jonas Maebe
d180d6f241 * fixed size of movzx/movsx with 64bit operand in x86-64 Intel asm reader 
git-svn-id: trunk@23131 -
 2012-12-09 22:42:52 +00:00
florian
ab1815273c + added comment on movsd hack 
git-svn-id: trunk@23031 -
 2012-11-18 21:34:38 +00:00
florian
d49a88c3c8 * merge fixes by Torsten Grundke 
git-svn-id: trunk@23030 -
 2012-11-18 21:18:49 +00:00
florian
45f60bc4b5 * small changes (copyright, typo, readability) 
git-svn-id: trunk@23022 -
 2012-11-18 17:28:30 +00:00
florian
0b30b0fd5a * re-enable jump tables for x86-64, they are fixed, see also 
http://www.hu.freepascal.org/lists/fpc-devel/2012-June/029141.html

git-svn-id: trunk@22921 -
 2012-11-03 22:14:45 +00:00
florian
6345aee80b * revert r19643: FloatToStr has to handle Nan correctly and should not cause 
any exceptions (silent or not), FloatToStr has been fixed in r19783

git-svn-id: trunk@22877 -
 2012-10-29 22:00:42 +00:00
masta
e327b4581c Use TRegNameTable instead of array[tregisterindex] of string[10] 
TRegNameTable is defined in compiler/rgbase.pas and is an array of
strings, limited to the maximum length of the used register names.

r22792 added a long register name but did not scale the string-size
enough, resulting in the compiler built breaking for arm.

git-svn-id: trunk@22817 -
 2012-10-22 10:23:21 +00:00
Jonas Maebe
6497d3c994 - removed no longer used/supported af_allowdirect flag (direct assembler 
reader support)

git-svn-id: trunk@22794 -
 2012-10-21 13:42:58 +00:00
florian
04543b179f o merge of the branch laksen/arm-embedded of Jeppe Johansen: 
fixes a couple of arm-embedded stuff, 
  adds some controllers, start of fpv4_s16 support, for a complete list of
  changes see below:
------------------------------------------------------------------------
r22787 | laksen | 2012-10-20 22:00:36 +0200 (Sa, 20 Okt 2012) | 1 line

Properly do NR_DEFAULTFLAGS detection/allocation/deallocation
------------------------------------------------------------------------
r22782 | laksen | 2012-10-20 07:44:55 +0200 (Sa, 20 Okt 2012) | 1 line

Fixed flags detections code for wide->short optimization code for Thumb-2
------------------------------------------------------------------------
r22778 | laksen | 2012-10-19 20:23:14 +0200 (Fr, 19 Okt 2012) | 1 line

Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
------------------------------------------------------------------------
r22647 | laksen | 2012-10-14 21:28:08 +0200 (So, 14 Okt 2012) | 1 line

Added register specifications to lpc1768.pp. From Joan Duran
------------------------------------------------------------------------
r22646 | laksen | 2012-10-14 21:10:20 +0200 (So, 14 Okt 2012) | 4 lines

Fixed some minor formating issues
Implemented a small heap mananger
Implemented console IO
Changed default LineEnding to CrLf(to ease console IO parsing)
------------------------------------------------------------------------
r22599 | laksen | 2012-10-09 08:58:58 +0200 (Di, 09 Okt 2012) | 1 line

Added all STM32F1 configurations
------------------------------------------------------------------------
r22597 | laksen | 2012-10-08 22:10:45 +0200 (Mo, 08 Okt 2012) | 1 line

Added initial support for the Cortex-M4F FPv4_S16 FPU
------------------------------------------------------------------------
r22596 | laksen | 2012-10-08 22:04:14 +0200 (Mo, 08 Okt 2012) | 1 line

Added FPv4_d16 FPU instructions, and a few extra registers
------------------------------------------------------------------------
r22592 | laksen | 2012-10-08 16:07:40 +0200 (Mo, 08 Okt 2012) | 2 lines

Added support for IT block merging
Added a peephole pattern check for UXTB->UXTH chains
------------------------------------------------------------------------
r22590 | laksen | 2012-10-08 14:30:00 +0200 (Mo, 08 Okt 2012) | 3 lines

Add CBNZ/CBZ instructions
Create preliminary Thumb-2 PeepHoleOptPass2 code, hacked together from the ARM mode code
Added a number of simple size optimizations for common Thumb-2 instructions
------------------------------------------------------------------------
r22582 | laksen | 2012-10-08 06:49:39 +0200 (Mo, 08 Okt 2012) | 3 lines

Fix optimizations of Thumb-2 code
Fix problem with loading of condition operand for IT instructions
Properly split IT blocks when register allocator tries to spill inside a block.
------------------------------------------------------------------------
r22581 | laksen | 2012-10-08 05:15:40 +0200 (Mo, 08 Okt 2012) | 4 lines

Fixed assembler calling command line for cpus>ARMv5TE. EDSP instructions will generate errors while assembling, due to RTL assembler routines
Updated boot code for all Cortex-M3 controllers, and sc32442b to use weak linking for exception tables.
Cortex-M3 devices now also share initialization routine to simplify maintenance
STM32F10x classes now have specific units which fit the interrupt source names and counts
------------------------------------------------------------------------
r22580 | laksen | 2012-10-08 05:10:44 +0200 (Mo, 08 Okt 2012) | 2 lines

Added support for .section, .set, .weak, and .thumb_set directive for GAS assembler reader
IFDEF'ed JVM specific assembler directives, to prevent ait_* set to exceed 32 elements
------------------------------------------------------------------------
r22579 | laksen | 2012-10-08 02:10:52 +0200 (Mo, 08 Okt 2012) | 3 lines

Remove all traces of the interrupt vector table generation mechanism
Clean up cpuinfo tables
Fixed ARMv7M bug(BLX <label> doesn't exist on that version)

git-svn-id: trunk@22792 -
 2012-10-21 08:39:52 +00:00
florian
a499a30ca9 * fixes to avx support by Torsten Grundke 
git-svn-id: trunk@22773 -
 2012-10-19 16:45:53 +00:00
florian
d7e0f07aab + UseAVX check 
git-svn-id: trunk@22642 -
 2012-10-14 14:04:31 +00:00
Jeppe Johansen
0087661fb5 Added FPv4_d16 FPU instructions, and a few extra registers 
git-svn-id: branches/laksen/arm-embedded@22596 -
 2012-10-08 20:04:14 +00:00