Commit Graph

1016 Commits

Author SHA1 Message Date
Jonas Maebe
aa82e00615 * fixed check to determine whether a record parameter can be subscripted
directly in inline assembly: that's only possible if it's a register
    parameter where the address of the record was passed (rather than the
    record itself), or if a parameter has been explicitly typecasted in
    Intel-style assembly using ".size"

git-svn-id: trunk@35959 -
2017-04-26 19:43:35 +00:00
florian
4868b83157 * do not generate always debug messages in the arm assembler optimizer
git-svn-id: trunk@35891 -
2017-04-22 09:37:18 +00:00
florian
50dba9ad66 * if both labels of a case label are equal, we still cannot skip the comparison in a jump tree, resolves #31589
git-svn-id: trunk@35880 -
2017-04-21 19:32:27 +00:00
florian
73c46a5988 - removed unused constants
git-svn-id: trunk@35664 -
2017-03-26 13:06:34 +00:00
florian
971280f082 + tarmcasenode.genjmptreeentry
git-svn-id: trunk@35649 -
2017-03-23 21:37:12 +00:00
yury
3bedccf946 * ARM scheduler need to move register de-allocs located before the instruction. Also preserve order of allocs and de-allocs.
git-svn-id: trunk@35552 -
2017-03-09 19:05:15 +00:00
yury
fe0e30030f * In ARM scheduler move all needed additional items with an instruction:
- all reg allocs and PIC labeels before the instruction;
  - all reg deallocs and reg syncs after the instruction.

  It fixes bug #31135.

git-svn-id: trunk@35545 -
2017-03-09 12:26:02 +00:00
Jonas Maebe
4c68ea1000 * use pocalls_cdecl and cstylearrayofconst more consistently instead of
ad hoc set constants containing varying number cdecl-like calling
    conventions
   o added pocall_sysv_abi_cdecl and pocall_ms_abi_cdecl to cstylearrayofconst
   o also allow C-style blocks with mwpascal instead of cdecl (mwpascal = cdecl
     with "const" = "constref" for record parameters)
   o did not touch cases related to name mangling and import/export names,
     because those are a real mess and easily break things left and right :/

git-svn-id: trunk@35479 -
2017-02-25 11:46:35 +00:00
florian
c961c72c30 * tarmtypeconvnode.first_int_to_real should call the generic method in the parent class, if soft fpu code is generated, resolves #31350
git-svn-id: trunk@35430 -
2017-02-12 16:05:13 +00:00
Jonas Maebe
015f034904 * reverted r35424, wasn't ready for commit yet
git-svn-id: trunk@35426 -
2017-02-11 21:21:44 +00:00
Jonas Maebe
4d9617da97 * fixed check to determine whether a record parameter can be subscripted
directly in inline assembly: that's only possible if it's a register
    parameter where the address of the record was passed (rather than the
    record itself)

git-svn-id: trunk@35424 -
2017-02-11 19:57:08 +00:00
florian
b41989adfa * offset of vstr/vld is limited to +/- 1020, take care of this during spilling
git-svn-id: trunk@35396 -
2017-02-04 18:42:02 +00:00
Jeppe Johansen
7e75457a3e Added more Nordic Semi controllers. Created a new unit for NRF52x controllers with a more precise register naming following Nordic SDK conventions.
Patch from Paul Mitchell.

git-svn-id: trunk@35274 -
2017-01-10 20:30:20 +00:00
Jonas Maebe
880d438704 * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
inherit from it for LLVM without a thousand ifdefs

git-svn-id: trunk@35141 -
2016-12-16 22:41:21 +00:00
Károly Balogh
f5f895e2a3 syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed
git-svn-id: trunk@35034 -
2016-12-02 09:29:09 +00:00
Jonas Maebe
a25ebbba3e + added volatility information to all memory references
o separate information for reading and writing, because e.g. in a
     try-block, only the writes to local variables and parameters are
     volatile (they have to be committed immediately in case the next
     instruction causes an exception)
   o for now, only references to absolute memory addresses are marked
     as volatile
   o the volatily information is (should be) properly maintained throughout
     all code generators for all archictures with this patch
   o no optimizers or other compiler infrastructure uses the volatility
     information yet
   o this functionality is not (yet) exposed at the language level, it
     is only for internal code generator use right now

git-svn-id: trunk@34996 -
2016-11-27 18:17:37 +00:00
Jonas Maebe
b28221349e - removed aoptcs unit and (dummy) units that used it
o remenants of a long abandoned attempt at adding a generic
     assembler CSE optimiser

git-svn-id: trunk@34886 -
2016-11-13 16:06:14 +00:00
Jonas Maebe
86876ed114 * MaybeRecordOffset: initialise "mangledname" variable
git-svn-id: trunk@34857 -
2016-11-09 19:51:36 +00:00
Jonas Maebe
74a49b5f91 * restructured the the TExternalAssembler constructors so that the
hack for the Jasmin descendent is no longer needed

git-svn-id: trunk@34852 -
2016-11-09 19:51:20 +00:00
Károly Balogh
657aa06360 arm: arm-aros syscall support
git-svn-id: trunk@34809 -
2016-11-06 14:31:42 +00:00
marcus
86940dfb32 AROS: added arm-aros target to compiler and fpcmake
git-svn-id: trunk@34805 -
2016-11-06 10:51:45 +00:00
pierre
1e9491550d nutils.pas: Add new procedure:
procedure node_change_local_switch(p : tnode;cs : tlocalswitch;enable : boolean);
    to add/remove cs local switch from all p tnode tree localsettings.

    modify second_prefetch implementation in arm, ppcgen and x86 subdirectories
    to use node_change_local_settings to temporarily disabled
    checkpointer local switch, as prefetch is allowed even on unaccessible addresses.
    (previous code was buggy because I frogot that each node has it own localswitches).

git-svn-id: trunk@34576 -
2016-09-29 21:34:34 +00:00
pierre
fe4e2956c6 Disable checkpointer call when handling left of prefetch node
git-svn-id: trunk@34559 -
2016-09-24 07:34:10 +00:00
Jonas Maebe
aa1be3276f - removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
it was AT_NONE, which is invalid and should never be used
  * explicitly pass the correct value for all calls to those methods elsewhere
    in the compiler

git-svn-id: trunk@34250 -
2016-08-05 07:09:16 +00:00
Jeppe Johansen
6a1c1e4f29 Added support for NRF52832 controllers.
git-svn-id: trunk@34170 -
2016-07-22 10:01:10 +00:00
Jonas Maebe
a0efde8167 * automatically generate necessary indirect symbols when a new assembler
symbol is defined
   o removed all places where AB_INDIRECT symbols were explicitly generated
   o only generate AB_INDIRECT symbols for AT_DATA on systems_indirect_var_imports
   o for some symbols an indirect symbol is always required (because they are
     dereferenced by code in RTL units) -> use new AT_DATA_FORCEINDIRECT type

git-svn-id: trunk@34165 -
2016-07-20 20:53:03 +00:00
Jonas Maebe
1cb8c0d00c * specify the def of assembler level symbols defined via
tasmdata.DefineAsmSymbol() and all routines that call it
   o will be used to automatically generate AB_INDIRECT sybols when
     necessary

git-svn-id: trunk@34164 -
2016-07-20 20:52:59 +00:00
Jonas Maebe
c7ea921066 * renamed thlcgobj.g_external_wrapper() into a_jmp_external_name(), and
moved the code to create the procedure start/end etc. that was at the
    call sites of g_external_wrapper() into the new g_external_wrapper()
    -> got rid of the x86-specific code in expunix, and fixed expunix for
    llvm (e.g. tests/test/tlib1{a,b})

git-svn-id: trunk@34131 -
2016-07-14 15:26:40 +00:00
yury
3c6d4f1ee2 * Removed unused vars.
git-svn-id: trunk@33308 -
2016-03-21 09:21:24 +00:00
Károly Balogh
e0c21b6f8b ARM: avoid some range check errors, while running a compiler compiled with -CR
git-svn-id: trunk@33257 -
2016-03-16 10:08:44 +00:00
Jonas Maebe
38fd0efa3b * don't conditionalise BL on ARM, because it may have to be converted to
BLX at link time
   o related to the change introduced in r32788

git-svn-id: trunk@33199 -
2016-03-06 17:44:08 +00:00
florian
cb4773432b + hardfloat directive (arm only): use hard float calling conventions regardless of the abi, resolves #29715
git-svn-id: trunk@33196 -
2016-03-06 15:47:31 +00:00
florian
c564acd378 * fix assembling of vfnm*
git-svn-id: trunk@33189 -
2016-03-06 13:33:29 +00:00
florian
e1546303f8 + enable use of vfma and friends on arm when doing fastmath optimizations
git-svn-id: trunk@33188 -
2016-03-06 13:33:27 +00:00
florian
ad71b8348e * S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers
git-svn-id: trunk@33187 -
2016-03-06 13:33:26 +00:00
florian
6207a53f5d * never allocate odd numbered single-sized registers
git-svn-id: trunk@33186 -
2016-03-06 13:33:24 +00:00
florian
d13246cea4 + handle FMA instructions in taicpu.spilling_get_operation_type
git-svn-id: trunk@33183 -
2016-03-06 13:33:18 +00:00
florian
1c067e96bf * fix VFPv4 support
git-svn-id: trunk@33182 -
2016-03-06 13:33:16 +00:00
florian
43746685a5 + fma support for arm
git-svn-id: trunk@33181 -
2016-03-06 13:33:14 +00:00
florian
73aeea73ed + VOpVMov2VOp optimization
git-svn-id: trunk@33135 -
2016-02-28 20:13:16 +00:00
florian
1266491085 o refactored some peephole optimizer code:
* updated TAOptObj.RegUsedAfterInstruction with the arm implementation and removed the arm specific implementation
  * RegLoadedWithNewValue and InstructionLoadsFromReg are now a methods of TAoptBase
  * moved RegEndOfLife to TAOptObj
* during this refactoring, fixed also TCpuAsmOptimizer.RegLoadedWithNewValue for arm regarding post/preindexed 
  memory references: those modify the register but do not load it with a new value in the sense of RegLoadedWithNewValue

git-svn-id: trunk@33000 -
2016-01-24 15:25:16 +00:00
Jeppe Johansen
017d58748f Use thumb_func flag to detect selected arm/thumb mode.
git-svn-id: trunk@32958 -
2016-01-16 11:24:38 +00:00
Jeppe Johansen
0251263234 Move some of the local reloc calculation out of aasmcpu, and into COFF and ELF writers.
git-svn-id: trunk@32867 -
2016-01-06 23:15:08 +00:00
Jeppe Johansen
1b02dd27dc Make relocation type more precise compared to output of gas.
Change and to or in case symbol in other section is not exported.

git-svn-id: trunk@32852 -
2016-01-05 07:23:20 +00:00
florian
37cb35d780 + support for the .code directive in arm inline assembler
git-svn-id: trunk@32840 -
2016-01-03 22:08:25 +00:00
florian
3f2057a2f2 * do not generate blx instructions, the generation of blx instead of bl was introduced some years ago but today it proves to be wrong: if necessary, the linker converts the bl into a blx, this is also how gcc and clang handle it
git-svn-id: trunk@32788 -
2015-12-29 13:32:21 +00:00
Jeppe Johansen
c929bb32ae Make sure to remove postfix as well when fixing thumb instructions.
git-svn-id: trunk@32787 -
2015-12-29 12:20:30 +00:00
Jeppe Johansen
4b0f4cf86a Fix some small bugs in the Thumb assembler.
git-svn-id: trunk@32785 -
2015-12-28 21:10:46 +00:00
Jeppe Johansen
9d1646e2a8 Add support for writeback in RFE and SRS instructions.
git-svn-id: trunk@32749 -
2015-12-26 23:53:11 +00:00
Jeppe Johansen
803f402bf8 Fix minor bug in peephole optimizer.
git-svn-id: trunk@32748 -
2015-12-26 23:51:08 +00:00