Commit Graph

50726 Commits

Author SHA1 Message Date
svenbarth
c349151504 + add test for array constructors
git-svn-id: trunk@36104 -
2017-05-04 21:59:49 +00:00
svenbarth
1aa80f77cb - remove no longer needed global variable allow_array_constructor
git-svn-id: trunk@36103 -
2017-05-04 21:58:14 +00:00
svenbarth
6d512ddac7 * allow nested array constructors inside normal code blocks (body & except)
git-svn-id: trunk@36102 -
2017-05-04 21:56:33 +00:00
svenbarth
8f4ef91efb * tarrayconstructornode: force conversion to set if there's a range node in the tree
git-svn-id: trunk@36101 -
2017-05-04 21:55:12 +00:00
svenbarth
bdef19fd79 * indeed allow the conversion of array constructors to dynamic arrays
git-svn-id: trunk@36100 -
2017-05-04 21:54:27 +00:00
svenbarth
82b2d22ed6 * keep track of allow_array_constructor as part of the array constructor node
git-svn-id: trunk@36099 -
2017-05-04 21:52:21 +00:00
svenbarth
dfc23da06c * tassignmentnode.pass_typecheck: also allow "dynarray := []" in addition to "dynarray := nil"
git-svn-id: trunk@36098 -
2017-05-04 21:40:37 +00:00
svenbarth
c6f19b9888 * create_for_in_loop: if there's a choice between iterating an array and a set then prefer the set for backwards compatibility
git-svn-id: trunk@36097 -
2017-05-04 21:38:00 +00:00
svenbarth
a8b1d340c7 * create_for_in_loop: explicitely convert "for ... in [] do" to a nothing-node including an unreachable code warning (avoids code conversions that are for naught anyway)
git-svn-id: trunk@36096 -
2017-05-04 21:37:12 +00:00
svenbarth
df893b4a30 * implement a type conversion from an array constructor to a dynamic array
git-svn-id: trunk@36095 -
2017-05-04 21:34:38 +00:00
svenbarth
6e31a7ac83 + add an overload to arrayconstructor_to_set that allows it to be used without the passed in node being freed
git-svn-id: trunk@36094 -
2017-05-04 21:30:52 +00:00
svenbarth
cc5e3fdee9 + add utility function arrayconstructor_can_be_set which uses similar code to arrayconstructor_to_set to check whether an array constructor has even a chance to be converted to a set
git-svn-id: trunk@36093 -
2017-05-04 21:28:03 +00:00
pierre
6c43882cf5 Allow compilation with -Sfnothreading
git-svn-id: trunk@36092 -
2017-05-04 21:18:22 +00:00
svenbarth
b1c66dee9b + tarrayconstructornode: add utility method has_range_node to check whether the array constructor node tree contains any range node
git-svn-id: trunk@36091 -
2017-05-04 21:16:47 +00:00
svenbarth
4a2266ac44 * tarrayconstructornode.pass_typecheck: set elementdef of the arraydef only after the arrayoptions are changed
git-svn-id: trunk@36090 -
2017-05-04 21:03:33 +00:00
svenbarth
5f8135dd84 * tarraydef.setelementdef: don't call size for array constructors as they'll only have one once they're converted to dynamic arrays
git-svn-id: trunk@36089 -
2017-05-04 20:57:06 +00:00
joost
16b44b0719 * Allow longer package-names as fpmake-dependencies. Addins could have longer names
git-svn-id: trunk@36088 -
2017-05-04 20:21:27 +00:00
nickysn
aa93259463 + support the lahf,fstsw and fnstsw instructions in
TX86AsmOptimizer.RegLoadedWithNewValue

git-svn-id: trunk@36087 -
2017-05-04 16:02:01 +00:00
yury
2ae3ce79bb * ARM: Never use the "BLX label" instruction. Use "BL label" instead.
The linker will always change BL to BLX if necessary, but not vice versa (linker version dependent).
  "BLX label" ALWAYS changes the instruction set. It changes a processor in ARM state to Thumb state,
  or a processor in Thumb state to ARM state.

git-svn-id: trunk@36086 -
2017-05-04 15:55:55 +00:00
Mattias Gaertner
a358fec12b pastojs: use UsesClause instead of UsesList
git-svn-id: trunk@36085 -
2017-05-04 15:54:42 +00:00
Mattias Gaertner
91ed2c4d9d fcl-passrc: resolver type alias with dotted unit name
git-svn-id: trunk@36084 -
2017-05-04 15:54:12 +00:00
nickysn
92cc447326 + support the aam instruction in TX86AsmOptimizer.RegLoadedWithNewValue
git-svn-id: trunk@36083 -
2017-05-04 15:34:48 +00:00
nickysn
2431b1fa19 + support the lodsb,lodsw,lodsd and lodsq instructions in
TX86AsmOptimizer.RegLoadedWithNewValue

git-svn-id: trunk@36082 -
2017-05-04 15:12:37 +00:00
nickysn
6b7593d7d0 + support the SETcc instructions in TX86AsmOptimizer.RegLoadedWithNewValue
git-svn-id: trunk@36081 -
2017-05-04 14:43:18 +00:00
nickysn
0cd70844f1 + take into account the fact that lea doesn't read the segment register of its
reference in i386's TCpuAsmOptimizer.RegReadByInstruction

git-svn-id: trunk@36080 -
2017-05-04 14:13:53 +00:00
nickysn
e10f184b74 + support lds,les,lfs,lgs and lss in TX86AsmOptimizer.RegLoadedWithNewValue
git-svn-id: trunk@36079 -
2017-05-04 14:08:36 +00:00
nickysn
9b7a8f0da5 + take into account the x86 segment register in TAOptBase.RegInRef
git-svn-id: trunk@36078 -
2017-05-04 14:08:00 +00:00
nickysn
eac74f5a81 + support the cwd,cdq,cqo and cbw instructions in
TX86AsmOptimizer.RegLoadedWithNewValue (cwde and cdqe don't need special
  support)

git-svn-id: trunk@36077 -
2017-05-04 12:15:40 +00:00
yury
95094e9a8f * Removed unused vars.
git-svn-id: trunk@36073 -
2017-05-04 10:38:49 +00:00
joost
50fea20003 * Add FPMake-plugin dependencies to unit path + test
git-svn-id: trunk@36072 -
2017-05-03 20:34:55 +00:00
nickysn
987cf2a9cf * fixed a bug in the maxqword check in the Rol/RorQWord(maxqword,x)->maxqword
optimization, which prevented the optimization from ever being performed. This
  should also fix the test failure of tbs/tb0627b.pp on all 64-bit platforms.

git-svn-id: trunk@36071 -
2017-05-03 15:32:48 +00:00
Mattias Gaertner
8ad6588e46 pastojs: fixed tests
git-svn-id: trunk@36070 -
2017-05-03 15:26:22 +00:00
Mattias Gaertner
bf9dffbaf8 fcl-passrc: pasresolver: resolve dotted unit names and default program namespace
git-svn-id: trunk@36069 -
2017-05-03 15:26:06 +00:00
nickysn
1a139b951d + properly support the one operand version of imul and mul in
TX86AsmOptimizer.RegLoadedWithNewValue

git-svn-id: trunk@36068 -
2017-05-03 15:07:21 +00:00
nickysn
65960048c8 * fixed TX86AsmOptimizer.RegLoadedWithNewValue for 3-operand imul, where the
second operand is a memory reference

git-svn-id: trunk@36067 -
2017-05-03 13:43:16 +00:00
nickysn
1f5aec6d3d + make use of the Reg1WriteOverwritesReg2Entirely and Reg1ReadDependsOnReg2
instead of SuperRegistersEqual in TX86AsmOptimizer.RegLoadedWithNewValue, so
  it returns correct information for the 16-bit and 8-bit subregisters
  (including AH,BH,CH and DH)

git-svn-id: trunk@36066 -
2017-05-03 12:14:30 +00:00
nickysn
c096b1fe6b * fixed the debug output, generated by -dDEBUG_INSTRUCTIONREGISTERDEPENDENCIES
for x86 instructions, entered via inline assembler, using intel syntax
  (the low level optimizer isn't normally run on them, so it doesn't matter that
  InstructionLoadsFromReg and similar functions don't work on them, but with
  -dDEBUG_INSTRUCTIONREGISTERDEPENDENCIES it is much more convenient for
  debugging purposes to have correct data for them, because you can enter
  instructions manually and see how these functions behave)

git-svn-id: trunk@36065 -
2017-05-03 10:14:35 +00:00
florian
bfca9d3477 * avr I/O space is always shifted by 32 bytes in memory
git-svn-id: trunk@36064 -
2017-05-02 19:51:22 +00:00
florian
39b7f1bffe * do not write assembler optimizer debug output in avr assembler files
git-svn-id: trunk@36063 -
2017-05-02 19:50:37 +00:00
michael
6d4d053744 * Correct bugtraq url
git-svn-id: trunk@36062 -
2017-05-02 17:17:12 +00:00
michael
dff39e9ecb * Fix test case
git-svn-id: trunk@36060 -
2017-05-02 14:03:56 +00:00
nickysn
881cb790a9 + added tests that check side effect removal behaviour for the simplifications
added/changed today

git-svn-id: trunk@36053 -
2017-05-01 21:01:26 +00:00
nickysn
7821d729cd + a very basic test for correctness for the various simplifications, implemented
today. It does not check for side effects and thus it should work at any
  optimization level, regardless of whether each optimization is done or not.

git-svn-id: trunk@36048 -
2017-05-01 20:17:07 +00:00
nickysn
f65f0b125a + optimize sar(0,x) to 0 and sar(-1,x) to -1
git-svn-id: trunk@36044 -
2017-05-01 19:12:04 +00:00
nickysn
c028362f31 * added the missing pop directive after the push directive in handle_const_rox
git-svn-id: trunk@36043 -
2017-05-01 18:25:01 +00:00
nickysn
855cd616f0 + optimize rol(0, x) and ror(0, x) to 0; also optimize the case with all ones,
e.g. rol32(ffffffff, x) = ffffffff, etc.

git-svn-id: trunk@36042 -
2017-05-01 18:19:49 +00:00
nickysn
de1e0c405e + optimize '0 shl x' and '0 shr x' to 0
git-svn-id: trunk@36041 -
2017-05-01 18:16:38 +00:00
nickysn
546e993c25 * use resultdef for the type of the resulting zero const from the '0*x' and
'0 and x' optimization

git-svn-id: trunk@36040 -
2017-05-01 18:11:12 +00:00
nickysn
f26a844b19 * only do the '0*x' and '0 and x' optimization if x has no side effects (except
at -O4, where it is done regardless of whether there are side effects or not)

git-svn-id: trunk@36039 -
2017-05-01 17:34:19 +00:00
Mattias Gaertner
142d95e0d2 pastojs: implemented SetLength(string,int)
git-svn-id: trunk@36037 -
2017-05-01 14:36:30 +00:00