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342 Commits

Author SHA1 Message Date
nickysn
66462fec68 - removed taddressmode from the Z80 code generator - it's a leftover from AVR that doesn't apply to the Z80 
git-svn-id: branches/z80@44756 -
 2020-04-17 23:01:13 +00:00
nickysn
53de231c23 + added the instruction opcode information strings to the compiler instruction table 
git-svn-id: branches/z80@44755 -
 2020-04-17 22:57:18 +00:00
nickysn
be095914ec + created and included an Z80 instruction table 
git-svn-id: branches/z80@44753 -
 2020-04-17 22:47:15 +00:00
nickysn
3ab0f3a93f + added a toperandtype enum, containing all the operand types of Z80 
git-svn-id: branches/z80@44752 -
 2020-04-17 22:04:54 +00:00
nickysn
1f5a1f8c28 + added DJNZ to the set of jmp instructions 
git-svn-id: branches/z80@44750 -
 2020-04-17 19:30:44 +00:00
nickysn
f307f6954f * formatting 
git-svn-id: branches/z80@44744 -
 2020-04-17 02:32:14 +00:00
nickysn
962e339ec4 + TZ80AddNode.NoEqual 
git-svn-id: branches/z80@44731 -
 2020-04-16 03:57:21 +00:00
nickysn
6b74573677 + added a nodetype parameter to TZ80AddNode.GetResFlags 
git-svn-id: branches/z80@44730 -
 2020-04-16 03:16:18 +00:00
nickysn
2e6b36f57d + initialize some common variables in TZ80AddNode.second_cmp16_32_64bit 
git-svn-id: branches/z80@44729 -
 2020-04-16 03:11:35 +00:00
nickysn
f9e4f7b19b + introduced a TZ80AddNode.second_cmp16_32_64bit method, not implemented for now 
git-svn-id: branches/z80@44728 -
 2020-04-15 23:38:40 +00:00
nickysn
90e2b9ecc6 + implemented tcgz80.g_flags2reg 
git-svn-id: branches/z80@44696 -
 2020-04-12 02:21:03 +00:00
nickysn
00f7fad1a6 + support pushing word-sized parameters in tcgz80.a_load_ref_cgpara 
git-svn-id: branches/z80@44695 -
 2020-04-11 21:29:28 +00:00
nickysn
87258f4004 - removed unused local vars of tcgz80.g_concatcopy 
git-svn-id: branches/z80@44693 -
 2020-04-11 21:18:36 +00:00
nickysn
26e93d1e02 - removed unused method tcgz80.g_concatcopy_move 
git-svn-id: branches/z80@44692 -
 2020-04-11 21:17:20 +00:00
nickysn
c6a066495a + implemented tcgz80.g_concatcopy in the general case, using the ldir instruction 
git-svn-id: branches/z80@44691 -
 2020-04-11 21:15:55 +00:00
nickysn
1f8c1c1346 + implemented more ref cases in tcgz80.a_loadaddr_ref_reg 
git-svn-id: branches/z80@44690 -
 2020-04-11 16:44:51 +00:00
nickysn
472bc6c936 + support symbol+base/index in tcgz80.a_loadaddr_ref_reg 
git-svn-id: branches/z80@44683 -
 2020-04-11 01:19:13 +00:00
nickysn
4e5eb7fa4e + implemented tcgz80.a_loadaddr_ref_reg for symbol references 
git-svn-id: branches/z80@44682 -
 2020-04-11 01:00:46 +00:00
nickysn
ca77f07013 * fixed offset to procedure/function parameters 
git-svn-id: branches/z80@44674 -
 2020-04-09 23:48:47 +00:00
nickysn
e8cecafffa + implemented g_concatcopy for 1-byte copies from (IX+d)/(IY+d)/(HL) to (IX+d)/(IY+d)/(HL) 
git-svn-id: branches/z80@44673 -
 2020-04-09 23:37:27 +00:00
nickysn
5aca5937e6 - cleaned up unused local variables and procedures from tcgz80.a_op_const_reg_internal and tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@44670 -
 2020-04-09 22:01:07 +00:00
nickysn
0e257a2c9f - removed 2 unnecessary instructions for 8-bit OP_ROL/OP_ROR in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@44669 -
 2020-04-09 21:56:45 +00:00
nickysn
eb3c4546ab + implemented OP_SHL/OP_SHR/OP_SAR/OP_ROL/OP_ROR in tcgz80.a_op_const_reg_internal 
git-svn-id: branches/z80@44668 -
 2020-04-09 21:52:45 +00:00
nickysn
51e6a3f45b + implemented OP_SHL/OP_SHR/OP_SAR/OP_ROL/OP_ROR in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@44665 -
 2020-04-09 21:14:23 +00:00
nickysn
eb26cd55d4 + implemented OP_XOR in tcgz80.a_op_const_reg_internal 
git-svn-id: branches/z80@44661 -
 2020-04-09 14:29:56 +00:00
nickysn
7a86d193cc + implemented OP_OR in tcgz80.a_op_const_reg_internal 
git-svn-id: branches/z80@44660 -
 2020-04-09 14:24:36 +00:00
nickysn
f00f39abef + implemented OP_AND in tcgz80.a_op_const_reg_internal 
git-svn-id: branches/z80@44659 -
 2020-04-09 14:21:57 +00:00
nickysn
5360770ed2 + implemented OP_SUB in tcgz80.a_op_const_reg_internal 
git-svn-id: branches/z80@44658 -
 2020-04-09 13:41:28 +00:00
nickysn
75a2f0352e * fixed 64-bit OP_ADD in tcgz80.a_op_const_reg_internal 
git-svn-id: branches/z80@44657 -
 2020-04-09 13:28:22 +00:00
nickysn
a419018ff0 + handle fromsize>tosize in tcgz80.a_load_reg_reg 
git-svn-id: branches/z80@44656 -
 2020-04-09 13:23:10 +00:00
nickysn
ce56125e40 + implemented OP_ADD in tcgz80.a_op_const_reg_internal 
git-svn-id: branches/z80@44655 -
 2020-04-09 13:16:48 +00:00
nickysn
62cc60d081 * use register L for returning 8-bit values, DEHL for 32-bit values (SDCC-compatible) 
git-svn-id: branches/z80@44654 -
 2020-04-09 00:11:39 +00:00
nickysn
3c8ed1cfbc * use 8-bit registers for the function return regs 
git-svn-id: branches/z80@44653 -
 2020-04-09 00:07:20 +00:00
nickysn
b896d2fea2 + implemented sign extension in tcgz80.a_load_reg_ref 
git-svn-id: branches/z80@44652 -
 2020-04-08 23:59:58 +00:00
nickysn
6fea99ac9d + implemented sign extension in tcgz80.a_load_ref_reg 
git-svn-id: branches/z80@44651 -
 2020-04-08 23:57:26 +00:00
nickysn
df59c070a1 + implemented sign extension in tcgz80.a_load_reg_reg 
git-svn-id: branches/z80@44650 -
 2020-04-08 23:50:14 +00:00
nickysn
b84bcdaeee + implemented unsigned int extension in tcgz80.a_load_ref_reg 
git-svn-id: branches/z80@44648 -
 2020-04-08 22:30:35 +00:00
nickysn
d0166242b3 + support unsigned sign extension in tcgz80.a_load_reg_reg 
git-svn-id: branches/z80@44646 -
 2020-04-08 20:23:16 +00:00
nickysn
7d9658e2ba + support unsigned expansion in tcgz80.a_load_reg_ref 
git-svn-id: branches/z80@44645 -
 2020-04-08 20:12:17 +00:00
nickysn
5e94fbff54 + added method make_simple_ref (empty for now, but will be implemented later) 
git-svn-id: branches/z80@44640 -
 2020-04-07 23:12:33 +00:00
nickysn
7fd807905f + initial implementation of pushing ref params in tcgz80.a_load_ref_cgpara 
git-svn-id: branches/z80@44639 -
 2020-04-07 22:55:33 +00:00
nickysn
c53cd30e7f + implemented tcgz80.a_load_reg_cgpara for pushing 1-byte parameters on the stack 
git-svn-id: branches/z80@44638 -
 2020-04-07 22:34:05 +00:00
nickysn
4fc83a44d3 + implemented byte-sized inc/dec by 1 in tcgz80.a_op_const_reg_internal 
git-svn-id: branches/z80@44631 -
 2020-04-07 01:03:02 +00:00
nickysn
0d04d198fe + emit warnings for unimplemented ops in tcgz80.a_op_const_reg_internal 
git-svn-id: branches/z80@44630 -
 2020-04-07 00:55:54 +00:00
nickysn
b2549b63cd * implemented pop_parasize for the Z80 and declared stdcall to be a clearstack pocall on this arch 
git-svn-id: branches/z80@44629 -
 2020-04-07 00:07:34 +00:00
nickysn
472ac716b7 * mark the 8-bit versions of the registers as volatile when calling procedures/functions 
git-svn-id: branches/z80@44628 -
 2020-04-06 23:31:20 +00:00
nickysn
f15b54085c * fixed tcgz80.a_load_const_cgpara for pushing params on the stack 
git-svn-id: branches/z80@44627 -
 2020-04-06 23:15:00 +00:00
nickysn
fe20a00711 * don't typecast the const to aint in taicpu.op_const_reg and .op_reg_const, because, on the Z80, aint 
is 8-bit (we treat it as having an 8-bit ALU), but it also has 16-bit instructions and registers,
  that can take 16-bit consts

git-svn-id: branches/z80@44626 -
 2020-04-06 23:12:02 +00:00
nickysn
3e3a392d88 * z80 regdat files regenerated 
git-svn-id: branches/z80@44625 -
 2020-04-06 22:49:05 +00:00
nickysn
d8ca077c33 + add externals as .globl directives in the sdcc-sdasz80 assembler output 
git-svn-id: branches/z80@44587 -
 2020-04-04 23:15:57 +00:00
nickysn
c0b4e5c994 - removed the unused 's: topsize' parameter to TSdccSdasZ80Assembler.WriteOper 
git-svn-id: branches/z80@44586 -
 2020-04-04 23:04:35 +00:00
nickysn
1b06b649a7 * use is_calljmp to determine whether to use WriteOper_jmp in the sdcc-sdasz80 asm writer. This fixes 
asm output for call instructions.

git-svn-id: branches/z80@44585 -
 2020-04-04 23:03:13 +00:00
nickysn
fdc24164a0 + implemented 8-bit signed comparisons as well 
git-svn-id: branches/z80@44583 -
 2020-04-04 20:59:52 +00:00
nickysn
8a1be73ce0 * also use the unsigned 8-bit comparison code for 8-bit signed equal/unequal comparisons 
git-svn-id: branches/z80@44582 -
 2020-04-04 20:28:53 +00:00
nickysn
55c18a11a0 - removed commented out code from TZ80AddNode.second_cmp 
git-svn-id: branches/z80@44581 -
 2020-04-04 20:16:11 +00:00
nickysn
9dc8744b53 - removed debug writeln 
git-svn-id: branches/z80@44580 -
 2020-04-04 20:15:10 +00:00
nickysn
59d7a45215 * generate more optimal code for unsigned 8-bit comparisons in TZ80AddNode.second_cmp 
git-svn-id: branches/z80@44579 -
 2020-04-04 20:14:31 +00:00
nickysn
5585bdb6aa + also support unsigned 8-bit > and <= in TZ80AddNode.second_cmp. All 8-bit unsigned comparisons now 
work.

git-svn-id: branches/z80@44576 -
 2020-04-04 17:49:13 +00:00
nickysn
f52f9dc56b + added a not-yet-complete implementation of TZ80AddNode.second_cmp. Only 8-bit unsigned comparison 
works for now, and only for the <,= and <> operators

git-svn-id: branches/z80@44575 -
 2020-04-04 17:15:31 +00:00
nickysn
3ed692a157 + implemented tcgz80.a_jmp_flags 
git-svn-id: branches/z80@44574 -
 2020-04-04 17:07:54 +00:00
nickysn
ff655543ed + support conditional jumps in the sdcc-sdasz80 assembler writer 
git-svn-id: branches/z80@44573 -
 2020-04-04 17:05:49 +00:00
nickysn
d05a632616 + write jump operands (not all forms supported yet) in the sdcc-sdasz80 asm output 
git-svn-id: branches/z80@44572 -
 2020-04-04 16:59:14 +00:00
nickysn
fb3a079916 * updated TAsmCond and TResFlags for the Z80 
git-svn-id: branches/z80@44571 -
 2020-04-04 16:12:47 +00:00
nickysn
99e304165e * fix for 64-bit OP_AND/OP_OR/OP_XOR in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@44570 -
 2020-04-04 15:33:01 +00:00
nickysn
c0b3eb70ac + fix for 64-bit OP_NOT in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@44569 -
 2020-04-04 15:30:43 +00:00
nickysn
5b8fd51b3a + implemented OP_NEG in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@44568 -
 2020-04-04 15:27:28 +00:00
nickysn
a362c3247d + added instruction encoding info for all the remaining Z80 instructions 
git-svn-id: branches/z80@44567 -
 2020-04-04 13:49:07 +00:00
nickysn
c5aa1193bf + started describing the instructions encoding 
git-svn-id: branches/z80@44558 -
 2020-04-04 02:35:15 +00:00
nickysn
4027ad18e0 + added strict validation for the param types in z80ins.dat 
git-svn-id: branches/z80@44557 -
 2020-04-04 02:11:20 +00:00
nickysn
20eab5582f + generate the Z80 instruction enum and string table from z80ins.dat via a newly created tool 
git-svn-id: branches/z80@44556 -
 2020-04-04 01:36:07 +00:00
nickysn
565cc0e96b + created a parseable Z80 instruction description file, very loosely based on x86ins.dat. Parser not 
implemented yet, but will be soon.

git-svn-id: branches/z80@44554 -
 2020-04-04 00:21:50 +00:00
nickysn
9309e2c42e * replace 'add/adc/sub/sbc/and/or/xor/cp orgreg' with 'add/adc/sub/sbc/and/or/xor/cp spilltemp' in 
trgcpu.do_spill_replace

git-svn-id: branches/z80@44553 -
 2020-04-03 22:42:02 +00:00
nickysn
e43834c5d0 * replace 'inc/dec orgreg' with 'inc/dec spilltemp' in trgcpu.do_spill_replace 
git-svn-id: branches/z80@44552 -
 2020-04-03 22:19:40 +00:00
nickysn
9d545342f8 * replace 'add/adc/sub/sbc/and/or/xor/cp A,orgreg' with 'add/adc/sub/sbc/and/or/xor/cp A,spilltemp' in trgcpu.do_spill_replace 
git-svn-id: branches/z80@44537 -
 2020-04-03 20:05:42 +00:00
nickysn
a58bab4318 + replace 'ld orgreg,const' with 'ld spilltemp,const' in trgcpu.do_spill_replace 
git-svn-id: branches/z80@44536 -
 2020-04-03 19:47:47 +00:00
nickysn
fe3f4a7447 * fixes in trgcpu.do_spill_replace 
git-svn-id: branches/z80@44535 -
 2020-04-03 19:41:39 +00:00
nickysn
8ceee70912 * range check for spilltemp.offset in [-128..127], not [0..63] in trgcpu.do_spill_replace for Z80 
git-svn-id: branches/z80@44534 -
 2020-04-03 19:32:10 +00:00
nickysn
8291d24b7f * fix comment 
git-svn-id: branches/z80@44533 -
 2020-04-03 18:53:52 +00:00
nickysn
bf8d560cc6 * treat all Z80 registers as 8-bit 
git-svn-id: branches/z80@44532 -
 2020-04-03 18:53:10 +00:00
nickysn
5ddd0dd9b8 + implemented a_load_const_ref for more efficient Z80 code generation for const assignment to local variables 
git-svn-id: branches/z80@44528 -
 2020-04-03 02:23:05 +00:00
nickysn
4fe04ac53a * write references of the type (IX+const), (IY+const) as const(IX) or const(IY), since that appears to 
be what sdcc-sdasz80 accepts

git-svn-id: branches/z80@44527 -
 2020-04-03 01:33:41 +00:00
nickysn
4099c0eed8 + initial implementation (not working yet) for spilling_create_store and spilling_create_load for Z80 
git-svn-id: branches/z80@44526 -
 2020-04-03 01:03:49 +00:00
nickysn
e04d2acd6c + emit references with negative offsets correctly in the sdcc-sdasz80 asm output 
git-svn-id: branches/z80@44525 -
 2020-04-03 00:54:22 +00:00
nickysn
4de1d5a8bf + Z80 stackframe generation 
git-svn-id: branches/z80@44524 -
 2020-04-03 00:15:24 +00:00
nickysn
574fea7e63 + ait_tempalloc asm output for sdcc-sdasz80 
git-svn-id: branches/z80@44523 -
 2020-04-02 23:29:52 +00:00
nickysn
65efc495af + add edges to disallow the use of the 8-bit subregisters of IX, IY and SP 
git-svn-id: branches/z80@44513 -
 2020-04-02 02:28:14 +00:00
nickysn
20cd3a6d1b - removed GetLoad and GetStore from tcgz80. These came from AVR and I don't think they would be useful 
for Z80.

git-svn-id: branches/z80@44512 -
 2020-04-02 02:20:34 +00:00
nickysn
c02fc4a49f * fixed OP_NOT in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@44511 -
 2020-04-02 02:14:21 +00:00
nickysn
052313d649 * fixed OP_AND,OP_OR,OP_XOR in tcgz80.a_op_reg_reg_internal 
git-svn-id: branches/z80@44510 -
 2020-04-02 02:04:18 +00:00
nickysn
d7675c6c81 + support line info (-al) in the sdcc-sdasz80 asm output 
git-svn-id: branches/z80@44509 -
 2020-04-02 01:19:17 +00:00
nickysn
cae1865f32 * fixes for OP_ADD and OP_SUB in a_op_reg_reg_internal. The destination of add/adc/sub/sbc can only be 
register NR_A.

git-svn-id: branches/z80@44508 -
 2020-04-02 01:10:52 +00:00
nickysn
d26b5199c8 + implemented a_load_ref_reg for fromsize=tosize for z80 
git-svn-id: branches/z80@44507 -
 2020-04-02 01:01:58 +00:00
nickysn
3893baabd8 + output nothing for ait_stab, ait_force_line and ait_function_name in the sdcc-sdasz80 asm writer 
git-svn-id: branches/z80@44506 -
 2020-04-02 00:50:49 +00:00
nickysn
065a0d44d8 * tcg64favr renamed tcg64fz80 
git-svn-id: branches/z80@44504 -
 2020-04-01 23:32:02 +00:00
nickysn
fc80874e63 + implemented a_load_reg_reg for z80 for fromsize=tosize 
git-svn-id: branches/z80@44502 -
 2020-04-01 22:43:10 +00:00
nickysn
662ca13f51 * use register NR_A in a_load_reg_ref for z80 
git-svn-id: branches/z80@44501 -
 2020-04-01 22:40:02 +00:00
nickysn
54097433da + implemented cgsize2subreg for z80 
git-svn-id: branches/z80@44500 -
 2020-04-01 22:29:33 +00:00
nickysn
c3ac9d06c8 + support ait_datablock in the sdcc-sdasz80 asm output 
git-svn-id: branches/z80@44499 -
 2020-04-01 22:13:47 +00:00
nickysn
fbadb3519f + implemented a_load_reg_ref for equal sized args for z80 
git-svn-id: branches/z80@44498 -
 2020-04-01 22:08:46 +00:00
nickysn
fe5daf3d2f + initial implementation of top_ref reference output for sdcc-sdasz80 
git-svn-id: branches/z80@44497 -
 2020-04-01 22:08:22 +00:00
nickysn
b1ea62f5f6 + implemented ait_regalloc asm output for sdcc-sdasz80 
git-svn-id: branches/z80@44491 -
 2020-04-01 19:05:22 +00:00
nickysn
b486e6b353 * define R_SUBWHOLE = R_SUBW for Z80 
git-svn-id: branches/z80@44490 -
 2020-04-01 18:53:05 +00:00
nickysn
f87c837afe + implemented a_load_const_reg 
git-svn-id: branches/z80@44489 -
 2020-04-01 18:22:41 +00:00
nickysn
aeedb0022d + initial implementation of operand writing (registers and constants only for now) 
git-svn-id: branches/z80@44488 -
 2020-04-01 18:15:13 +00:00
nickysn
36a26a53ae + emit warning comments in the asm output for the unimplemented methods in cgcpu 
git-svn-id: branches/z80@44487 -
 2020-04-01 17:16:56 +00:00
nickysn
2003020d68 + emit lowercase instructions in the z80 asm output 
git-svn-id: branches/z80@44486 -
 2020-04-01 14:09:44 +00:00
nickysn
050244e5f0 + emit a ret instruction at the end of functions 
git-svn-id: branches/z80@44485 -
 2020-04-01 14:05:00 +00:00
nickysn
03ea93de87 + write eol after each instruction 
git-svn-id: branches/z80@44484 -
 2020-04-01 14:04:20 +00:00
nickysn
dc1ff00418 * fixed register number of IX 
git-svn-id: branches/z80@44483 -
 2020-04-01 13:36:59 +00:00
nickysn
d682df8bcd + implemented ait_instruction at least for instructions without operands 
git-svn-id: branches/z80@44476 -
 2020-04-01 02:19:46 +00:00
nickysn
1d3f14f769 + implemented ait_align asm output for sdcc-sdasz80 
git-svn-id: branches/z80@44475 -
 2020-04-01 00:39:08 +00:00
nickysn
26549ed045 * use the :: and == operators to declare global labels, instead of .globl 
git-svn-id: branches/z80@44473 -
 2020-03-31 21:59:56 +00:00
nickysn
4bc09f91cb + initial support for ait_section 
git-svn-id: branches/z80@44472 -
 2020-03-31 21:09:50 +00:00
nickysn
b0f2902e51 + support ait_symbol with value 
git-svn-id: branches/z80@44468 -
 2020-03-31 19:45:09 +00:00
nickysn
58c4fb8db1 + simplified adding the trailing : character when writing an ait_symbol for sdcc-sdasz80 
git-svn-id: branches/z80@44467 -
 2020-03-31 19:42:39 +00:00
nickysn
bbc8629b39 - removed commented out code for handling case insensitive assemblers, because sdcc-sdasz80 is case sensitive by default 
git-svn-id: branches/z80@44466 -
 2020-03-31 19:40:18 +00:00
nickysn
a670e04a3f + emit a .globl directive for global ait_symbols 
git-svn-id: branches/z80@44465 -
 2020-03-31 19:37:11 +00:00
nickysn
6159b34608 * capitalize idtxt of z80asm, so it can be selected with -Az80asm 
git-svn-id: branches/z80@44459 -
 2020-03-31 19:31:18 +00:00
nickysn
f3b9088d98 + emit .globl for AB_GLOBAL labels 
git-svn-id: branches/z80@44453 -
 2020-03-31 00:48:03 +00:00
nickysn
a4127ce3ab * get rid of EscapeLabel, since sdcc-sdasz80 doesn't seem to need it 
git-svn-id: branches/z80@44452 -
 2020-03-31 00:35:05 +00:00
nickysn
a38917f471 * fix missing comma in the middle of 64-bit ait_consts 
git-svn-id: branches/z80@44451 -
 2020-03-31 00:31:46 +00:00
nickysn
416511e245 + support aitconst_uleb128bit and aitconst_sleb128bit 
git-svn-id: branches/z80@44450 -
 2020-03-31 00:30:00 +00:00
nickysn
ca1fd28ac1 * set unsupported constants to FIXME in the ait_const2str table 
* fix ait_const_16bit_unaligned

git-svn-id: branches/z80@44448 -
 2020-03-30 23:59:41 +00:00
nickysn
c1888dd6e2 + support 32-bit and 64-bit ait_consts 
git-svn-id: branches/z80@44447 -
 2020-03-30 23:54:39 +00:00
nickysn
8589227fb0 * some ait_string and ait_const asm output fixes for sdcc-sdasz80 
git-svn-id: branches/z80@44446 -
 2020-03-30 23:39:53 +00:00
nickysn
377f52ee69 + started work on the sdcc-sdasz80 asm backend 
git-svn-id: branches/z80@44445 -
 2020-03-30 23:31:04 +00:00
nickysn
e8bca88dad + output nothing for ait_symbol_end 
git-svn-id: branches/z80@44425 -
 2020-03-30 02:25:58 +00:00
nickysn
b91269b821 + output unsupported aligns as comments (I don't think z80asm supports an align directive) 
git-svn-id: branches/z80@44424 -
 2020-03-30 02:24:27 +00:00
nickysn
c8ec4731e1 * indentation fix 
git-svn-id: branches/z80@44423 -
 2020-03-30 02:13:42 +00:00
nickysn
086ae1fc29 + perform some character escaping on the labels, because z80asm doesn't seem to like e.g. dollar signs in labels 
git-svn-id: branches/z80@44422 -
 2020-03-30 02:12:24 +00:00
nickysn
7bf31b0c26 + z80asm output for ait_const (8 and 16-bit only for now) and ait_symbol 
git-svn-id: branches/z80@44421 -
 2020-03-30 02:03:54 +00:00
nickysn
70d14c3c78 + implement ait_string for z80asm 
git-svn-id: branches/z80@44419 -
 2020-03-30 01:18:21 +00:00
nickysn
f8733f42c9 + started working on the z80 assembler writer - produce comments, labels and comments with unsupported asm objects 
git-svn-id: branches/z80@44418 -
 2020-03-30 01:02:28 +00:00
nickysn
ce424f2954 + added the OUTI instruction 
git-svn-id: branches/z80@44417 -
 2020-03-30 00:45:13 +00:00
nickysn
b3d1003f7e * TZ80GNUAssembler renamed TZ80AsmAssembler, because it targets the "z80asm" assembler 
git-svn-id: branches/z80@44411 -
 2020-03-29 22:24:42 +00:00
nickysn
7050d7a376 - removed the -mmcu= command line option from z80asm 
git-svn-id: branches/z80@44410 -
 2020-03-29 22:09:56 +00:00
nickysn
943d0cbbe2 * use the generic code of tcg.getintregister, which supports 8-bit CPUs after merging trunk 
git-svn-id: branches/z80@44398 -
 2020-03-29 17:04:49 +00:00
nickysn
755fe97c51 * synchronize with trunk 
git-svn-id: branches/z80@44397 -
 2020-03-29 16:24:32 +00:00
florian
9a4ff8daa4 * started to get some Z80 things working 
git-svn-id: branches/z80@44284 -
 2020-03-08 11:43:38 +00:00
florian
8a99a619f8 + addnode dummy for Z80 
git-svn-id: branches/z80@39796 -
 2018-09-23 16:45:54 +00:00
florian
e370e9ba15 * register names fixed 
git-svn-id: branches/z80@35670 -
 2017-03-27 20:30:51 +00:00
florian
ea52a23179 + skeleton for Z80 support 
git-svn-id: branches/z80@35665 -
 2017-03-26 19:10:50 +00:00