Commit Graph

26695 Commits

Author SHA1 Message Date
florian
c7a0c0bbb4 * set FPU type properly for riscv32-freertos 2023-02-11 20:42:31 +01:00
florian
f1f84a292c * don't not generate non-constant leb128 entriesm for riscv32-freertos 2023-02-10 21:28:39 +01:00
florian
0e05e908d5 riscv32-freertos:
* unit name fixed
 * linker script fixed
 * assembler supports dwarf
2023-02-09 21:29:06 +01:00
florian
71e0c12c88 * set fpu type correctly for riscv32-freertos 2023-02-08 22:38:17 +01:00
florian
87ec3d6fad + completed identifiers for RiscV ABIs 2023-02-08 22:26:58 +01:00
florian
7e3bdd501c * enable to check the existing of environment variables in config files 2023-02-08 21:33:21 +01:00
florian
f79448a9ff * target cpu type fixed 2023-02-07 22:59:51 +01:00
J. Gareth "Curious Kit" Moreton
33dfb6cb4e * x86: Converted bit-test optimisations to use
debug_hexstr so comments aren't truncated
	 (and put $ before BTx values)
2023-02-06 21:31:50 +00:00
J. Gareth "Curious Kit" Moreton
ae47cc2c88 * x86: New debug_hexstr instruction to help produce concise debug comments 2023-02-06 21:31:50 +00:00
florian
6e84ee5806 * patch by Jinyang He to fix building loongarch64 with -Oodfa/-O4 2023-02-06 22:26:02 +01:00
Jinyang He
783bbb66f9 Update Makefiles 2023-02-05 19:18:48 +00:00
Jinyang He
92e60d2107 add loongarch64 linux rtl support 2023-02-05 19:18:48 +00:00
Jinyang He
3d2c96ebbf Add loongarch64 linux support to compiler 2023-02-05 19:18:48 +00:00
Jinyang He
12c4290ffe Add loongarch64 architecture support to compiler 2023-02-05 19:18:48 +00:00
Jinyang He
8fac3d62ce add has_double_field 2023-02-05 19:18:48 +00:00
Jinyang He
96f4300158 Fix the edge of first_imaginary in move op 2023-02-05 19:18:48 +00:00
Jinyang He
2d680afab7 Fix the ~ is NOR rather than NOT 2023-02-05 19:18:48 +00:00
Jinyang He
cda8971baa Add dwarf cfa support 2023-02-05 19:18:48 +00:00
Jonas Maebe
7f41bb4718 JVM: add typesym for anonymous record typed constants
Fixes compilation of system unit with JVM compiler after b38d13577f
2023-02-05 10:58:59 +01:00
florian
9c10167b6f + CPUX86_HAS_BSWAP 2023-02-04 19:20:10 +01:00
Karoly Balogh
6bbb10e64d m68k: do not generate LEA instructions with explicitly specified size. only long is possible anyway. 2023-01-30 09:56:41 +01:00
Karoly Balogh
c577ac5ce9 m68k: add tables to convert from some stub opcodes + condition into real opcodes. Use them in the external assembler writer for now. Later the internal assembler will need these tables too. 2023-01-30 09:56:41 +01:00
florian
e9ec4a8bb3 * more riscv32-freertos-esp32c3 stuff added 2023-01-29 19:30:11 +01:00
florian
09b435cdab * transform a/a only into 1 if fastmath is on 2023-01-29 13:49:33 +01:00
florian
bedd4edc72 + first work for esp32-c3 support 2023-01-28 21:28:19 +01:00
florian
048385fd7f * compilation fixed 2023-01-28 11:42:52 +01:00
florian
3e75ba52f3 * initial preparations for riscv32-freertos 2023-01-27 22:39:15 +01:00
Sven/Sarah Barth
e8fcc5343b * use new chartype_for_stringlike function to retrieve the char type for a stringlike def instead of casting to a stringdef 2023-01-26 07:07:34 +01:00
Sven/Sarah Barth
ea417fbaaf + add utility function to retrieve the char type def from a stringlike def 2023-01-26 07:07:34 +01:00
florian
dfb8794d4d * compilation after merge fixed 2023-01-25 20:44:34 +01:00
Pierre Muller
aaa6f0d9c5 Only signed extension is needed 2023-01-25 19:36:45 +00:00
Pierre Muller
4793447be1 Add sign extension to 32-bit for unaligned OS_8 and OS_16 types (to try to solve #40102) 2023-01-25 19:36:45 +00:00
florian
8ef0f59025 * mark constant symbols used in preprocessor expressions as used, resolves #40108 2023-01-24 22:36:26 +01:00
Jonas Maebe
821c22a38f LLVM: workaround to fix make all 2023-01-23 22:44:48 +01:00
Jonas Maebe
e54197e9d2 Darwin: support -Xg for DWARFv4 2023-01-22 22:34:25 +01:00
florian
789031a6e6 * compile float*2 as float+float if possible as proposed by Rika, resolves #40116 2023-01-22 20:07:40 +01:00
florian
ec28b7586c + support procvar[] in tp/mac procvar mode if the procvar returns an array type 2023-01-22 16:24:29 +01:00
J. Gareth "Curious Kit" Moreton
f3f9c68ddb * x86-64: Extended the movl/movq optimisation to cover more distance 2023-01-22 09:35:35 +00:00
J. Gareth "Curious Kit" Moreton
42b052eb83 * x86-64: movl/movq -> movl/movl zero-extension optimisation 2023-01-22 09:35:35 +00:00
Jonas Maebe
00a5d30300 LLVM: remove use of getelementptr in make_simple_ref_ptr
We cannot safely infer whether it needs to be indirect or not there,
it should be done at a higher level if appropriate.
2023-01-20 21:07:18 +01:00
Jonas Maebe
51fdbb5524 macOS: set max var/constalign to 64
For all non-ppc(64) targets. Fixes test/talignrec1.
2023-01-20 21:07:18 +01:00
Jonas Maebe
29bae2297f tcginnode.pass_generate_code: use tlhcgobj.g_undefined_ok
Also override the code that uses this for LLVM with a variant that does not
need it for LLVM versions that do not support the freeze instruction.
2023-01-20 21:07:18 +01:00
Jonas Maebe
ab581c5c30 LLVM: override thlcgobj.g_undefined_ok
Uses the freeze instruction available in LLVM 10.0+. If we don't freeze undef/
poison values before using them in a calculation (even if that calculation is
something like "and 0", which masks the result completely), the result will
still be undef/poison and will keep propagating.
2023-01-20 21:07:18 +01:00
Jonas Maebe
ee0ad3ff86 thlcgobj.g_undefined_ok: new method
Specify that a register's contents may be undefined because of previous
operations (e.g. shifting by more bits than the register has, whose result
depends on the target architecture), but that the code generator will
later on ensure that if this is the case, that result will be overwritten/
masked.
2023-01-20 21:07:18 +01:00
Jonas Maebe
0b6942de8a llvm:a fix opaque ptr IR for Objective-C protocol
Also for interfacecom functions and properties. Fixes test/tobjc9 and
test/tobjc9b with LLVM 15.0+
2023-01-20 21:07:18 +01:00
florian
55deefbab5 * do not crash on illegal with statement, resolves #40118 2023-01-18 23:03:28 +01:00
florian
5598ffc210 * x86_64: warn only on negative offsets if rsp is involed, second part of #40113
+ tests
2023-01-17 23:09:42 +01:00
florian
8b08486fa1 * do not warn on lea e/rsp with negative address offset, part of #40113
+ tests
2023-01-15 23:06:05 +01:00
Pierre Muller
5cedecbe25 Avoid float_raise call in FPC_SOFT_FPUX80 code 2023-01-14 11:41:20 +00:00
Pierre Muller
977ca19dc0 Set current_filepos in Internal assembler class also if DEBUG macro is set 2023-01-14 11:41:20 +00:00