+ RTL support:
o VFP exceptions are disabled by default on Darwin,
because they cause kernel panics on iPhoneOS 2.2.1 at least
o all denormals are truncated to 0 on Darwin, because disabling
that also causes kernel panics on iPhoneOS 2.2.1 (probably
because otherwise denormals can also cause exceptions)
* set softfloat rounding mode correctly for non-wince/darwin/vfp
targets
+ compiler support: only half the number of single precision
registers is available due to limitations of the register
allocator
+ added a number of comments about why the stackframe on ARM is
set up the way it is by the compiler
+ added regtype and subregtype info to regsets, because they're
also used for VFP registers (+ support in assembler reader)
+ various generic support routines for dealing with floating point
values located in integer registers that have to be transferred to
mm registers (needed for VFP)
* renamed use_sse() to use_vectorfpu() and also use it for
ARM/vfp support
o only superficially tested for Linux (compiler compiled with -Cpvfpv6
-Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
the fpu exception handler still needs to be implemented), Darwin has
been tested more thoroughly
+ added ARMv6 cpu type and made it default for Darwin/ARM
+ ARMv6+ implementations of atomic operations using ldrex/strex
* don't use r9 on Darwin/ARM, as it's reserved under certain
circumstances (don't know yet which ones)
* changed C-test object files for ARM/Darwin to ARMv6 versions
* check in assembler reader that regsets are not empty, because
instructions with a regset operand have undefined behaviour in that
case
* fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
int64->single type conversion
* fixed constant pool locations in case 64 bit constants are generated,
and/or when vfp instructions with limited reach are present
WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
code with -Cparmv6 (or higher), or you will get crashes. The reason is
that storing/restoring multiple VFP registers must happen using
different instructions on pre/post-ARMv6.
git-svn-id: trunk@14317 -
shortstring temps don't get maximum alignment)
* changed some gettemptyed() calls into gettemp() calls (gettemptyped
means that this temp can only be used for temps of that type,
which is necessary for refcounted types but not for floats)
git-svn-id: trunk@12036 -
* Suppressed 2 unreachable code warnings.
* Now x86 compiler compiles without warnings and notes! It will be great to keep such state in future...
git-svn-id: trunk@11455 -
suite compiled with -Cg compared to without -Cg)
+ support for using a virtual register as PIC/got base register
* moved got loading code from ncgutil to cgobj/cgcpu (can't test whether
it didn't break anything under linux/i386, because "make cycle OPT=-Cg"
was already broken due to the *prt*.as -> si_*.pp changes)
git-svn-id: trunk@8651 -
- {$intpromotion common_type} or -CIcommon_type switches to common type promotion.
- {$intpromotion native_integer} or -CIcommon_type switches to current behaviour.
- Default in tp mode is common_type, native_integer in other modes
- Compiler can cycle with -CIcommon_type
- Still needs checking on other architectures than i386
git-svn-id: trunk@8118 -
removed by the register allocator and thus become invalid. This fixed
make cycle with -Or for ppc, but I'm not sure what the warning on
symsym.pas:1663 means. Since the tlocation change, even regular make
cycle doesn't work anymore though...
