Commit Graph

239 Commits

Author SHA1 Message Date
Károly Balogh
cb4d01627f save an extra reg if it's required to keep 64bit stack alignment on ARM
git-svn-id: trunk@25379 -
2013-08-27 12:49:50 +00:00
florian
d4968e054b + arm: tsettings.instructionset
* the selected instruction set is now independent from the cpu type: e.g. armv7-a can perfectly execute thumb(2) code

git-svn-id: trunk@25370 -
2013-08-25 21:56:12 +00:00
florian
f34bee1df7 * arm thumb does not support ror reg1,reg2,#imm
git-svn-id: trunk@25355 -
2013-08-23 18:41:24 +00:00
florian
3ebe708574 * do not use r13/r15 for certain data processing operations
* correct OP_AND with certain types of constants

git-svn-id: trunk@25350 -
2013-08-23 15:22:58 +00:00
florian
bb73a2891b * prevent generation of mul/mla statements with illegal registers
git-svn-id: trunk@25343 -
2013-08-23 15:22:41 +00:00
Jonas Maebe
4ec9ec2009 + PIC support for Darwin/ARM:
o does not use GOT
   o enabled by default like for other Darwin platforms
  - removed Darwin/ARM call stub support: no longer needed with current
    Xcode versions (at least Xcode 4.2+), and we didn't support PIC
    in them yet

git-svn-id: trunk@25325 -
2013-08-22 08:14:24 +00:00
florian
6606955b88 + basic support for pic on arm-linux
git-svn-id: trunk@25297 -
2013-08-19 21:35:37 +00:00
Jonas Maebe
57cdd8c106 * set symbol type/binding of data referred by ppc and arm/darwin stubs (part
of r25264, fixes internalerror 2013081601 after r25266)

git-svn-id: trunk@25275 -
2013-08-17 16:26:37 +00:00
Jonas Maebe
3b9b6a0cd7 * explicitly define the asmsymbols for Darwin call stubs as local
git-svn-id: trunk@25264 -
2013-08-16 10:07:46 +00:00
Jeppe Johansen
0bb8d24e24 Add some immediate forms of shift instructions to tcgthumb.a_op_const_reg
git-svn-id: trunk@24637 -
2013-05-30 12:07:32 +00:00
florian
e6489ed7d2 * arm thumb: do not generate illegal ror instructions
git-svn-id: trunk@24439 -
2013-05-04 22:00:17 +00:00
florian
7bea00e5fb * arm thumb: allow interface trampolines to non-virtual methods with large offsets
git-svn-id: trunk@24434 -
2013-05-04 19:54:03 +00:00
florian
6197330bad * arm thumb: take care of constant restrictions when creating interface wrappers for non-virtual methods
git-svn-id: trunk@24415 -
2013-05-03 21:12:16 +00:00
florian
f3b7f6197b * arm thumb: generate proper code for rol
git-svn-id: trunk@24414 -
2013-05-03 20:53:58 +00:00
florian
f80b6f4774 * arm thumb: take care of large offsets in interface wrappers
git-svn-id: trunk@24203 -
2013-04-07 21:56:37 +00:00
florian
e41b7b1b94 * arm thumb: strh/ldrh does not allow stack pointer based references with offset
git-svn-id: trunk@24200 -
2013-04-07 21:27:59 +00:00
florian
7ba197a221 * fix stack parameter handling for arm thumb
* fix entry/exit code generation for arm thumb

git-svn-id: trunk@24197 -
2013-04-07 21:01:15 +00:00
florian
f9ef8e90da + a_op_const_reg_reg for arm thumb taking care of availability of add sp,sp, ...
* handle references with base and index on arm thumb correctly

git-svn-id: trunk@24196 -
2013-04-07 21:01:11 +00:00
florian
f25a905904 * fix register allocation initalization for arm thumb
* avoid that the register allocator creates code which writes to frame/stack pointer

git-svn-id: trunk@24190 -
2013-04-07 21:00:50 +00:00
florian
075abd6220 + support of stackframesize for arm thumb
+ estimatedtempsize to get a good estimatation for architectures which require to know the stack size before

git-svn-id: trunk@24188 -
2013-04-07 21:00:38 +00:00
florian
64bc09ae58 * fixes several issues with arm thumb stack frame
git-svn-id: trunk@23988 -
2013-03-24 21:40:23 +00:00
florian
89b4939cec * correctly handle stackframes with size>508 for arm thumb
git-svn-id: trunk@23977 -
2013-03-24 18:51:23 +00:00
florian
c345ed8945 * generate branches for arm-thumb which are always sufficient big, the optimizer can fix this later on
git-svn-id: trunk@23904 -
2013-03-17 20:26:06 +00:00
florian
086ae4b999 Merge r22905 and r22906
git-svn-id: trunk@23773 -
2013-03-10 10:45:34 +00:00
florian
08bf826334 Merges 22828,22829
git-svn-id: trunk@23756 -
2013-03-09 20:49:57 +00:00
florian
9198630ce3 * fix armv7m compiler
git-svn-id: trunk@23686 -
2013-03-03 21:59:34 +00:00
florian
1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet
git-svn-id: trunk@23682 -
2013-03-03 12:20:10 +00:00
yury
d8902af3d6 * Do not replace ADD by SUB and vice-versa when overflow checking is enabled. Fixes tw15304 for ARM.
git-svn-id: trunk@23517 -
2013-01-24 21:49:21 +00:00
Jonas Maebe
69c29a415f * pass the procdef to getintparaloc instead of only the proccalloption, so
that the type of the parameters can be determined automatically
   o added compilerproc declarations for all helpers called in the compiler
     via their assembler name, so we can look up the corresponding procdef

git-svn-id: trunk@23325 -
2013-01-06 15:05:40 +00:00
florian
47d43750e4 * remove unused units from uses statements
git-svn-id: trunk@23306 -
2013-01-03 23:07:09 +00:00
florian
3143f0e1be * fix by Jeppe Johansen for bitscan which was broken by the last fix for normal arm code
git-svn-id: trunk@22866 -
2012-10-28 17:57:22 +00:00
florian
1520bcc4f0 * fix bsf for armv7+
git-svn-id: trunk@22860 -
2012-10-27 20:17:58 +00:00
Jeppe Johansen
818b43c060 Updated localalign values, and changed the behaviour of alignment of load/stores to not break aligned half-word copies
git-svn-id: branches/laksen/arm-embedded@22828 -
2012-10-23 12:45:40 +00:00
Jeppe Johansen
628d46f2d3 Fixed Bsf* functions on platforms that support RBIT
Fixed stackframe epilogue code for Thumb2 to allow proper processing of interrupts

git-svn-id: branches/laksen/arm-embedded@22813 -
2012-10-21 19:13:59 +00:00
Jeppe Johansen
4e84431dde Fix some optimizations which assume that there are 3 operands
Add simple Mul+Sub/Mul+Add into MLS/MLA optimizations
Fix some other small issues in the optimizer
Implement Interlocked* functions with proper use of LDREX/STREX

git-svn-id: branches/laksen/arm-embedded@22801 -
2012-10-21 16:20:52 +00:00
Jeppe Johansen
a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU
git-svn-id: branches/laksen/arm-embedded@22597 -
2012-10-08 20:10:45 +00:00
Jonas Maebe
1a97e61619 * factored out fixref from handle_load_store, and handle indirect symbol
loads for darwin in fixref (used to be done in ncgld, but was removed
    there)

git-svn-id: trunk@22445 -
2012-09-23 21:25:32 +00:00
florian
5facc6ad5e * BsrX(0) should return 255 instead of $ffffffff
git-svn-id: trunk@22316 -
2012-09-04 15:16:59 +00:00
florian
d67af82228 * patch by Jeppe Johansen: Thumb2-only targets don't support the BLX <label>, and have to use BL <label>, resolves #22770
git-svn-id: trunk@22314 -
2012-09-04 14:57:26 +00:00
florian
d63ebe6464 * bsr implementation for armv5+ using clz
git-svn-id: trunk@22310 -
2012-09-04 12:56:38 +00:00
florian
59012afe26 * better heuristics to decide when a mul by a constant shall be replaced by shift/add/sub sequences
git-svn-id: trunk@22300 -
2012-09-03 13:39:52 +00:00
florian
2f8027c63f + more sophisticated code to optimize multiplications on arm
+ the multiplication optimization needs a popcnt function
+ simple test

git-svn-id: trunk@22299 -
2012-09-03 13:39:45 +00:00
florian
45383fd32d + a lot missing flag allocs/deallocs added
git-svn-id: trunk@22201 -
2012-08-23 08:54:52 +00:00
florian
d8161c185c + track usage of flags by using a new register RS_/NR_DEFAULTFLAGS
git-svn-id: trunk@22179 -
2012-08-22 19:37:51 +00:00
florian
7588896775 * make use of cpuflags in the arm compiler
* armv5te architecture

git-svn-id: trunk@22103 -
2012-08-17 10:37:17 +00:00
masta
aa21845cd9 Small optimization for OP_AND on ARM
Especially with 64bit operators the CG sometimes generates:
and r0, r1, #0
Which just clears r0 and is equivalent with
mov r0, #0

git-svn-id: trunk@22032 -
2012-08-08 06:44:20 +00:00
florian
7513291ad8 * generate different code for OS_S8 -> OS_16 conversion which might fold better, idea by Nico Erfurth
git-svn-id: trunk@22027 -
2012-08-07 19:36:46 +00:00
masta
6529307d9e Don't emit useless AND/BICs in ARM CG
In certain cases the CG would emit something like
bic r1, r0, #0
As BIC is clearing the specified bits this is equivalent to
mov r1, r0
This patch changes the CG to emit the mov instead which the register
allocator will hopefully remove most of the time.

git-svn-id: trunk@22024 -
2012-08-07 06:46:45 +00:00
florian
f619a1aaf6 * fld/fst can have a base register+offset
git-svn-id: trunk@22016 -
2012-08-05 18:34:13 +00:00
florian
e81ba0f82e + make use of the armv6+ sign/zero extension instructions if appropriate
git-svn-id: trunk@22013 -
2012-08-05 14:04:11 +00:00