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db5e67c3fe
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216 Commits

Author SHA1 Message Date
nickysn
db5e67c3fe + introduced a new type TRelocDataInt for use as the 'data' parameter for 
TObjData.writeReloc; on i8086 it was changed to longint to allow using 32-bit
  relocations
+ added support for writing 32-bit OMF relocations

git-svn-id: trunk@32936 -
 2016-01-13 17:57:36 +00:00
nickysn
d4c21cf13a * also check for 386+ when emitting a reference with a fs: or gs: prefix 
git-svn-id: trunk@32926 -
 2016-01-11 16:30:06 +00:00
nickysn
ef9504ffd7 * made the \325 x86 prefix to generate a 0x66 prefix on i8086, thus fixing many 
32-bit instructions on i8086, when using the internal obj writer

git-svn-id: trunk@32890 -
 2016-01-08 17:20:37 +00:00
nickysn
e6ac1a4af5 + added check for the compatibility of each instruction with the selected target 
cpu in the i8086's internal obj writer

git-svn-id: trunk@32888 -
 2016-01-08 16:44:28 +00:00
nickysn
a508f9e5d3 + added check if the selected cpu is 386+ when writing a 66h or 67h prefix in 
the i8086 internal object writer. This allows weeding out spurious 386
  instructions, as is similarly done by NASM when using it as an external
  assembler.

git-svn-id: trunk@32871 -
 2016-01-07 15:40:32 +00:00
nickysn
22b6e00147 * extracted the writing of 0x66 and 0x67 prefixes in the x86 internal assembler 
to local procedures write0x66prefix and write0x67prefix

git-svn-id: trunk@32869 -
 2016-01-07 14:18:14 +00:00
nickysn
78362ed6ae * RELOC_ABSOLUTE32 made different than RELOC_ABSOLUTE on i8086 (and fixed all 
the i8086 bugs, related to code that assumes that they are the same)
+ also added RELOC_RELATIVE32 on i8086
* RELOC_ABSOLUTE32 and RELOC_RELATIVE32 are not yet implemented in the OMF
  object writer and linker (and currently produce an internal error), but will
  be implemented in the future, as the OMF format supports both 16-bit and
  32-bit relocations

git-svn-id: trunk@32311 -
 2015-11-13 15:56:26 +00:00
yury
862348c317 * Keep the GOT offset in a virtual register for i386 non-darwin platforms. 
It fixes PIC code generation with GOT for i386 with enabled optimizations. Bugs #28667, #28668. 
  Prior the fix I have not been able to compile even RTL with -O2 due to not enough free registers, since EBX is reserved for GOT.

  It can be further optimized to teach register allocator to not spill the GOT register if possible.
  

git-svn-id: trunk@32020 -
 2015-10-12 08:02:56 +00:00
nickysn
1487236f29 + support addr_fardataseg references in the internal asm writer 
git-svn-id: trunk@31511 -
 2015-09-04 14:33:48 +00:00
nickysn
e9c790f4eb + support 'SEG' in the i8086 inline assembler 
git-svn-id: trunk@31428 -
 2015-08-26 15:57:44 +00:00
nickysn
0da38dbc79 + implemented support for the 'dgroup' (addr_dgroup) relocation type in the omf 
internal object writer

git-svn-id: trunk@30800 -
 2015-05-04 17:07:19 +00:00
nickysn
25a834087e + choose the correct version of "Jcc near" to use on i8086 (386+ or 8086+) 
depending on the specified target cpu type
+ support the \60..\62 magic codes on i8086 in the internal asm writer

git-svn-id: trunk@30613 -
 2015-04-16 19:49:22 +00:00
nickysn
bfd5670cc8 + support new magic code \23 in the internal asm writer - same as \13, but with 
the condition inverted; this will be used to simulate near conditional jumps
  on processors earlier than 386 (i.e. "Jcc near target" will be encoded as
  "JNcc short +3; JMP target")

git-svn-id: trunk@30611 -
 2015-04-16 16:53:48 +00:00
nickysn
955c29618a + support far calls and jumps in the internal asm writer 
git-svn-id: trunk@30601 -
 2015-04-15 00:12:40 +00:00
nickysn
a7e059c875 + support segment relocations in the omf writer 
git-svn-id: trunk@30600 -
 2015-04-14 22:46:01 +00:00
nickysn
f5ddd351fe * allow use of the imm8 form of 16-bit instructions on i8086 
git-svn-id: trunk@30594 -
 2015-04-14 19:14:47 +00:00
nickysn
bd460eec43 * emit 16-bit addresses on i8086 for asm codes &64..&66 in the internal asm 
git-svn-id: trunk@30580 -
 2015-04-13 22:13:15 +00:00
nickysn
22fb1a3e7e * converted all the magic nasm codes in the x86 internal asm writer from decimal 
to octal in the compiler source, so they match the strings in x86ins.dat

git-svn-id: trunk@30566 -
 2015-04-13 01:13:39 +00:00
nickysn
fe30b53e95 * use 16-bit operand types for call/jmp immediate on i8086 in taicpu.create_ot 
git-svn-id: trunk@30563 -
 2015-04-12 23:53:15 +00:00
nickysn
a25a906d56 * i8086 internal asm fixes for the 0324 and 0361 asm codes 
git-svn-id: trunk@30562 -
 2015-04-12 22:56:28 +00:00
nickysn
fd9e0d7266 * i8086 binary writer fixes for asm codes 0320..0322 
git-svn-id: trunk@30526 -
 2015-04-09 23:10:47 +00:00
nickysn
db5276af61 * i8086 binary writer fixes for asm codes 0300..0302 
git-svn-id: trunk@30525 -
 2015-04-09 22:56:47 +00:00
nickysn
0aa8e9d829 + i8086 fixes in the binary writer for asm codes 0310 and 0311 
git-svn-id: trunk@30524 -
 2015-04-09 22:47:21 +00:00
nickysn
8597208ed9 * fixed emitting a 66h prefix for push/pop of segment registers on i8086 in the internal asm writer 
git-svn-id: trunk@30523 -
 2015-04-09 22:01:24 +00:00
nickysn
ff20a3c7bc + support 16-bit addresses for codes 36..38 in the internal asm writer on i8086 
git-svn-id: trunk@30521 -
 2015-04-09 21:16:22 +00:00
nickysn
470fb65e80 + implemented aasmcpu.process_ea for i8086 
git-svn-id: trunk@30495 -
 2015-04-08 12:54:09 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095 
git-svn-id: branches/hlcgllvm@30101 -
 2015-03-05 20:32:15 +00:00
pierre
da55d9ded2 Also disable overflow where range check is disabled in aasmcpu unit 
git-svn-id: trunk@29989 -
 2015-02-24 15:58:49 +00:00
Jonas Maebe
1a949eae1f * fixed i8086 compilation 
git-svn-id: trunk@29807 -
 2015-02-23 08:51:59 +00:00
florian
5946328ed6 * CPUs not having CMOV apparently do not support the newly introduced Multibyte NOPs (Agner, Optimizing subroutines in assembly 
language, An optimization guide for x86 platforms, Page 87), so restored the 32 Bit part of the old alignment 
  bytes for use on those old CPUs and use it depending on the CPU switches

git-svn-id: trunk@29777 -
 2015-02-21 20:50:42 +00:00
florian
255c4feef6 * new code alignment fillings based on the discussion at http://www.lazarusforum.de/viewtopic.php?f=10&t=8487 
git-svn-id: trunk@29772 -
 2015-02-21 10:09:39 +00:00
florian
d6e4af8279 + applied remaining patches of Torsten Grundke: adds gather instructions of avx2 
git-svn-id: trunk@29745 -
 2015-02-17 21:43:46 +00:00
florian
d540d56908 * unified internal errors 
git-svn-id: trunk@29280 -
 2014-12-13 11:46:59 +00:00
florian
ed11244632 * improved formatting 
git-svn-id: trunk@28742 -
 2014-10-04 17:52:17 +00:00
florian
8635894de4 * merged new changes to avx2 branch (AVX2 vectory-memory support) by Torsten Grundke 
git-svn-id: trunk@28527 -
 2014-08-27 21:06:23 +00:00
Jonas Maebe
7949bebb8d * synchronised with r28168 of trunk 
git-svn-id: branches/hlcgllvm@28169 -
 2014-07-05 21:30:28 +00:00
sergei
e7cd5319f0 * Put under {$ifndef x86_64} more cases of instructions that do not exist in 64-bit mode. 
git-svn-id: trunk@27933 -
 2014-06-11 12:51:38 +00:00
Jonas Maebe
bacd303208 * synchronized with trunk up to r27758 
git-svn-id: branches/hlcgllvm@27779 -
 2014-05-12 16:12:34 +00:00
michael
36c662f69f * Extention -> extension (By Reinier, bug ID #25979) 
git-svn-id: trunk@27750 -
 2014-05-10 15:29:29 +00:00
nickysn
c9f8703679 + set ref.segment to NR_SS for all temps/localvars on i8086. This allows the 
segment to survive e.g. several nested vecnodes, which cause the base register
  to change from BP to something else. In the cases where the ss: prefix is not
  needed, it is removed by make_simple_ref.
+ remove the ss: prefix in the several cases where make_simple_ref isn't called
  (namely spilling and tcg8086.a_call_reg_far)

git-svn-id: trunk@27714 -
 2014-05-01 21:18:47 +00:00
florian
842e027a9f + prove of concept how FMA4 could be supported in inline assembler 
git-svn-id: trunk@27214 -
 2014-03-20 21:25:38 +00:00
florian
a79be2b05c + support for FMA instructions in inline assembler 
+ extended avx test code with FMA

git-svn-id: trunk@27209 -
 2014-03-20 20:06:56 +00:00
florian
aa107b914c * merged avx2 branch, developed by Torsten Grundke 
git-svn-id: trunk@27200 -
 2014-03-20 12:03:52 +00:00
Jonas Maebe
e9268a0a14 * synchronised with trunk up till r26975 
git-svn-id: branches/hlcgllvm@26976 -
 2014-03-06 21:36:58 +00:00
nickysn
c83032992d * more fixes to the 3-op IMUL spilling: 
o Return the correct operation type for all forms of IMUL in
    taicpu.spilling_get_operation_type
  o Properly support 3-op IMUL in trgx86.do_spill_replace

git-svn-id: trunk@26514 -
 2014-01-18 21:46:13 +00:00
sergei
e6a9f3b15b * Fixed spilling of 3-operand IMUL instruction (went unnoticed this far because such instructions were not emitted by compiler). 
git-svn-id: trunk@26510 -
 2014-01-18 19:21:48 +00:00
florian
4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables 
git-svn-id: trunk@26161 -
 2013-12-01 17:02:08 +00:00
Jonas Maebe
1df3039424 + LLVM temp allocator based on new R_TEMPREGISTER register class. For every 
temp we allocate, we set the base register to a newly allocated
    R_TEMPREGISTER. This allows for uniquely identifying a temp even if its
    offset is modified.

git-svn-id: branches/hlcgllvm@26033 -
 2013-11-11 11:14:59 +00:00
florian
f132a804d6 + handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics 
git-svn-id: trunk@25909 -
 2013-11-01 19:01:39 +00:00
nickysn
f6e846c574 + added the NEC V20/V30 instructions 
git-svn-id: trunk@25750 -
 2013-10-11 21:27:56 +00:00