26610 Commits

Author	SHA1	Message	Date
Karoly Balogh	e19f60503b	m68k: updated instruction tables to match vasm release 1.9a	2022-12-29 03:36:51 +01:00
florian	4430422489	* improve module local data accesses by avoiding a got read	2022-12-28 22:05:23 +01:00
florian	30e0df384d	* second part of #40041 fixed ... + tests	2022-12-22 22:41:39 +01:00
florian	e0fef23d77	* properly transform a+const1-const2 into a+const1+(-const2), resolves #40041	2022-12-21 22:34:46 +01:00
Pierre Muller	e2905b8fad	Refuse A_Jcc, A_SETcc, and A_CMOVcc without condition	2022-12-10 19:50:47 +00:00
Pierre Muller	af04a523bb	* Fix testing of A_JCC and A_SETCC, add A_CMOVCC ... * Add $PIC for i386 and x86_64 solaris assemblers	2022-12-10 17:41:33 +01:00
Pierre Muller	b9a8e6832f	Do not set usesectionprogbits and usesectionflags to true for solaris assembler	2022-12-10 17:41:05 +01:00
florian	14466ee9d9	* change table updates	2022-12-06 22:41:30 +01:00
Jonas Maebe	851af5033f	Darwin/AArch64: adjust alignment info of custom-aligned paralocs ... Resolves #40019	2022-12-06 21:46:26 +01:00
florian	8ad7decaa3	* another change information update	2022-12-04 23:17:56 +01:00
Jonas Maebe	bba1076e12	LLVM: add Xcode 14.0 support (-ClvXcode-14.0)	2022-12-04 21:51:55 +01:00
Jonas Maebe	1e83d415c3	LLVM: us paraloc def instead of para def for byval ... We also use the paraloc instead of the para to write the def	2022-12-04 21:51:55 +01:00
J. Gareth "Curious Kit" Moreton	f00a932cc6	* New is_cyclic function to detect if def references itself - fixes #40010	2022-12-03 23:53:16 +00:00
florian	42d91c02bd	* continued to fix change information	2022-12-03 23:36:07 +01:00
Jonas Maebe	230142e183	AArch64 cgcpu: add missing brackets around and/or expression	2022-12-03 21:17:18 +01:00
florian	e0eff8bd89	+ more change information fixed	2022-12-02 23:34:36 +01:00
Sven/Sarah Barth	7a34677b2a	* as long as the type passed into a TypeInfo() is not an undefined or error def the resulting value will always be constant at compile time, so it can be compared to another then no matter if typenode or not ... + added tests	2022-12-02 17:47:15 +01:00
Jonas Maebe	c5f4a6acd0	LLVM: fix variant records when alignment of first part is not the highest ... Resolves #40015	2022-12-01 22:43:40 +01:00
florian	96d4bd19ac	* use bzhi only (if at all) for in_and_assign_x_y and not other in_*_x_y operations, resolves #40016	2022-11-30 22:16:21 +01:00
florian	a1a2549cf1	+ Debug message	2022-11-29 23:20:35 +01:00
J. Gareth "Curious Kit" Moreton	cc27576339	* x86: Fixed movzwl/movzbl bug in OptPass2Movx (resolves i40003)	2022-11-28 21:43:50 +00:00
florian	1700516721	* cleanup	2022-11-26 23:27:02 +01:00
J. Gareth "Curious Kit" Moreton	170c112301	* x86: Added FMA as an FPU target distinct from AVX and AVX2 (the latter of which has a new FPUX86_HAS_AVX2 flag)	2022-11-25 22:14:59 +00:00
J. Gareth "Curious Kit" Moreton	69c7838571	* x86: Addition of AMD CPUs: Bobcat, Jaguar, Piledriver, Excavator, Zen2 and Zen3 (and supporting flags)	2022-11-25 22:14:59 +00:00
florian	247423400f	* create muln with create instead of create_internal when converting "n - n mod const)" so pass1 works properly, resolves #40004	2022-11-24 22:43:27 +01:00
Pierre Muller	84be45f55d	Fix compilation failure of RTL with -Co option for x86_64-linux target	2022-11-24 17:01:37 +00:00
Pierre Muller	1a19fe1f03	Use correct class typecast for commit ba4cee279b	2022-11-23 08:43:28 +01:00
florian	0ba4cee279	* convert n-n mod const into n div const*const, resolves #39615	2022-11-22 22:41:58 +01:00
florian	7da8c774be	+ ShlShl2Shl optimization	2022-11-21 22:23:55 +01:00
florian	f6a8b045c2	* cosmetics	2022-11-21 22:10:29 +01:00
florian	4778973492	* further look ahead for temp. deallocation for FstpFldFstp2Fstp and FstpFld2<Nop>	2022-11-19 21:05:22 +01:00
florian	ef53f9bc25	+ FstpFldFstp2Fstp optimization	2022-11-18 23:37:34 +01:00
J. Gareth "Curious Kit" Moreton	e7e4044bf0	* CollapseZeroDistJump no longer updates registers or strips dead labels, instead just setting p to p.Next	2022-11-18 17:20:20 +00:00
J. Gareth "Curious Kit" Moreton	c21bf747fb	* x86: Extension to Cmp1Jl2Cmp0Jle to catch inverted variant	2022-11-18 17:20:20 +00:00
J. Gareth "Curious Kit" Moreton	e57ef24e37	* x86: TEST and CMP optimisations now perform jump optimisations prematurely to remove unnecessary TEST/CMPs	2022-11-18 17:20:20 +00:00
J. Gareth "Curious Kit" Moreton	3cf8ae8433	* x86: New XOR->BTC peephole optimisation	2022-11-15 21:10:47 +00:00
J. Gareth "Curious Kit" Moreton	f2bd099afb	* x86: Converted BTR and BTS tests to use a new utility function to check if BTx instructions are acceptable to use	2022-11-15 21:10:47 +00:00
J. Gareth "Curious Kit" Moreton	8220221866	* x86: New AND(NOT X)->BTR peephole optimisation	2022-11-15 21:10:47 +00:00
J. Gareth "Curious Kit" Moreton	827fe2bd83	* x86: New OR->BTS peephole optimisation	2022-11-15 21:10:47 +00:00
J. Gareth "Curious Kit" Moreton	314f632377	* x86: New TEST->BT peephole optimisation	2022-11-15 21:10:47 +00:00
florian	a27cb35fa8	* propagate life info properly	2022-11-15 22:06:56 +01:00
florian	3b43bd027c	* calculate life info for if nodes correctly if the then branch is empty, resolves #39992	2022-11-13 22:28:08 +01:00
J. Gareth "Curious Kit" Moreton	c9461b7313	* x86: Flags that relate to optimization hints rather than features have been moved to a separate set	2022-11-13 19:23:30 +00:00
Jonas Maebe	57466587c5	llvmdbg: remove unnecessary typedef intermediates	2022-11-12 21:14:28 +01:00
J. Gareth "Curious Kit" Moreton	a0c87be0fc	* x86: Zen processors now marked with CPUX86_HAS_FAST_BT_MEM flag	2022-11-12 13:18:53 +00:00
florian	d3abd339b7	+ cpu switch for zen	2022-11-11 23:45:52 +01:00
J. Gareth "Curious Kit" Moreton	e942c00f82	x86: MovMovMov2XChg optimisation now makes use of the CPUX86_HAS_FAST_XCHG flag	2022-11-11 22:29:58 +00:00
J. Gareth "Curious Kit" Moreton	aa5517d442	* x86: New CPU feature flags in cpuinfo units	2022-11-11 22:29:58 +00:00
Pierre Muller	71df6b83c6	Avoidd to use hp1 after calling RemoveInstruction, as the VMT is invalidated	2022-11-11 22:20:17 +00:00
Sven/Sarah Barth	a2789d611f	* fix crash in debug output in TX86AsmOptimizer.DoArithCombineOpt for DEC/INC $reg	2022-11-07 23:35:23 +01:00