nickysn
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bf8d560cc6
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* treat all Z80 registers as 8-bit
git-svn-id: branches/z80@44532 -
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2020-04-03 18:53:10 +00:00 |
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nickysn
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5ddd0dd9b8
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+ implemented a_load_const_ref for more efficient Z80 code generation for const assignment to local variables
git-svn-id: branches/z80@44528 -
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2020-04-03 02:23:05 +00:00 |
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nickysn
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4de1d5a8bf
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+ Z80 stackframe generation
git-svn-id: branches/z80@44524 -
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2020-04-03 00:15:24 +00:00 |
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nickysn
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20cd3a6d1b
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- removed GetLoad and GetStore from tcgz80. These came from AVR and I don't think they would be useful
for Z80.
git-svn-id: branches/z80@44512 -
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2020-04-02 02:20:34 +00:00 |
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nickysn
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c02fc4a49f
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* fixed OP_NOT in tcgz80.a_op_reg_reg_internal
git-svn-id: branches/z80@44511 -
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2020-04-02 02:14:21 +00:00 |
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nickysn
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052313d649
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* fixed OP_AND,OP_OR,OP_XOR in tcgz80.a_op_reg_reg_internal
git-svn-id: branches/z80@44510 -
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2020-04-02 02:04:18 +00:00 |
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nickysn
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cae1865f32
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* fixes for OP_ADD and OP_SUB in a_op_reg_reg_internal. The destination of add/adc/sub/sbc can only be
register NR_A.
git-svn-id: branches/z80@44508 -
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2020-04-02 01:10:52 +00:00 |
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nickysn
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d26b5199c8
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+ implemented a_load_ref_reg for fromsize=tosize for z80
git-svn-id: branches/z80@44507 -
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2020-04-02 01:01:58 +00:00 |
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nickysn
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065a0d44d8
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* tcg64favr renamed tcg64fz80
git-svn-id: branches/z80@44504 -
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2020-04-01 23:32:02 +00:00 |
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nickysn
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fc80874e63
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+ implemented a_load_reg_reg for z80 for fromsize=tosize
git-svn-id: branches/z80@44502 -
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2020-04-01 22:43:10 +00:00 |
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nickysn
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662ca13f51
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* use register NR_A in a_load_reg_ref for z80
git-svn-id: branches/z80@44501 -
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2020-04-01 22:40:02 +00:00 |
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nickysn
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fbadb3519f
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+ implemented a_load_reg_ref for equal sized args for z80
git-svn-id: branches/z80@44498 -
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2020-04-01 22:08:46 +00:00 |
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nickysn
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f87c837afe
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+ implemented a_load_const_reg
git-svn-id: branches/z80@44489 -
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2020-04-01 18:22:41 +00:00 |
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nickysn
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36a26a53ae
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+ emit warning comments in the asm output for the unimplemented methods in cgcpu
git-svn-id: branches/z80@44487 -
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2020-04-01 17:16:56 +00:00 |
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nickysn
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050244e5f0
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+ emit a ret instruction at the end of functions
git-svn-id: branches/z80@44485 -
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2020-04-01 14:05:00 +00:00 |
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nickysn
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943d0cbbe2
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* use the generic code of tcg.getintregister, which supports 8-bit CPUs after merging trunk
git-svn-id: branches/z80@44398 -
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2020-03-29 17:04:49 +00:00 |
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nickysn
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755fe97c51
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* synchronize with trunk
git-svn-id: branches/z80@44397 -
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2020-03-29 16:24:32 +00:00 |
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florian
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9a4ff8daa4
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* started to get some Z80 things working
git-svn-id: branches/z80@44284 -
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2020-03-08 11:43:38 +00:00 |
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florian
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e370e9ba15
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* register names fixed
git-svn-id: branches/z80@35670 -
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2017-03-27 20:30:51 +00:00 |
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florian
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ea52a23179
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+ skeleton for Z80 support
git-svn-id: branches/z80@35665 -
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2017-03-26 19:10:50 +00:00 |
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