Commit Graph

225 Commits

Author SHA1 Message Date
sergei
e82ecd66f3 - MIPS: removed target-specific real_to_real conversion, generic code handles it just well.
git-svn-id: trunk@25083 -
2013-07-11 08:28:24 +00:00
sergei
1ca2a253e8 MIPS, improved integer to real conversions:
* Use fpc_[int64|qword]_to_double instead of [int64|qword]_to_float64, makes RTL no longer dependent on softfloat code.
* Move 32-bit values from integer registers to FPU registers without using memory.
* Fixed branching, was still using a macro and delay slot was missing.

git-svn-id: trunk@25071 -
2013-07-09 14:17:51 +00:00
sergei
faa778b6c7 * MIPS: div/mod and 32-bit shifts: don't bother reusing argument locations, always allocate new register and emit 3-address instructions.
* Fixed possible overwrite of LOC_CREGISTER numerator in optimized division by power of 2.

git-svn-id: trunk@25066 -
2013-07-08 11:51:39 +00:00
sergei
9e4cc57768 * MIPS: handle 8 and 16-bit arithmetic shifts internally, by shifting argument left by 24/16 bits, followed with 32-bit arithmetic shift right by appropriately adjusted amount.
This approach should be usable for other non-x86 targets as well.

git-svn-id: trunk@25062 -
2013-07-08 08:45:16 +00:00
sergei
59d6df4fca * MIPS: replaced opcode mapping functions with array, much shorter that way. Separate "overflow" mapping is also no longer needed.
* Use SRAV/SRLV/SLLV opcodes for shifts by variable amount.

git-svn-id: trunk@25038 -
2013-07-04 14:26:44 +00:00
sergei
1c84c3edbf * Fixed label optimizer to work with MIPS, and enabled level 1 optimization for MIPS targets.
The difference in branch instruction formats is isolated in function JumpTargetOp, it is a plain function rather than a virtual method, so it can be easily inlined and, after inlining, produces the same code for non-MIPS targets as it was before change.

git-svn-id: trunk@25033 -
2013-07-03 14:40:24 +00:00
sergei
8823574fe2 * MIPS: get rid of DIV and DIVU macros.
git-svn-id: trunk@25030 -
2013-07-02 14:28:10 +00:00
sergei
d0ae800da6 + MIPS: Use INS and EXT instructions for bit manipulations when target CPU type is set to mips32r2.
git-svn-id: trunk@25029 -
2013-07-02 14:21:29 +00:00
sergei
828309e61d - MIPS: removed opcodes that are not in any known documentation.
git-svn-id: trunk@25023 -
2013-07-01 06:09:53 +00:00
sergei
7810d6637a * MIPS: improved 64-bit comparisons by using cg.a_cmp_reg_reg_label, uses less instructions and registers when comparing with zero.
git-svn-id: trunk@25008 -
2013-06-28 15:46:17 +00:00
sergei
7a28815182 * r24895 used wrong expression for swapping sides of comparison, and it went undetected by tests. Fixed.
git-svn-id: trunk@25007 -
2013-06-28 15:40:37 +00:00
sergei
c855868a3d * MIPS: get rid of macros in comparison operations, use immediate operands for comparison with constants when possible.
+ InternalError if valid GP is needed but pi_needs_got was not set in pass 1.

git-svn-id: trunk@25003 -
2013-06-28 10:22:26 +00:00
sergei
89c9cdf6c4 + MIPS: implemented parameter location reusing, eliminating second copy of (potentially large) records passed by value. When parameter is passed both in registers and stack, let it have a single LOC_REFERENCE location on callee side, and store relevant registers on stack (into 16-byte area reserved by ABI) early in prologue.
git-svn-id: trunk@24970 -
2013-06-25 08:15:17 +00:00
sergei
456f991c51 * MIPS: 3-operand forms of DIV and DIVU are not macros if first operand is $zero.
git-svn-id: trunk@24918 -
2013-06-20 13:14:38 +00:00
sergei
121271c38f * MIPS case node: simplified code a bit.
* Moved jump tables into data segment. For disassembly-based stack unwinding to work properly, MIPS ABI expects text segment to contain instructions only.

git-svn-id: trunk@24904 -
2013-06-15 12:36:21 +00:00
sergei
5bcae5a80a - Removed TMIPSParaManager.getintparaloc method, its generic implementation from r24716 works without issues.
git-svn-id: trunk@24903 -
2013-06-15 12:24:19 +00:00
sergei
8b8553991a + MIPS: prevent coalescing written-to registers with $sp,$fp,$zero and $at.
+ Implemented subset of "spill replace" functionality, replacing moves from/to spilled registers with loads/stores to spill locations. This helps to reduce amount of instructions.

git-svn-id: trunk@24900 -
2013-06-15 04:04:08 +00:00
sergei
6a8e4f0381 * MIPS: generate real instructions, not macros, for comparisons with $zero.
* g_concatcopy, g_concatcopy_unaligned: call a_cmp_reg_reg_label instead of duplicating code.

git-svn-id: trunk@24895 -
2013-06-14 07:27:48 +00:00
sergei
fb88cc4257 * TCGMIPS.a_load_reg_reg: reduce code duplication, and don't generate same register move for OS_32->OS_S32 and vice versa. Such moves explode into at least 4 instructions if register needs spilling, after which they are no longer recognized and cannot be removed by reg.allocator. So it's much better not to generate them in first place.
* Implemented overflow checking for multiplication, no longer generate MULO and MULOU macros.

git-svn-id: trunk@24894 -
2013-06-14 00:12:17 +00:00
sergei
7e0ae2e984 * MIPS: fixed cgsize2subreg to return correct result for float registers.
- TCGMIPS.getfpuregister override is no longer necessary with the above fix.

git-svn-id: trunk@24893 -
2013-06-13 23:50:20 +00:00
sergei
562714129f * MIPS: get completely rid of LI macro, generate equivalent CPU instructions instead.
git-svn-id: trunk@24862 -
2013-06-10 02:07:21 +00:00
sergei
86637a9ff9 * MIPS: pi_needs_got is necessary when doing unsigned to float conversions (it uses a global constant) and also if procedure does any calls in PIC mode.
git-svn-id: trunk@24822 -
2013-06-08 23:29:50 +00:00
sergei
2868a30cce + Added mips32r2 opcodes needed for pic32.
* Output registers of type R_SPECIALREGISTER as numbers.
+ For MTC0/MFC0 instructions, set type of first operand to R_SPECIALREGISTER, since it designates a coprocessor register.

git-svn-id: trunk@24799 -
2013-06-03 20:01:30 +00:00
Jonas Maebe
9938169d2c * don't use the paracgsize in get_paraloc_def(), because it generally
contains the tcgsize of the entire parameter rather than only of
    what is left (-> calculate it from the remaining parameter length)

git-svn-id: trunk@24776 -
2013-06-02 14:05:07 +00:00
sergei
4b820a1ca5 - Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels.
git-svn-id: trunk@24764 -
2013-06-02 10:49:17 +00:00
Jonas Maebe
7566ddcc8f * add a tdef to each parameter location and set it for all target
backends (not yet used, will be used in high level code generator)

git-svn-id: trunk@24761 -
2013-06-02 10:24:02 +00:00
sergei
fe322f35d5 * MIPS: fixed passing CPU type specified with -CpXXX switch to assembler
- removed mips_cpu variable and cpu_mips_default CPU type.
  * globals.pas: default CPU type changed to MIPS2, this is what was passed to assembler before.

git-svn-id: trunk@24643 -
2013-05-30 15:02:40 +00:00
sergei
0ad96d2099 * MIPS: some clean up of assembler reader:
- references cannot be in brackets
  - registers are only prefixed by dollar, never by percent
  - syntax x@LO is not supported, must be %lo(x).

git-svn-id: trunk@24633 -
2013-05-30 09:28:21 +00:00
sergei
2944fc8839 * MIPS improvements:
* reworked condition codes, changed BC1T and BC1F from separate instructions to condition jumps.
  - removed A_P_SW, A_P_LW and A_SPARC8UNIMP
  + support '.set at' and '.set noat' directives
  + prepare to support bgtz,bgez,bltz,blez instructions.

git-svn-id: trunk@24631 -
2013-05-29 17:35:56 +00:00
sergei
e1f6cf79e9 * MIPS: an empty reference (no symbol, base or index and zero offset) must not be output as empty string.
git-svn-id: trunk@24630 -
2013-05-29 15:59:40 +00:00
sergei
c31321c2fe * TCGMIPS.handle_reg_const_reg(): fixed to generate 'real' CPU instructions, so macro processing by assembler is no longer needed.
git-svn-id: trunk@24564 -
2013-05-24 03:56:51 +00:00
sergei
d367148f75 - Removed obsolete comments (copypasted from other CPU code, most likely).
- Removed topsize, MIPS target does not use it.

git-svn-id: trunk@24535 -
2013-05-20 10:39:05 +00:00
sergei
300289dd89 * MIPS: reworked 64-bit code generation, implemented overflow checking and optimized operations with constants.
git-svn-id: trunk@24508 -
2013-05-15 10:02:08 +00:00
sergei
bfd7401541 * MIPS: overflow checking added in r24445 works only when source and destination of operation are different registers. Fixed cases of operations on same register.
git-svn-id: trunk@24507 -
2013-05-15 09:55:47 +00:00
sergei
7cfc737866 * MIPS: rewrote 32-bit code generation methods, reducing code duplication.
+ Implemented overflow checking for unsigned 32-bit addition and subtraction.
* Use optimize_op_const instead of custom optimizations.
* Change AND/OR/XOR into ANDI/ORI/XORI if they use immediate operands, and use correct range for these immediate operands, must be 0..65535 unlike -32768..32767 for arithmetic operations.
* Don't treat AND/OR/XOR as macros, no longer necessary.
* Don't treat BEQ/BNE as macros either.

git-svn-id: trunk@24445 -
2013-05-05 05:55:03 +00:00
sergei
a0d3750b81 + MIPS: implemented direct 32x32 to 64 bit multiplication.
git-svn-id: trunk@24436 -
2013-05-04 20:35:24 +00:00
sergei
504b6754b7 * MIPS small improvements:
* TCGMIPS.a_load_reg_reg: generate CPU instructions instead of macros
  * TCGMIPS.a_cmp_const_reg_label: load constant using a_load_const_reg instead of LI macro (it may also end up with LI, but tries to optimize when possible).
  - removed unused variables.

git-svn-id: trunk@24418 -
2013-05-04 07:33:34 +00:00
sergei
1f8bd4a2d1 + MIPS: initial target-specific unary minus node.
git-svn-id: trunk@24417 -
2013-05-04 07:19:08 +00:00
sergei
02a288fd89 * MIPS addnode: rewritten almost completely:
* shorter by 280 lines
  * generates actual instructions instead of macros
  * uses immediate operands for constants when possible
  * 64-bit and float comparisons use LOC_JUMP as location

git-svn-id: trunk@24236 -
2013-04-14 12:12:36 +00:00
sergei
cded05ccef + MIPS linker: support linking PIC object files with non-PIC ones, by routing absolute calls into PIC code through stubs that load R25.
git-svn-id: trunk@24098 -
2013-03-31 19:58:52 +00:00
sergei
c5bf2ecb65 + MIPS linker: added ELF header flags, TLS relocations and an utility procedure to handle endianness.
git-svn-id: trunk@24052 -
2013-03-29 14:11:27 +00:00
pierre
702effaad0 Force use of PIC compatible calling for register variable calls as procvars might be internal or external and thus require PIC
git-svn-id: trunk@24005 -
2013-03-25 21:53:31 +00:00
sergei
6f1997f5e5 + MIPS: added profiling support
git-svn-id: trunk@23950 -
2013-03-21 13:40:50 +00:00
sergei
1c652eb8f9 MIPS procinfo improvements:
- Removed TMIPSProcInfo.needs_frame_pointer, it duplicates pi_needs_stackframe flag.
- Don't save RA for leaf procedures.
* GP is caller-saved register, it does not need saving/restoring as nonvolatile registers. Handle its restore position as a "normal" temp, whose offset is known before secondpass. This allows to handle PIC calls without involving GAS macro processing.

git-svn-id: trunk@23885 -
2013-03-17 08:43:39 +00:00
sergei
823e3ea398 MIPS: reworked PIC/call code:
+ Favor 'weak' parameter in a_call_name of both thlcgmips and TCGMIPS.
* make_simple_ref and a_loadaddr_ref_reg: require input references to be 'raw' (no refaddr=addr_pic, etc) and do not use GP as base/index. If it's not true, raise an internal error. When addr_pic_call16 or so needs to be generated, it must be done without calling the mentioned methods.
* thlcgmips.a_call_name: generate PIC sequence for procedures declared as 'external', instead of 'cdecl', this is more correct because ABI has only one calling convention.
- make_simple_ref_fpu removed, there's no reason to handle references to floating-point data in different way.
- a_loadaddr_ref_cgpara override also removed, generic method does the job just well.
- thlcgmips.a_call_ref and a_call_reg overrides removed because indirect calls are now always done using $t9.

git-svn-id: trunk@23698 -
2013-03-05 19:31:20 +00:00
sergei
a1b50f643e - removed never used function.
git-svn-id: trunk@23697 -
2013-03-05 18:05:52 +00:00
sergei
6fcd9979dd + MIPS: doing progress with linker, implemented processing of local symbols in PIC code and stuff needed to link shared libraries.
git-svn-id: trunk@23690 -
2013-03-04 20:48:33 +00:00
sergei
1421998752 * MIPS register spilling: relocations are not needed to load constant values, and offset limit is 32767, not 4095.
git-svn-id: trunk@23675 -
2013-02-28 20:43:38 +00:00
sergei
5812cf3b46 * MIPS: allocate 16-byte outgoing parameter area also for procedures declared as 'assembler' without 'nostackframe'. This is a half-measure because there is no way to determine correct size to allocate for such procedures (probably we must add some directive to specify it). The same generally applies to all targets with fixed stack, not just MIPS.
git-svn-id: trunk@23663 -
2013-02-25 22:47:09 +00:00
sergei
d190d4676b - MIPS: removed comment generation in function prologues, it clutters listing more than it helps. Also removed some unused variables.
git-svn-id: trunk@23661 -
2013-02-25 21:40:03 +00:00