38 Commits

Author	SHA1	Message	Date
mazen	ed1ba5dc1c	* asm condition generation modified by TAiCpu.SetCondition	2003-02-18 22:00:20 +00:00
mazen	92f035d47f	* fixing run time errors related to unimplemented abstract methods in CG ... + giving empty emplementations for some RTL functions	2003-02-05 21:48:34 +00:00
mazen	0de4838d36	- internal errors rmoved from a_loar_reg_reg when reg sizes differs from 32	2003-01-22 22:30:03 +00:00
mazen	c3321868d5	* many stuff related to RTL fixed	2003-01-20 22:21:36 +00:00
daniel	55a161bbbf	* Tregister changed into a record	2003-01-08 18:43:56 +00:00
mazen	c20be82919	* adding unequaln node support to sparc compiler	2003-01-07 22:03:40 +00:00
mazen	a3aea23c2e	* fixing bugs related to load_reg_ref	2003-01-06 22:51:47 +00:00
mazen	215880afe8	* fixing several bugs compiling the RTL	2003-01-05 21:32:35 +00:00
florian	b59b436130	* x86-64 compiles ... + very basic support for float128 type (x86-64 only)	2003-01-05 13:36:53 +00:00
mazen	33b405859b	- many emitXXX removed from cga.pas in order to remove that file.	2002-12-25 20:59:49 +00:00
mazen	8d888ccff0	* many internal errors related to unimplemented nodes are fixed	2002-12-22 19:26:31 +00:00
mazen	00ee9f8063	+ added support for the shift nodes ... + added debug output on screen with -an command line option	2002-12-21 23:21:47 +00:00
mazen	eca8ef3436	* fixed support of nSparcInline	2002-11-25 19:21:49 +00:00
peter	f3fc72095f	* splitted defbase in defutil,symutil,defcmp ... * merged isconvertable and is_equal into compare_defs(_ext) * made operator search faster by walking the list only once	2002-11-25 17:43:16 +00:00
mazen	41153e2b1a	+ return_result_reg and function_result_reg are now used, in all plateforms, to pass functions result between called function and its caller. See the explanation of each one	2002-11-17 17:49:08 +00:00
mazen	f97aa452bd	* SPARC calling mechanism almost OK (as in GCC./mppcsparc )	2002-11-10 19:07:45 +00:00
mazen	928e3c583b	* op_reg_reg_reg don't need any more a TOpSize parameter	2002-11-06 11:31:24 +00:00
mazen	1097619459	*** empty log message ***	2002-11-05 16:15:00 +00:00
mazen	f170b21371	* parameter handling updated	2002-11-03 20:22:40 +00:00
mazen	1e23f14e4f	* TOpSize values changed S_L --> S_SW	2002-10-28 20:59:17 +00:00
mazen	351c11d2a8	- cga.pas redueced to an empty unit	2002-10-22 13:43:01 +00:00
mazen	220be9c38f	+ op_raddr_reg and op_caddr_reg added to fix functions prologue	2002-10-20 19:01:38 +00:00
mazen	3a3b8a3dc4	* assembler output format fixed	2002-10-13 21:46:07 +00:00
mazen	fcc5675528	*** empty log message ***	2002-10-11 13:35:14 +00:00
mazen	b44010f639	* Just to update repsitory	2002-10-10 19:57:51 +00:00
mazen	de41a87b82	* Internal error fixed, but usually i386 parameter model used	2002-10-10 15:10:39 +00:00
mazen	6bc783f5c2	*** empty log message ***	2002-10-08 17:17:03 +00:00
mazen	a15b375214	word alignement modified in g_stack_frame	2002-10-07 20:33:04 +00:00
mazen	3d9be081b9	* register allocation for parameters now done in cpupara, but InternalError(200109223) in cgcpu.pas:1053 is still not fixed du to location_force problem in ncgutils.pas:419	2002-10-04 21:57:42 +00:00
mazen	14bb0a51b4	+ out registers allocator for the first 6 scalar parameters which must be passed into %o0..%o5	2002-10-02 22:20:28 +00:00
mazen	b5882415a3	+ procedures exiting prologue added and stack frame now restored in the delay slot of the return (JMPL) instruction	2002-10-01 21:35:58 +00:00
mazen	b2c63fb6ca	attinst.inc --> strinst.inc	2002-10-01 21:06:29 +00:00
florian	0282138de4	* fixed log and id	2002-10-01 17:41:50 +00:00
mazen	3a70e9a021	* function epilogue modified to much SPARC ABIN	2002-09-30 21:07:13 +00:00
mazen	f83c707f71	* function prologue fixed	2002-09-30 19:12:14 +00:00
mazen	4c607d6126	* a compile bug fixed	2002-09-21 10:22:43 +00:00
Jonas Maebe	a15d8cfe39	* a_load_reg_reg() now has two size parameters: source and dest. This ... allows some optimizations on architectures that don't encode the register size in the register name.	2002-09-17 18:54:01 +00:00
mazen	ab508fa44f	*** empty log message ***	2002-08-21 13:30:07 +00:00