- xorq %reg,%reg (identical registers) is now changed to xorl %reg,%reg if doing so removes the REX prefix.
- movw %bx,%ax; andl $0xffff,%eax, for example, is now changed to movzwl %bx,%eax as long as a conditional operation doesn't follow 'and' (checks to see if the CPU flags are in use).
- movzbq and movzwq get optimised to movzbl and movzwl respectively if doing so removes the REX prefix.
- Removal of optimisation code that zero-extends from 32-bit to 64-bit, because there isn't actually a valid combination of opcodes for MOVZX that allows that (for registers,
just use MOV). This is not the case with MOVSX.
- movq is now optimised to movl even if the CPU flags are in use (this stops mov %reg,0 from being optimised to xor %reg,%reg if doing so breaks an algorithm that relies on them).
- Fixed typo in peephole message regarding movq to movl (it said movd instead).
- Made the peephole debug messages more consistent in formatting, some of which now have more detail.
* small fixes of the patch
git-svn-id: trunk@38070 -
retfq x86 instructions. These are variants of the ret instruction with the
return offset size set explicitly, e.g. retfw is a 16-bit far ret (i.e. pops
a 16-bit offset and a 16-bit segment), retfd is a 32-bit far ret (pops a
32-bit offset, followed by a 16-bit segment), etc.
git-svn-id: trunk@37571 -
(movs, cmps, scas, lods, stos, ins, outs) in the inline asm of the i8086, i386
and x86_64 targets. Both intel and at&t syntax is supported.
* NEC V20/V30 instruction 'ins' (available only on the i8086 target, because it
is incompatible with 386+ instructions) renamed 'nec_ins', to avoid conflict
with the 186+ 'ins' instruction.
git-svn-id: trunk@37446 -
(16-bit and 32-bit), i386 (16-bit and 32-bit) and x86_64 (32-bit and 64-bit).
Known bug: 32-bit addresses with an offset have their offset truncated to its
low 16-bits on i8086
git-svn-id: trunk@37409 -
easily and so that all the values are now available to the compiler
(previously, there were several, which were mapped to the same value and thus
were only used to make x86ins.dat easier to read)
git-svn-id: trunk@37299 -
this removes the limit of 3 Ch_XXX flags per instruction (thus allowing adding
more precise flags, e.g. for tracking only certain bits of the flags register,
etc.) and avoids the ugliness of having the Ch_None filler, which makes
x86ins.dat less readable.
git-svn-id: trunk@35850 -
* AAA and AAS also read flags (AF)
* CMC reads and writes flags (it inverts CF)
* CMPSx and SCASx write flags
* CMPSx, SCASx, LODSx, STOSx, MOVSx read the direction flag
* NOT doesn't affect flags
* REP isn't affected by and doesn't affect flags
* REPE/REPNE/REPZ/REPNZ/REPC/REPNC don't write flags, only read them
* ROL and ROR don't read flags
* SAL doesn't read flags
* SHLD and SHRD don't read flags
git-svn-id: trunk@35849 -
sysv_abi_cdecl calling conventions on x86-64 to force using the SYSV/
Microsoft ABI on platforms that don't use it by default (mainly to ease
porting pure assembler routines)
git-svn-id: trunk@35425 -
