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97 Commits

Author SHA1 Message Date
florian
5b755661d8 + patch by Simon Ameis: adds all the STM32F091* microcontroller units to the list of supported ARM MCUs, resolves issue #32484 
git-svn-id: trunk@37378 -
 2017-10-01 18:59:01 +00:00
florian
73c46a5988 - removed unused constants 
git-svn-id: trunk@35664 -
 2017-03-26 13:06:34 +00:00
Jeppe Johansen
7e75457a3e Added more Nordic Semi controllers. Created a new unit for NRF52x controllers with a more precise register naming following Nordic SDK conventions. 
Patch from Paul Mitchell.

git-svn-id: trunk@35274 -
 2017-01-10 20:30:20 +00:00
Jeppe Johansen
6a1c1e4f29 Added support for NRF52832 controllers. 
git-svn-id: trunk@34170 -
 2016-07-22 10:01:10 +00:00
florian
cb4773432b + hardfloat directive (arm only): use hard float calling conventions regardless of the abi, resolves #29715 
git-svn-id: trunk@33196 -
 2016-03-06 15:47:31 +00:00
florian
1c067e96bf * fix VFPv4 support 
git-svn-id: trunk@33182 -
 2016-03-06 13:33:16 +00:00
Jeppe Johansen
9aa3c23b18 Added a bunch of new and fixed embedded controller units. From Michael Ring. 
git-svn-id: trunk@32386 -
 2015-11-21 10:30:49 +00:00
Jeppe Johansen
3cb9be73bc Moved tcontrollerdatatype out into cpuinfo. 
Added cputype and fputype info to tcontrollerdatatype arrays.

git-svn-id: trunk@31574 -
 2015-09-07 20:36:54 +00:00
Jeppe Johansen
dac294c680 Fix ARMv3/ARMv2A support. 
git-svn-id: trunk@31561 -
 2015-09-06 20:33:26 +00:00
Jeppe Johansen
2b80d46492 Added STM32F7xx controller units and types. 
git-svn-id: trunk@31257 -
 2015-07-31 22:21:16 +00:00
Jeppe Johansen
36dfe750d8 Added Freescale MK20D7 controller support. 
git-svn-id: trunk@30925 -
 2015-05-28 11:46:22 +00:00
Jeppe Johansen
65a69129c5 Add initial support for STM32F429 core 
git-svn-id: trunk@30599 -
 2015-04-14 21:55:37 +00:00
Jeppe Johansen
fa5bd1c513 ARMv7M supports UMULL. 
Fix missing conflicts for multiplication instructions for >=ARMv6.

git-svn-id: trunk@30276 -
 2015-03-22 14:39:43 +00:00
Jeppe Johansen
64f127141f Add VFPv4 FPU type for ARM. 
Fix assembler reader so it can read instructions longer than 5 characters.

git-svn-id: trunk@30186 -
 2015-03-14 12:49:07 +00:00
Jeppe Johansen
914e9e7b49 Merged from trunk 
git-svn-id: branches/laksen/armiw@30146 -
 2015-03-08 12:33:46 +00:00
Jeppe Johansen
d12b913e70 Add initial support in ARM-embedded for Allwinner A20. 
git-svn-id: trunk@30144 -
 2015-03-08 12:22:57 +00:00
Jeppe Johansen
0494f48bfc Fix capability matrix for ARMv5. It should not have thumb support. 
git-svn-id: branches/laksen/armiw@29287 -
 2014-12-14 16:49:28 +00:00
florian
5c67fcc43f + change always floating point divisions into multiplications if they are a power of two, 
this is an exact operation so it is always allowed
* change only divisions by normal numbers into multiplications

git-svn-id: trunk@29085 -
 2014-11-16 20:47:38 +00:00
Tomas Hajny
3ee3542744 * boolean constant instead of IFDEFs for detection of microcontroller support 
git-svn-id: trunk@29052 -
 2014-11-10 12:34:59 +00:00
Jeppe Johansen
0dc39b5d63 Applied patch from Michael Ring that adds some startup code for some new stm32f0 and stm32f1 controllers, and fixes naming on some LPC ARMv6m controllers. 
git-svn-id: trunk@28009 -
 2014-06-20 06:49:04 +00:00
florian
686a2d2f3f + Support omitting the frame pointer on arm even in procedures with incoming parameters 
on the stack, this can be enabled by -OoFORCENOSTACKFRAME. This reduces the required
  entry/exit code and makes an extra register available to the compiler. However, since this is
  based on an estimation of the required stack size, it might have two drawbacks:
  either the stack frame is estimated to big, the program requires a bigger stack than needed
  or it is estimated too small, then the compiler throws an internalerror during compilation. These
  issues can be overcome as soon as the compiler supports recompiling subroutines if needed.

git-svn-id: trunk@27239 -
 2014-03-23 14:38:53 +00:00
masta
e5b3d89a5d Add CPUARM_HAS_UMULL flag 
Pre armv4 and all *M variants to not support UMULL and SMULL.

The Flag now gets used for 32x32->64 and 64x64->64 optimized code.

git-svn-id: trunk@26354 -
 2014-01-02 13:06:18 +00:00
florian
73e6af4864 + cpu flag CPUARM_HAS_THUMB_IDIV 
* test for CPUARM_HAS_THUMB_IDIV instead the CPU type when creating sdiv/udiv code

git-svn-id: trunk@25648 -
 2013-10-05 12:38:55 +00:00
florian
d4968e054b + arm: tsettings.instructionset 
* the selected instruction set is now independent from the cpu type: e.g. armv7-a can perfectly execute thumb(2) code

git-svn-id: trunk@25370 -
 2013-08-25 21:56:12 +00:00
florian
0e9b8adb7a patch by Michael Ring: 
+ support of several armv6m MCUs for arm-embedded
* renamed lpc1343 unit to lpc13xx
+ more lpc13xx MCUs added

git-svn-id: trunk@24379 -
 2013-04-29 19:57:08 +00:00
florian
b434b7bc7d * armv6-m has no blx <immediate> 
git-svn-id: trunk@23983 -
 2013-03-24 20:24:15 +00:00
florian
c2baf7b4c0 Merge r23058 
git-svn-id: trunk@23776 -
 2013-03-10 16:37:57 +00:00
florian
086ae4b999 Merge r22905 and r22906 
git-svn-id: trunk@23773 -
 2013-03-10 10:45:34 +00:00
florian
21c154d60a Merged r22903 
git-svn-id: trunk@23757 -
 2013-03-09 20:56:07 +00:00
florian
1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet 
git-svn-id: trunk@23682 -
 2013-03-03 12:20:10 +00:00
florian
bcd48ac1a1 + patch by Justin Smyth to support the lpc1343, resolves #23844 
git-svn-id: trunk@23620 -
 2013-02-14 20:38:53 +00:00
Jeppe Johansen
3ee29eb219 Fixed ARMv7-EM code generation and RTL compilation 
Added LM4F120H5 controller type and startup code

git-svn-id: branches/laksen/arm-embedded@22903 -
 2012-11-01 17:25:01 +00:00
tom_at_work
312e8b8ecc Add implementations for read/write barrier code for ARM 
git-svn-id: trunk@22864 -
 2012-10-27 22:53:44 +00:00
Jeppe Johansen
628d46f2d3 Fixed Bsf* functions on platforms that support RBIT 
Fixed stackframe epilogue code for Thumb2 to allow proper processing of interrupts

git-svn-id: branches/laksen/arm-embedded@22813 -
 2012-10-21 19:13:59 +00:00
Jeppe Johansen
4e84431dde Fix some optimizations which assume that there are 3 operands 
Add simple Mul+Sub/Mul+Add into MLS/MLA optimizations
Fix some other small issues in the optimizer
Implement Interlocked* functions with proper use of LDREX/STREX

git-svn-id: branches/laksen/arm-embedded@22801 -
 2012-10-21 16:20:52 +00:00
Jeppe Johansen
84ea70fddc Fixed some minor formating issues 
Implemented a small heap mananger
Implemented console IO
Changed default LineEnding to CrLf(to ease console IO parsing)

git-svn-id: branches/laksen/arm-embedded@22646 -
 2012-10-14 19:10:20 +00:00
Jeppe Johansen
14879a9e82 Added all STM32F1 configurations 
git-svn-id: branches/laksen/arm-embedded@22599 -
 2012-10-09 06:58:58 +00:00
Jeppe Johansen
a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU 
git-svn-id: branches/laksen/arm-embedded@22597 -
 2012-10-08 20:10:45 +00:00
Jeppe Johansen
80bb3febea Fixed assembler calling command line for cpus>ARMv5TE. EDSP instructions will generate errors while assembling, due to RTL assembler routines 
Updated boot code for all Cortex-M3 controllers, and sc32442b to use weak linking for exception tables.
Cortex-M3 devices now also share initialization routine to simplify maintenance
STM32F10x classes now have specific units which fit the interrupt source names and counts

git-svn-id: branches/laksen/arm-embedded@22581 -
 2012-10-08 03:15:40 +00:00
Jeppe Johansen
8b17a358e4 Remove all traces of the interrupt vector table generation mechanism 
Clean up cpuinfo tables
Fixed ARMv7M bug(BLX <label> doesn't exist on that version)

git-svn-id: branches/laksen/arm-embedded@22579 -
 2012-10-08 00:10:52 +00:00
florian
d67af82228 * patch by Jeppe Johansen: Thumb2-only targets don't support the BLX <label>, and have to use BL <label>, resolves #22770 
git-svn-id: trunk@22314 -
 2012-09-04 14:57:26 +00:00
florian
91156f8652 + cpuflag CPUARM_HAS_CLZ for arm 
git-svn-id: trunk@22309 -
 2012-09-04 12:56:27 +00:00
florian
765fb18679 + add a description to the cpuflags where I know the exact meaning/definition 
git-svn-id: trunk@22119 -
 2012-08-17 20:45:46 +00:00
florian
ba6ba52e7f * instruction scheduling is pretty slow so make it a level 3 optimization for now 
git-svn-id: trunk@22115 -
 2012-08-17 19:36:29 +00:00
florian
5ceeb8aaa9 * enable scheduler when compiling at least with -O2 
git-svn-id: trunk@22111 -
 2012-08-17 19:36:04 +00:00
florian
354cac2bb6 + completed arm architectures 
* ldrd/strd and pld collected under the edsp define

git-svn-id: trunk@22104 -
 2012-08-17 10:37:27 +00:00
florian
7588896775 * make use of cpuflags in the arm compiler 
* armv5te architecture

git-svn-id: trunk@22103 -
 2012-08-17 10:37:17 +00:00
florian
e4f89fe524 + introduce cpuflags for arm 
git-svn-id: trunk@22090 -
 2012-08-15 15:49:05 +00:00
florian
4d86d25c6c * -O4 switch for optimizations which are correct but which might have unexpected effects 
like field reordering (possible problems cracker classes) or using ebp as normal register (broken
      stack traces from dump_stack)
    + niln is also valid in a cse domain
    * parameters passed by reference shall have a complexity >1
    * load nodes from outer scopes shall have a complexity >1
    * better cse debugging
    + more node types added to cse
    * consider parameters passed by reference in cse
    * take care of cse in parameters in simple cases

git-svn-id: trunk@22050 -
 2012-08-09 18:58:54 +00:00
florian
b330bba0bc + introduce -Oofastmath 
* limit the application of the tree transformation introduced in r21986 to safe cases and -Oofastmath

git-svn-id: trunk@22040 -
 2012-08-08 19:35:45 +00:00