florian 8d0bdf2f16 + RiscV: vector registers		2024-12-25 10:34:46 +01:00
..
aasmcpu.pas
agrvgas.pas	+ more RiscV extensions	2024-11-17 15:05:35 +01:00
aoptcpurv.pas	* apply Addi0Op2Op to more operations	2024-12-13 22:24:57 +01:00
cgrv.pas	+ more RiscV extensions	2024-11-17 15:05:35 +01:00
cpubase.pas	* typo corrected	2024-12-02 22:45:34 +01:00
hlcgrv.pas
itcpugas.pas
nrvadd.pas	* RiscV: more reliable use_fma	2024-11-18 22:32:55 +01:00
nrvcnv.pas
nrvcon.pas
nrvinl.pas
nrvset.pas	+ RiscV64: apply OptPass1OP also to addiw	2024-11-13 22:56:13 +01:00
pararv.pas	* RiscV: floating point registers are saved only for hard float ABIs	2024-12-25 10:16:39 +01:00
rarv.pas
rarvgas.pas
rgcpu.pas
rvreg.dat	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00