fpc/compiler/mips
2015-10-21 12:14:49 +00:00
..
aasmcpu.pas * MIPS: fixed O_MOVE_SOURCE and O_MOVE_DEST constants (they were swapped, amazing that it ever worked with such a mistake). 2014-09-03 19:57:46 +00:00
aoptcpu.pas * mips: Fixed internal error 2014061703 when optimization are enabled. 2015-10-21 12:14:49 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas + added tasmlist parameter to getintparaloc() (needed for llvm) 2015-04-04 14:29:16 +00:00
cpubase.pas * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
cpuelf.pas + added class type property CObjSymbol to TExeOutput as well 2015-08-25 16:07:59 +00:00
cpugas.pas * Removed unused vars for mipsel compiler. 2015-09-17 15:46:30 +00:00
cpuinfo.pas Moved tcontrollerdatatype out into cpuinfo. 2015-09-07 20:36:54 +00:00
cpunode.pas + support overriding tdef/tsym methods with target-specific functionality: 2014-03-29 22:31:55 +00:00
cpupara.pas * changed getpointerdef() into a tpointerdef.getreusable() class method 2015-06-22 08:17:49 +00:00
cpupi.pas * Moved fixup_jmps to target-specific classes for powerpc,powerpc64 and MIPS, cleaned out remaining $ifdef's. A slight functionality change is that fixup_jmps is now called before adding the procedure end symbol, not after, but that should not matter. 2014-04-02 14:17:23 +00:00
cputarg.pas * partially merged the mips-embedded branch of Michael Ring: 2014-03-19 21:25:38 +00:00
hlcgcpu.pas * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because 2014-08-19 20:22:54 +00:00
itcpugas.pas * Removed unused vars for mipsel compiler. 2015-09-17 15:46:30 +00:00
mipsreg.dat * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 2014-06-22 22:01:44 +00:00
ncpuadd.pas * Removed unused vars for mipsel compiler. 2015-09-17 15:46:30 +00:00
ncpucall.pas * MIPS: clean up 2014-03-04 08:42:45 +00:00
ncpucnv.pas * replaced current_procinfo.currtrue/falselabel with storing the true/false 2015-08-27 18:28:57 +00:00
ncpuinln.pas * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 2014-03-10 09:01:05 +00:00
ncpuld.pas
ncpumat.pas * synchronised with r28168 of trunk 2014-07-05 21:30:28 +00:00
ncpuset.pas * Removed unused vars for mipsel compiler. 2015-09-17 15:46:30 +00:00
opcode.inc + MIPS: added movn and movz instructions. 2014-06-19 22:44:17 +00:00
racpugas.pas * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 2014-06-22 22:01:44 +00:00
rgcpu.pas * synchronized with privatetrunk till r30095 2015-03-05 20:32:15 +00:00
rmipscon.inc * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 2014-06-22 22:01:44 +00:00
rmipsdwf.inc * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
rmipsgas.inc * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
rmipsgri.inc * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
rmipsgss.inc
rmipsnor.inc * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
rmipsnum.inc * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
rmipsrni.inc * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
rmipssri.inc * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
rmipssta.inc * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
rmipsstd.inc * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 2014-06-17 23:15:34 +00:00
rmipssup.inc * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 2014-06-22 22:01:44 +00:00
strinst.inc + MIPS: added movn and movz instructions. 2014-06-19 22:44:17 +00:00
symcpu.pas o fixes handling of iso i/o parameters/program parameters: 2015-05-01 20:58:31 +00:00