fpc/compiler/mips
2016-02-23 21:28:46 +00:00
..
aasmcpu.pas * MIPS: reworked and fixed procedure fixup_jmps: 2016-02-12 13:53:04 +00:00
aoptcpu.pas + Next portion of MIPS peephole optimizations. Get more aggressive and do more than a single pass if needed, enabling optimization of instructions that logically turn into MOVE due to register renaming. 2016-02-13 12:33:30 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas * MIPS: Fixed code generation for PIC calls to local functions. Uncovered by r32803, before that the buggy branch was never taken because all functions were global. 2016-01-04 18:13:18 +00:00
cpubase.pas
cpuelf.pas
cpugas.pas - MIPS: removed the ugly hack of splitting LDC1/SDC1 instructions into pairs of LWC1/SWC1 at assembler writer level. It probably was there as a workaround for insufficient alignment of double-precision variables, which was present once, but fixed a long time ago. 2016-02-11 15:09:19 +00:00
cpuinfo.pas Moved tcontrollerdatatype out into cpuinfo. 2015-09-07 20:36:54 +00:00
cpunode.pas
cpupara.pas * support marking defs created via the getreusable*() class methods as 2015-11-04 20:46:18 +00:00
cpupi.pas
cputarg.pas
hlcgcpu.pas
itcpugas.pas * Removed unused vars for mipsel compiler. 2015-09-17 15:46:30 +00:00
mipsreg.dat
ncpuadd.pas * Removed unused vars for mipsel compiler. 2015-09-17 15:46:30 +00:00
ncpucall.pas
ncpucnv.pas
ncpuinln.pas
ncpuld.pas
ncpumat.pas
ncpuset.pas * Removed unused vars for mipsel compiler. 2015-09-17 15:46:30 +00:00
opcode.inc
racpugas.pas * Handle possible relocation types in assembler reader using a single AS_RELTYPE token, rather than with individual tokens for each case. Since possible relocations are target-dependent, this will allow to support any amount of them without modifying the base tattreader class. 2016-02-23 21:28:46 +00:00
rgcpu.pas
rmipscon.inc
rmipsdwf.inc
rmipsgas.inc
rmipsgri.inc
rmipsgss.inc
rmipsnor.inc
rmipsnum.inc
rmipsrni.inc
rmipssri.inc
rmipssta.inc
rmipsstd.inc
rmipssup.inc
strinst.inc
symcpu.pas