florian f32eaa1564 * skeleton to unify the RiscV paramgr ... * first routines unified		2024-12-15 15:29:05 +01:00
..
aasmcpu.pas	+ RiscV: initial support of pic generation	2021-03-13 16:18:00 +00:00
agrvgas.pas	+ more RiscV extensions	2024-11-17 15:05:35 +01:00
aoptcpurv.pas	* apply Addi0Op2Op to more operations	2024-12-13 22:24:57 +01:00
cgrv.pas	+ more RiscV extensions	2024-11-17 15:05:35 +01:00
cpubase.pas	* typo corrected	2024-12-02 22:45:34 +01:00
hlcgrv.pas
itcpugas.pas	+ Risc-V: instructions of B extension	2024-08-12 21:51:22 +02:00
nrvadd.pas	* RiscV: more reliable use_fma	2024-11-18 22:32:55 +01:00
nrvcnv.pas
nrvcon.pas
nrvinl.pas	* FCVT.W.D returns only a 32 bit int	2024-08-17 18:24:16 +02:00
nrvset.pas	+ RiscV64: apply OptPass1OP also to addiw	2024-11-13 22:56:13 +01:00
pararv.pas	* skeleton to unify the RiscV paramgr	2024-12-15 15:29:05 +01:00
rarv.pas	* unified RiscV32 and RiscV64 GAS readers	2021-03-07 08:53:03 +00:00
rarvgas.pas	* Risc-V: allow also register aliases in register modification lists after asm blocks, last part to resolve #39738	2022-06-03 22:54:18 +02:00
rgcpu.pas
rvreg.dat	* unified Risc-V 32 and 64 register data file	2022-05-30 21:10:34 +02:00