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130 Commits

Author SHA1 Message Date
florian
2e86cdb620 * allow swapping of operands for three operand instructions if they are commutative 2024-04-22 22:25:37 +02:00
florian
fd68d3bfbb * ensure that left and right have a result type set in tx86addnode.pass_1, resolves #40727 2024-04-08 22:53:34 +02:00
J. Gareth "Curious Kit" Moreton
2b7df4237b * nf_pass1_done, nf_error, nf_processing and nf_do_not_execute 
have been moved to a new "transientflags" node field that
    isn't stored in PPU files
 2024-03-24 18:14:49 +00:00
J. Gareth "Curious Kit" Moreton
b804fc5164 * Flags specific to TAddNode have been moved to their own field 2024-03-02 21:31:21 +01:00
J. Gareth "Curious Kit" Moreton
2a44ffe51b * x86: BZHI optimisation now sets the subtract and shift nodes to 'do not execute' as they are skipped over. 2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton
16bd996e74 * x86: 'and not' optimisation now sets the NOT node to 'do not execute' as it is skipped over 2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton
7da9b4a988 * x86: The code generator will now attempt to manipulate "x and ((1 shl y) - 1)" to use BZHI 2022-11-06 15:42:09 +00:00
J. Gareth "Curious Kit" Moreton
a1ea1dd98e * x86: Changed BMI2 check to BMI1 for ordinal ANDN optimisation 2022-10-22 21:08:36 +00:00
J. Gareth "Curious Kit" Moreton
626e23d89f * x86: The code generator will now attempt manipulate "x and (not y)" (where x and y are ordinals) to use ANDN. 2022-10-22 13:13:44 +00:00
florian
f097d1ea35 * use the bts instruction on x86 if possible, the reg,reg variant is better than a mov/shl/or sequence 2022-09-05 23:24:05 +02:00
J. Gareth "Curious Kit" Moreton
6f24c8b4ef * x86: Code generation fixes where FLAGS 
register is not properly allocated.
 2022-04-27 20:46:32 +00:00
J. Gareth "Curious Kit" Moreton
9b4033fa80 Fast mod 2022-01-30 08:22:39 +00:00
J. Gareth "Curious Kit" Moreton
2dc0995067 - Bug fix to new ADD/SUB optimisation where conditions are concerned 
- Register allocation fixes for overflow checks
 2021-11-17 20:18:57 +00:00
florian
01d6358f93 * some fixes for expectloc 2021-09-22 22:09:19 +02:00
Florian Klämpfl
e121a753e1 * mark temps as deallocated 
(cherry picked from commit 50452e5707b1d5f8590042ed55fc5f47bce33962)
 2021-09-15 20:41:16 +02:00
Yuriy Sydorov
b8befe3d1f * Fixed a typo in the condition, though it seems this code path is not used now. 2021-09-15 12:25:48 +03:00
florian
c02b43fb93 * change fma cpu flag into an fpu flag 
git-svn-id: trunk@49448 -
 2021-06-01 21:16:52 +00:00
florian
e46b426ca1 + tx86addnode.second_opvector makes use of AVX instructions 
git-svn-id: trunk@47345 -
 2020-11-08 19:39:17 +00:00
florian
637976e83f * patch by Marģers to unify internal error numbers, resolves #37888 
git-svn-id: trunk@47103 -
 2020-10-13 19:59:01 +00:00
florian
043c3df292 * properly handle boolean64 xor boolean64 on i386 
git-svn-id: trunk@45804 -
 2020-07-18 18:32:17 +00:00
florian
b2ed667a86 * swap fpu stack correctly when moving data into xmm registers 
git-svn-id: trunk@45637 -
 2020-06-11 17:19:56 +00:00
florian
5f67d830e7 * better rules if a 3 op mul operation is tried 
git-svn-id: trunk@45605 -
 2020-06-06 19:21:04 +00:00
florian
b4de0b2e9c * insert fwait after fcompp, resolves #37136 
git-svn-id: trunk@45500 -
 2020-05-25 20:38:19 +00:00
florian
97efb03ae6 * call x86 addordinal for non short boolean evaluated boolean nodes 
as this results in better code

git-svn-id: trunk@45404 -
 2020-05-17 17:41:44 +00:00
florian
fca4d3315b * let the operation do the type conversion for x87 floating point operations 
git-svn-id: trunk@43867 -
 2020-01-05 17:47:23 +00:00
florian
3c16324f80 * x86: avoid to put variables into registers if they are handled by the x87-FPU 
git-svn-id: trunk@43856 -
 2020-01-03 22:23:49 +00:00
florian
91f3f022fe * MM registers which might not be changed can be still used in 3 op mathematical operations as source 
git-svn-id: trunk@43509 -
 2019-11-17 14:48:45 +00:00
florian
5f3050961f * load left properly into a register in tx86addnode.second_addordinal, resolves #36287 
git-svn-id: trunk@43449 -
 2019-11-10 21:45:57 +00:00
florian
c8f746b881 * do not allocate an extra register for some integer operations if not needed 
git-svn-id: trunk@43412 -
 2019-11-07 21:08:08 +00:00
Jonas Maebe
ce598c15ec * factored out the conditions under which add nodes need to perform 
overflow checks
   o in particular ensure that cpu-specific overrides don't perform overflow
     checks when nf_internal is set

git-svn-id: trunk@42573 -
 2019-08-03 12:19:50 +00:00
Jonas Maebe
281b3ad276 * fix case completeness and unreachable code warnings in compiler that would 
be introduced by the next commit

git-svn-id: trunk@42046 -
 2019-05-12 14:29:03 +00:00
pierre
9c90f593ab Add global range check disable for i8086 cgcpu and x86 nx86add units 
git-svn-id: trunk@40124 -
 2018-10-31 23:20:29 +00:00
Jonas Maebe
4686f61002 * keep track of the temp position separately from the offset in references, 
so that they can still be freed after the reference has been changed
    (e.g. in case of array indexing or record field accesses) (mantis #33628)

git-svn-id: trunk@38814 -
 2018-04-22 17:03:16 +00:00
florian
088af633ba Fix casing, bug ID #38660 
git-svn-id: trunk@38660 -
 2018-04-02 08:53:31 +00:00
florian
9b18e39c81 * enable Lea2AddBase and Lea2AddIndex in TX86AsmOptimizer.PostPeepholeOptLea as we have flag tracking now 
* some flag allocations fixed

git-svn-id: trunk@38501 -
 2018-03-11 20:30:09 +00:00
florian
d86ffb9bfb + tcg.a_op_loc_reg 
+ optimized tx86addnode.second_ordinal for x86

git-svn-id: trunk@38500 -
 2018-03-11 16:32:26 +00:00
nickysn
efc5e339d0 * use an enum instead of integer constants to represent inline numbers 
* compinnr.inc include file converted to a unit
* inline number field size stored in ppu increased from byte to longint
* inlines in the parse tree (when written with the -vp option) now printed with
  their enum name, instead of number

git-svn-id: trunk@36174 -
 2017-05-10 14:41:43 +00:00
florian
b1dff29cbf * removed unused units 
git-svn-id: trunk@36165 -
 2017-05-09 19:53:14 +00:00
Jonas Maebe
a25ebbba3e + added volatility information to all memory references 
o separate information for reading and writing, because e.g. in a
     try-block, only the writes to local variables and parameters are
     volatile (they have to be committed immediately in case the next
     instruction causes an exception)
   o for now, only references to absolute memory addresses are marked
     as volatile
   o the volatily information is (should be) properly maintained throughout
     all code generators for all archictures with this patch
   o no optimizers or other compiler infrastructure uses the volatility
     information yet
   o this functionality is not (yet) exposed at the language level, it
     is only for internal code generator use right now

git-svn-id: trunk@34996 -
 2016-11-27 18:17:37 +00:00
Jonas Maebe
da696057ab * converted register_maybe_adjust_setbase() to the high level code generator 
git-svn-id: trunk@32591 -
 2015-12-05 18:03:37 +00:00
nickysn
457107d165 * check UseIncDec before generating an INC instruction in tx86addnode.emit_generic_code 
git-svn-id: trunk@32057 -
 2015-10-15 13:11:47 +00:00
yury
e04a3b4ac6 * Removed unused vars for x86 compiler. 
git-svn-id: trunk@31743 -
 2015-09-17 15:20:15 +00:00
florian
c9b1df2c91 * the test $-1,%reg optimization shall be done not only if the cpu type is i386, but for the i386 compiler 
git-svn-id: trunk@31474 -
 2015-08-31 20:03:56 +00:00
Károly Balogh
249a60b28b x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run. 
git-svn-id: trunk@28496 -
 2014-08-20 10:21:06 +00:00
florian
499dd078e3 + automatically insert fma inlines into floating point code if possible and fastmath is activated 
git-svn-id: trunk@28382 -
 2014-08-11 20:50:21 +00:00
sergei
2ee0c8de45 * i386: For integer comparisons with zero, emit "test $-1,%reg" instead of "test %reg,%reg". It is more spilling-friendly, because it transforms into "test $-1,spilltemp" and does not require a register. 
* Improved peephole optimizer to remove these instructions if preceded by flag-setting instruction that operates on same location and followed by conditional jump, and change them back into "test %reg,%reg" otherwise.

git-svn-id: trunk@27617 -
 2014-04-20 19:16:58 +00:00
sergei
07e90aaa24 + Implemented IEEE 754-compliant checking for unordered results of floating-point compares on x86 targets. Mantis #9362. 
git-svn-id: trunk@27581 -
 2014-04-14 12:36:11 +00:00
sergei
3e20a136f3 * tx86addnode.second_addfloat: use single and double-precision memory locations without loading them on FPU stack if possible. 
git-svn-id: trunk@27558 -
 2014-04-13 12:37:30 +00:00
sergei
ebdbf21650 * tx86addnode.second_cmpfloatsse and tx86addnode.second_cmpfloatavx are identical except instruction opcodes -> merged into second_cmpfloatvector, cleaned up, and allowed constant operands at both sides. 
git-svn-id: trunk@27314 -
 2014-03-28 09:04:28 +00:00
sergei
965540eab3 * Let tx86addnode.check_left_and_right_fpureg() act as when its argument was=true (removed argument and renamed to force_left_and_right_fpureg). Its action when force_fpureg=false is now coded separately. 
git-svn-id: trunk@27299 -
 2014-03-27 11:42:24 +00:00