differentiate between 64 bit and 128 bit (R_SUBMMWHOLE) SSE vector regs,
and support spilling/assembling for R_SUBQ SSE registers (8 bytes)
(mantis #23962)
We currently never use the full 128 bit of an SSE register, and
spilling for those hasn't been implemented yet either (R_SUBMMWHOLE
SSE regs are spilled into a 4-byte temp currently -> can overwrite data)
git-svn-id: trunk@23700 -
* If possible, use reference base instead of index, this yields shorter instructions.
* Added comment about offset limits for rip-relative addressing.
- Removed code related to taking threadvar address on win32, it is incorrect because Windows TLS is not directly accessible via segment registers (fs:0x2c points to array of pointers to TLS storages of each module, so at least double indirection is needed).
git-svn-id: trunk@23342 -
TRegNameTable is defined in compiler/rgbase.pas and is an array of
strings, limited to the maximum length of the used register names.
r22792 added a long register name but did not scale the string-size
enough, resulting in the compiler built breaking for arm.
git-svn-id: trunk@22817 -
fixes a couple of arm-embedded stuff,
adds some controllers, start of fpv4_s16 support, for a complete list of
changes see below:
------------------------------------------------------------------------
r22787 | laksen | 2012-10-20 22:00:36 +0200 (Sa, 20 Okt 2012) | 1 line
Properly do NR_DEFAULTFLAGS detection/allocation/deallocation
------------------------------------------------------------------------
r22782 | laksen | 2012-10-20 07:44:55 +0200 (Sa, 20 Okt 2012) | 1 line
Fixed flags detections code for wide->short optimization code for Thumb-2
------------------------------------------------------------------------
r22778 | laksen | 2012-10-19 20:23:14 +0200 (Fr, 19 Okt 2012) | 1 line
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
------------------------------------------------------------------------
r22647 | laksen | 2012-10-14 21:28:08 +0200 (So, 14 Okt 2012) | 1 line
Added register specifications to lpc1768.pp. From Joan Duran
------------------------------------------------------------------------
r22646 | laksen | 2012-10-14 21:10:20 +0200 (So, 14 Okt 2012) | 4 lines
Fixed some minor formating issues
Implemented a small heap mananger
Implemented console IO
Changed default LineEnding to CrLf(to ease console IO parsing)
------------------------------------------------------------------------
r22599 | laksen | 2012-10-09 08:58:58 +0200 (Di, 09 Okt 2012) | 1 line
Added all STM32F1 configurations
------------------------------------------------------------------------
r22597 | laksen | 2012-10-08 22:10:45 +0200 (Mo, 08 Okt 2012) | 1 line
Added initial support for the Cortex-M4F FPv4_S16 FPU
------------------------------------------------------------------------
r22596 | laksen | 2012-10-08 22:04:14 +0200 (Mo, 08 Okt 2012) | 1 line
Added FPv4_d16 FPU instructions, and a few extra registers
------------------------------------------------------------------------
r22592 | laksen | 2012-10-08 16:07:40 +0200 (Mo, 08 Okt 2012) | 2 lines
Added support for IT block merging
Added a peephole pattern check for UXTB->UXTH chains
------------------------------------------------------------------------
r22590 | laksen | 2012-10-08 14:30:00 +0200 (Mo, 08 Okt 2012) | 3 lines
Add CBNZ/CBZ instructions
Create preliminary Thumb-2 PeepHoleOptPass2 code, hacked together from the ARM mode code
Added a number of simple size optimizations for common Thumb-2 instructions
------------------------------------------------------------------------
r22582 | laksen | 2012-10-08 06:49:39 +0200 (Mo, 08 Okt 2012) | 3 lines
Fix optimizations of Thumb-2 code
Fix problem with loading of condition operand for IT instructions
Properly split IT blocks when register allocator tries to spill inside a block.
------------------------------------------------------------------------
r22581 | laksen | 2012-10-08 05:15:40 +0200 (Mo, 08 Okt 2012) | 4 lines
Fixed assembler calling command line for cpus>ARMv5TE. EDSP instructions will generate errors while assembling, due to RTL assembler routines
Updated boot code for all Cortex-M3 controllers, and sc32442b to use weak linking for exception tables.
Cortex-M3 devices now also share initialization routine to simplify maintenance
STM32F10x classes now have specific units which fit the interrupt source names and counts
------------------------------------------------------------------------
r22580 | laksen | 2012-10-08 05:10:44 +0200 (Mo, 08 Okt 2012) | 2 lines
Added support for .section, .set, .weak, and .thumb_set directive for GAS assembler reader
IFDEF'ed JVM specific assembler directives, to prevent ait_* set to exceed 32 elements
------------------------------------------------------------------------
r22579 | laksen | 2012-10-08 02:10:52 +0200 (Mo, 08 Okt 2012) | 3 lines
Remove all traces of the interrupt vector table generation mechanism
Clean up cpuinfo tables
Fixed ARMv7M bug(BLX <label> doesn't exist on that version)
git-svn-id: trunk@22792 -
symbols on darwin/ppc and darwin/i386, and also for common symbols on
darwin/ppc, as they're not required for other kinds of symbols on those
platforms (gcc doesn't use them either with -O1 and higher; it does use
them always for darwin/ppc64 except for local symbols, and hence so do we)
git-svn-id: trunk@22271 -
(mantis #22665)
+ support "[var wrt ..gotpcrel]" nasm/yasm syntax in intel assembler mode
for GOT-relative accesses on x86-64, + give an error when trying to do
this on win64 (it doesn't have a GOT)
* moved code that give a warning when using GOT-relative accesses to
static data on x86-64 from the AT&T reader to rax86 so it's also
active for the Intel assembler reader
+ added warning when not using GOT-relative accesses (but plain
RIP-relative instead) to global data on non-Win64 x86-64
git-svn-id: trunk@22243 -
assembler writers on x86-64 after r22181, the shift in positions
caused every occurrence of RIP to become EIP in the assembler code)
git-svn-id: trunk@22234 -
after all, although for some reason the problems only showed up with the
external assembler on x86-64 platforms other than Darwin. Now we never use
GOT entries on x86-64 anymore for local symbols, regardless of their nature,
and instead use plain RIP-relative addressing for them.
git-svn-id: trunk@21924 -
fist(t)pq instructions (mantis #22331)
* also internalerror in case the internal fpu stack position counter
becomes larger than 7, so we don't have to wait for the entire
byte to overflow before we detect a problem
git-svn-id: trunk@21734 -
future use by high level code generator targets
o this in turn required that all a_load*_loc* methods are called via
hlcg rather than via cg, since a location can be a subsetref/reg and
and those are no longer handled in tcg
o that then required moving several force_location_* routines into
thlcg because they use a_load_loc*, but did not take tdef size
parameters (which are required by the thlcg a_load_loc* routines)
o the only practical consequence is that from now on, you have to
use hlcg.location_force_mem/reg() (fpureg not yet) and
hlcg.gen_load_loc_cgpara() instead of the removed versions from ncgutil,
and hlcg.a_load*loc*() instead of cg.a_load*loc* if a subsetref/reg
might be involved
git-svn-id: trunk@21287 -
that deal with paths/filenames with TPathStr (= ansistring) to prevent
cutting off long paths (no change in speed when compiling the compiler,
1% extra memory usage)
git-svn-id: trunk@21120 -
o support for the new codepage-aware ansistrings in the jvm branch
o empty ansistrings are now always represented by a nil pointer rather than
by an empty string, because an empty string also has a code page which
can confuse code (although this will make ansistrings harder to use
in Java code)
o more string helpers code shared between the general and jvm rtl
o support for indexbyte/word in the jvm rtl (warning: first parameter
is an open array rather than an untyped parameter there, so
indexchar(pcharvar^,10,0) will be equivalent to
indexchar[pcharvar^],10,0) there, which is different from what is
intended; changing it to an untyped parameter wouldn't help though)
o default() support is not yet complete
o calling fpcres is currently broken due to limitations in
sysutils.executeprocess() regarding handling unix quoting and
the compiler using the same command lines for scripts and directly
calling external programs
o compiling the Java compiler currently requires adding ALLOW_WARNINGS=1
to the make command line
git-svn-id: branches/jvmbackend@20887 -
pass on whether the symbol refers to code or data (important for
AIX weak symbols; note that AIX does not support undefined weak
external symbols, and FPC does not yet support weakly defining
non-external symbols, so this functionality isn't really used yet)
git-svn-id: trunk@20802 -
of the AVR-specific ifdef'ed variant
o since the only special character we use in mangled names on all platforms
is $, added a new field to tasminfo called "dollarsign" that holds the
character $'s should be replaced with (if it doesn't have to be replaced,
leave it at $)
git-svn-id: trunk@20801 -
* Don't generate rex.w for "CALL|JMP|LCALL|LJMP regmem", they are 64-bit by default.
* LCALL,LJMP flagged as calljump instructions.
* LCALL,LJMP encode only far jumps and don't accept register operands.
* GAS writer: fixed writing rip-relative operands of calljump instructions.
+ test.
git-svn-id: trunk@19413 -
* eliminate warnings in compiler (i386 & i368->x86_64) and minor refactorings
- comment out unused vars and types
- comment out unneeded comparisons (Longword <=> 0)
- suppress some "comparison always true|false" warnings
- tweak visiblity sections
git-svn-id: trunk@19385 -
* Insert seh_endprologue directive after the last prologue instruction, not before it
* Omit seh_stackalloc for zero bytes
* (For now) ignore SEH directives in NASM and MASM writers, instead of failing with internal error.
git-svn-id: trunk@19246 -
* For now placed actual processing of unwind info under {$ifdef TEST_WIN64_UNWIND}, because in the current state it doesn't add much value.
git-svn-id: trunk@19200 -
accidentally committed a long time ago (it was done to test the
generic hlcg conversion -- which in a sense was good, because it
just uncovered the bug fixed in svn trunk r18792, i.e. a bug
not specific to the hlcg conversion)
git-svn-id: branches/jvmbackend@18795 -
in a single statement, to be added later)
o the unicodestrings are internally simply java.lang.String instances
o at the language level, the unicodestrings are assignment-compatible
with java.lang.String
o constant strings can be implicitly converted to java.lang.String
o since java.lang.String is immutable, in particular changing a
single character in a string is extremely inefficient. This could
be solved by letting unicodestring map to java.lang.StringBuilder,
but that would make integration with plain Java code harder
git-svn-id: branches/jvmbackend@18470 -
since the definition-specific adorning of JVM mangled names is Jasmin-
specific, and such code has no place in symdef
* moved code to adorn JVM mangled names for Jasmin definitions to agjasmin
git-svn-id: branches/jvmbackend@18346 -
o changed type of opsize field of tcgcasenode from tcgsize into tdef,
and fixed compilation of other code generator units after this change
git-svn-id: branches/jvmbackend@18339 -
renamed refactored routine to do_release_unused_return_value()
which by default releases temps, and if something else needs to
be done override (and call inherited if temps may have to be
released)
git-svn-id: branches/jvmbackend@18327 -
whether the mangled name is for defining a symbol, or for referencing
it later (e.g. for a call or load of its address). The reason is that
on the JVM both cases are different.
+ jvmdef unit to encode types according to the JVM rules
+ tprocdef.jvmmangledname() to encode a procdef's JVM mangled name
(the common part of defining/referencing it; tprocdef.mangledname
afterwards adorns it as required)
git-svn-id: branches/jvmbackend@18288 -
- memory usage of a compiler compilation increases by approx. 2 per cent due to this
- actually docs say avx has operations with 5 parameter, however I were not able to find
an instruction having 5 operands
git-svn-id: trunk@18202 -
* Adjust rip-relative offsets using values known from calcsize, instead of reinterpreting the tail of instruction. This is simpler and remains the same regardless of particular codes used in opcode table.
* Reduced maxinfolen to 8.
- 'jmp imm64' and 64-bit versions of 'in' do not exist, removed.
git-svn-id: trunk@17546 -
* mkx86ins.pp: 'regmem' operand type in x86ins.dat must be converted to OT_RM_GPR, not OT_REGMEM. The latter does not restrict register type, allowing to use e.g. xmm registers in place of regular ones.
* Finished 'movd' and 'movq', added some tests for them to tasm2.pp.
git-svn-id: trunk@17515 -
* Optimized the opcode representation of movq and remaining 3DNow instructions
* Disallow immediates not fitting in 32 bits (Mantis #14685) + test
* Disallow push/pop with 32-bit operands in x86_64 + test
git-svn-id: trunk@17490 -
* Factored repeating REX operations into a separate function.
* Fixed instruction matching bug which was preventing compilation of 3-operand SIMD instructions with RIP-relative operand + test.
* Do not adjust offset of RIP-relative reference if it is a literal number, this was causing 0x123(%rip) to assemble as 0x122(%rip) in 3-operand instructions. Now tasm2.pp is the same with and without -Aas. Also fixed the expected result, improved verbosity of diagnostic and removed %norun, so it is actually executed.
+ Disallow high-byte registers in instructions requiring REX + test.
git-svn-id: trunk@17478 -
- Removed remaining address-size control codes \300 and \301
- Also removed codes \323, they are no longer necessary once REX is being written on the first literal.
git-svn-id: trunk@17457 -
* Using ot_mmxrm and ot_xmmrm operand types to match arguments, reduces number of required entries by half.
* Replaced all literal $66, $F2 and $F3 prefixes with control codes (\361, \334 and \333, respectively).
* Prefix control codes imply writing REX, so code \323 after them is no longer necessary, removed.
* Fixed technology flags (SSSE3, SSE4.1, SSE4.2)
- Removed codes \300 and \301 (intended to generate address size prefix). FPC does not support this feature (the prefix itself is generated, but process_ea rejects operands needing non-default address size). Probably we don't even need to support it. But if we do, a much simpler solution is check all operands, like today's NASM does.
* Fixed/added some instructions along the way, namely CRC32, UNPCKHPD, CMPNEQSD.
git-svn-id: trunk@17437 -
* Simplified REX handling: instead of useless adjusting instruction length on every REX change, adjust it just once, based on the final REX value.
* Similar for omitting REX.W in certain instructions: set a flag and consider it once the entire instruction has been processed. This removes the requirement for \335 to be the last opcode.
* maybewriterex also after $F2 prefix
* Fixed behavior of codes \310 and \311 (16- and 32-bit address respectively), this is needed for a few fancy instructions like LOOP and JCXZ, which honor address-size prefix instead of REX.
+ control code \361 for $66 prefix
+ IF_SSSE3, IF_SSE41, IF_SSE42 instruction flags (with dummy values)
x86/x86ins.dat:
* replaced literal $67 prefixes with \310 or \311
* marked encodings containing code \310 as NOX86_64
* replaced literal $48 prefixes with \326
git-svn-id: trunk@17433 -
* AESKEYGENASSIST is not ATT-specific name, it is used by Intel-style assemblers as well. Also updated tests/test/taes1.pp to reflect the change.
+ Added SCASQ, resolves#16730 (other opcodes mentioned in that report were added/fixed earlier)
git-svn-id: trunk@17431 -
* x86ins.dat: replaced codes \17 with literal zeros. They aren't necessary for FPC, and they were removed from NASM quite a while ago.
git-svn-id: trunk@17430 -
* Modified taicpu.Pass2 to exclude non-definitely assigned variable and issue InternalError if impossible segment prefix is used.
git-svn-id: trunk@17374 -
* tb0267.pp required patching due to 'fildw' instruction at line 72, which is rejected by GAS. Before this commit, FPC was silently converting it to 'filds', so it went unnoticed. Now FPC rejects 'fildw' like GAS does.
git-svn-id: trunk@17363 -
+ Added new value TAttSuffix.attsufINTdual, assigned it to movsX and movzX instructions
* Moved suffix-to-size translation tables from rax86att.pas to itcpugas.pas
+ Added x86_64 specific suffix-to-size translation, enabling BQ and WQ suffixes (LQ seems unnecessary at the moment)
* Fixed logic of tx86attreader.is_asmopcode so it only assigns dual suffix to instructions that explicitly allow it. This disambiguates cases like movsbq=movs+bq vs. cmovbq=cmovb+q
* As a net result: movz[bw]q and movs[bw]q now compile for x86_64; cmovbw and cmovbl which were incorrectly handled for i386 are now fixed.
+ Test for correct assembling of cmov.
git-svn-id: trunk@17353 -
+ parsing of section directive for variables
+ section test
+ write section names in the assembler/binary writers correctly
* allow section only after ; and for embedded targets
git-svn-id: branches/usersections@17154 -
relocations for addr_pic_no_got references (do not go via the GOT)
* fixed code generator so that it generates addr_pic_no_got references
also for platforms that use the internal assembler (this will break linking
of some tests that check static data > 2GB on Linux/x86-64, but they were
already broken before as well because we don't use the "huge" x86-64
execution model)
* fixed x86-64 Linux syscall code to not expect GOT-based relocations for
the system unit's errno variable (it's an implementation-only variable)
git-svn-id: trunk@16717 -
later: the same as i386/darwin, except
a) uses the non-fragile Objective-C ABI/runtime
b) does not require stubs for direct calls/jumps (not required for
i386/darwin under 10.6 and later either, but still generated
there for backwards compatibility)
c) only the same packages are enabled as for ARM/Darwin
d) MacOSAll is compiled specifically for the iPhoneSimulator SDK
This target also defines the symbol "darwin" apart from the target
name "iphonesim" for source code compatibility reasons.
git-svn-id: trunk@16065 -
* disallow pushfd/popfd for x86_64 (mantis #14862)
* fixed assembling popfq with the internal assembler (it needs a rex.w
prefisx, while pushfq doesn't)
* changed the default opcode size of pushf/popf/pusha/popa in
{$asmmode intel} from "native size" to 16 bit (compatible with Intel
manuals and Kylix; in AT&T mode, the default size for those operations
remains the native one)
* changed pushf/popf in rtl/i386/* into pushfd/popfd because of the
previous change
git-svn-id: trunk@15546 -
- sort of reverted r14134, which is no longer required after the above
change (new_section() inserts the alignment itself)
* made the tai_section.create() constructor private so it cannot be
called directly anymore
git-svn-id: trunk@15482 -
used to store a record function result in an MM/FPUREGISTER to memory
(the register size will be OS_F32/OS_F64, while the memory size will
be OS_32/OS_64 -> convert the latter to the former)
* extended tcalext6 to also test this scenario
git-svn-id: trunk@15385 -
because on linux/x86_64
a) the resulting code crashes when using the internal assembler
b) refuses to link when using the external assembler
(and hence I don't know whether it's safe to do on other non-darwin
platforms either) -- fixes mantis #15889
git-svn-id: trunk@14971 -
the opposite meaning, af_stabs_use_function_absolute_addresses), because it
is different on Darwin for the internal and external assembler)
git-svn-id: trunk@14342 -
mark_NoLineinfoEnd
* add "no line info" markers for try/except and try/finally internal cleanup
code, so the debugger doesn't jump back and forth between the end and start
of exception blocks when you arrive at the end
* honour "no line info" markers in dbgdwarf.pas
git-svn-id: trunk@14327 -
+ RTL support:
o VFP exceptions are disabled by default on Darwin,
because they cause kernel panics on iPhoneOS 2.2.1 at least
o all denormals are truncated to 0 on Darwin, because disabling
that also causes kernel panics on iPhoneOS 2.2.1 (probably
because otherwise denormals can also cause exceptions)
* set softfloat rounding mode correctly for non-wince/darwin/vfp
targets
+ compiler support: only half the number of single precision
registers is available due to limitations of the register
allocator
+ added a number of comments about why the stackframe on ARM is
set up the way it is by the compiler
+ added regtype and subregtype info to regsets, because they're
also used for VFP registers (+ support in assembler reader)
+ various generic support routines for dealing with floating point
values located in integer registers that have to be transferred to
mm registers (needed for VFP)
* renamed use_sse() to use_vectorfpu() and also use it for
ARM/vfp support
o only superficially tested for Linux (compiler compiled with -Cpvfpv6
-Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
the fpu exception handler still needs to be implemented), Darwin has
been tested more thoroughly
+ added ARMv6 cpu type and made it default for Darwin/ARM
+ ARMv6+ implementations of atomic operations using ldrex/strex
* don't use r9 on Darwin/ARM, as it's reserved under certain
circumstances (don't know yet which ones)
* changed C-test object files for ARM/Darwin to ARMv6 versions
* check in assembler reader that regsets are not empty, because
instructions with a regset operand have undefined behaviour in that
case
* fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
int64->single type conversion
* fixed constant pool locations in case 64 bit constants are generated,
and/or when vfp instructions with limited reach are present
WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
code with -Cparmv6 (or higher), or you will get crashes. The reason is
that storing/restoring multiple VFP registers must happen using
different instructions on pre/post-ARMv6.
git-svn-id: trunk@14317 -
* the objc unit links against the Foundation instead of against the Cocoa
framework, and inludes an interface to either the fragile or non-fragile
obj-c run time depending on the target platform
+ support for the non-fragile Objective-C runtime/ABI, as used on Mac OS X
for ARM (iPhone) 64 bit (PowerPC/64, x86_64) -- all these targets now
are now also supported for the objectivec1 modeswitch
+ support for private_extern symbol bindings, required for the above
* mark objcclasses that are declared in the implementation section of a
unit as "hidden" (not sure what the effect is, since the Objective-C
runtime does not seem to do anything with this flag)
* enabled all obj-c tests for the newly supported platforms
git-svn-id: branches/objc@13763 -
U ide/fpusrscr.pas
U rtl/unix/video.pp
U rtl/i386/i386.inc
U rtl/win/wininc/defines.inc
U rtl/win/systhrd.inc
U rtl/linux/m68k/dllprt0.as
U rtl/linux/i386/syscall.inc
U rtl/linux/i386/dllprt0.as
U rtl/linux/i386/si_c.inc
U rtl/linux/i386/si_prc.inc
U rtl/linux/i386/si_c21.inc
U rtl/linux/i386/si_g.inc
U rtl/linux/i386/si_c21g.inc
U rtl/linux/i386/si_uc.inc
U rtl/linux/i386/si_dll.inc
U rtl/linux/x86_64/dllprt0.as
A tests/test/packages/hash/sha1test.pp
U tests/webtbs/tw12038.pp
U compiler/cclasses.pas
U compiler/symdef.pas
U compiler/ncon.pas
U compiler/ncgrtti.pas
U compiler/cgbase.pas
U compiler/pstatmnt.pas
U compiler/systems/t_linux.pas
U compiler/pass_1.pas
U compiler/x86/cgx86.pas
U compiler/x86/agx86att.pas
U compiler/x86/aasmcpu.pas
U compiler/aasmbase.pas
A packages/fcl-xml/tests/extras.pp
A packages/fcl-xml/tests/extras2.pp
--- Merging r13696 through r13760 into 'packages/fcl-xml/tests/README_DOM.txt':
U packages/fcl-xml/tests/README_DOM.txt
--- Merging r13696 through r13760 into '.':
U packages/fcl-xml/tests/domunit.pp
U packages/fcl-xml/src/xpath.pp
U packages/Makefile
U packages/gmp/src/gmp.pas
U packages/gmp/readme
U packages/fcl-db/src/base/db.pas
U packages/fcl-db/src/base/database.inc
U packages/sqlite/src/sqlite3.inc
U packages/fcl-web/src/custweb.pp
U packages/hash/fpmake.pp
U packages/hash/Makefile.fpc
A packages/hash/src/sha1.pp
U packages/hash/Makefile
U packages/hash/examples/Makefile.fpc
A packages/hash/examples/sha1test.pp
U packages/hash/examples/Makefile
U packages/Makefile.fpc
U packages/fcl-base/src/ascii85.pp
U packages/fcl-base/src/custapp.pp
U packages/chm/src/chmwriter.pas
U packages/chm/src/paslzx.pas
U packages/chm/src/chmreader.pas
--- Merging r13761 into '.':
U compiler/powerpc/agppcvasm.pas
U compiler/ppcgen/agppcgas.pas
git-svn-id: branches/objc@13762 -
a) it's unnecessary
b) it's slower than "direct" RIP-relative accessing
c) it's not supported on darwin/x86_64 in certain cases
* never use absolute addressing on darwin/x86_64 (like on win64)
* when not generating PIC, make sure that a_loadaddr_ref_reg on x86_64
also uses RIP-relative addressing for darwin/x86_64 and win64
git-svn-id: trunk@13760 -
register required classes:
+ add lazy references to classes referred to in the current unit
+ define reference symbols for classes defined in the current unit
+ add lazy references to parent classes of classes defined in the current
unit
git-svn-id: branches/objc@13679 -
