syntax in the x86 intel syntax asm reader; this is preparation for support of
segment overrides inside the reference expression (i.e. [es:bx] instead of
es:[bx])
git-svn-id: trunk@38363 -
[expr1][expr2] = [expr1+expr2]
[expr1[expr2]] = [expr1+expr2]
This is compatible with TP7's inline asm, and perhaps also with tasm/masm/delphi.
git-svn-id: trunk@38352 -
record field). This makes e.g.
test [di + recordtype], 1
work and use the size of recordtype to determine the operand size; recordtype
itself is evaluated to 0, so if recordtype's size is 2 bytes, the above
instruction assembles as:
test word ptr [di], 1
Ugly, but TP7 compatible.
git-svn-id: trunk@38176 -
which allows const symbol expressions to also have a size sometimes. Why?
Because TP7 (and perhaps Delphi) allows not specifying the size in e.g.
test [di+recordtype.recordfield], 1
in this case, the operand size (byte ptr, word ptr, dword ptr, qword ptr) is
determined by the size of recordtype.recordfield; this already happens with
variables, but in this case, this is a type.field, which is resolved to a
constant.
This commit only adds a dummy 'size' parameter, which is always initialized to
0 and not used. The actual implementation of the above will follow in separate
commits.
git-svn-id: trunk@38173 -
tx86intreader.BuildConstSymbolExpression; it returns whether the 'OFFSET'
keyword has been used in the expression. This will be used for disambiguation
between 'dd xx' and 'dd offset xx', because they should produce different
results on i8086 (the first generates a far pointer, i.e. the same as
'dw xx, SEG xx', the second - a 32-bit offset)
git-svn-id: trunk@38147 -
- xorq %reg,%reg (identical registers) is now changed to xorl %reg,%reg if doing so removes the REX prefix.
- movw %bx,%ax; andl $0xffff,%eax, for example, is now changed to movzwl %bx,%eax as long as a conditional operation doesn't follow 'and' (checks to see if the CPU flags are in use).
- movzbq and movzwq get optimised to movzbl and movzwl respectively if doing so removes the REX prefix.
- Removal of optimisation code that zero-extends from 32-bit to 64-bit, because there isn't actually a valid combination of opcodes for MOVZX that allows that (for registers,
just use MOV). This is not the case with MOVSX.
- movq is now optimised to movl even if the CPU flags are in use (this stops mov %reg,0 from being optimised to xor %reg,%reg if doing so breaks an algorithm that relies on them).
- Fixed typo in peephole message regarding movq to movl (it said movd instead).
- Made the peephole debug messages more consistent in formatting, some of which now have more detail.
* small fixes of the patch
git-svn-id: trunk@38070 -
- Moved the part that emits the CMOV command outside of the if-else block, because it's the same in both branches and was just duplicated code.
- Moved a comment about powers of 2 to be right before the correct if-else block.
- Added a couple of comments to explain what the algorithm is doing to obtain the remainder.
- Added missing "writeln('ok');" (since 'tmoddiv3.pp' has it) and program header to 'tmoddiv4.pp'.
- Changed program name from "testfile2" to "tmoddiv3" in 'tmoddiv3.pp'.
git-svn-id: trunk@37939 -
inline assembly, and fixed check after r35959 (mantis #32318)
o can also subscript parameters passed by value on the stack
o can also subscript local variables, the parameters passed by reference
that are subsequently copied into a local
git-svn-id: trunk@37886 -
retfq x86 instructions. These are variants of the ret instruction with the
return offset size set explicitly, e.g. retfw is a 16-bit far ret (i.e. pops
a 16-bit offset and a 16-bit segment), retfd is a 32-bit far ret (pops a
32-bit offset, followed by a 16-bit segment), etc.
git-svn-id: trunk@37571 -
instructions got erroneously converted to 'jmp/call v', if 'v' is an external
far variable that points to certain things (like a local label, exported via
public)
git-svn-id: trunk@37538 -
warning (on the i8086 target) or an error (on i386 and x86_64) when this
instruction is used (because it only works on 8086 and 8088 CPUs)
git-svn-id: trunk@37514 -
default segment base for the ref, in case there's no segment override
* in the internal assembler, use get_default_segment_of_ref to strip redundant
prefixes, instead of always assuming all refs are DS-based
git-svn-id: trunk@37486 -
* taicpu.needaddrprefix now uses is_32_bit_ref on x86_64
* is_16/32/64_bit_ref made part of the aasmcpu unit interface, so they can be
used elsewhere (e.g. in the inline assembler readers)
git-svn-id: trunk@37469 -
specified to be (%esi) or (%edi), when using at&t syntax assembler (this is
not considered an error by intel syntax assemblers, so we're not adding a
warning there, for now)
git-svn-id: trunk@37458 -
* when generating x86 code for parameterized string instructions with the
internal object writer, don't rely on the destination operand being [(r/e)di]
when determining the segment prefix, because when using intel syntax, source
and destination can be anything (only the operand size, the address size and
the source segment is taken into account)
git-svn-id: trunk@37452 -
is_x86_parameterless_string_instruction_op and
is_x86_parameterized_string_instruction_op by removing 'instruction' from
their names
git-svn-id: trunk@37451 -
get_x86_string_op_size
* refactored the AT&T inline asm handling of x86 parameterized string ops, so it
uses the new helper functions
git-svn-id: trunk@37449 -
(movs, cmps, scas, lods, stos, ins, outs) in the inline asm of the i8086, i386
and x86_64 targets. Both intel and at&t syntax is supported.
* NEC V20/V30 instruction 'ins' (available only on the i8086 target, because it
is incompatible with 386+ instructions) renamed 'nec_ins', to avoid conflict
with the 186+ 'ins' instruction.
git-svn-id: trunk@37446 -
