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20598 Commits

Author SHA1 Message Date
nickysn
6634141bf4 + generate better code for division by negative power of 2 constants in the x86 
(i386 and x86_64) code generator (same as the division by a positive power of
  2, followed by a NEG instruction, to invert the sign of the result; previously
  the code generator generated an IMUL instruction with a magic constant,
  followed by shift; the new code sequence should be both shorter and faster)

git-svn-id: trunk@37003 -
 2017-08-21 11:35:20 +00:00
florian
99ce914a61 * fix tcg.a_load_cgparaloc_ref for ref. sizes of 7 on little endian systems 
git-svn-id: trunk@37002 -
 2017-08-21 09:08:02 +00:00
florian
b8354b9b60 * fix trgcpu.do_spill_replace for sparc64 
git-svn-id: trunk@36998 -
 2017-08-20 20:35:10 +00:00
florian
08fd0b1c5c * fix jump. tables for sparc64 
git-svn-id: trunk@36997 -
 2017-08-20 20:35:08 +00:00
florian
c8e448345a * return correct reg_cgsize for int. registers on sparc64 
git-svn-id: trunk@36996 -
 2017-08-20 20:35:06 +00:00
florian
4a54a88cca + implement tcg.a_load_cgparaloc_ref for un-even sizes and little endian systems as well 
git-svn-id: trunk@36977 -
 2017-08-20 18:40:58 +00:00
florian
37a5716819 * reuse more sparc code for sparc64 
git-svn-id: trunk@36961 -
 2017-08-20 17:20:43 +00:00
florian
7f72c780d8 * cleanup 
git-svn-id: trunk@36960 -
 2017-08-20 17:20:42 +00:00
florian
9529416ba0 + sparc64 support for the fpc executable 
git-svn-id: trunk@36959 -
 2017-08-20 17:20:40 +00:00
florian
7f286eb54e + define cpudelayslot: set during compiler compilation for CPUs having branch instructions with delay slot (MIPS, SPARC) 
git-svn-id: trunk@36958 -
 2017-08-20 17:20:38 +00:00
florian
049d7884cd * take advantage of the fact that SRA reg1,x,reg2 sign extends to the upper 32 bit bits of a 64 bit register 
git-svn-id: trunk@36957 -
 2017-08-20 17:20:37 +00:00
florian
ec141a716b * SLAX and MULX are candidates for the OpMov2Mov optimization as well 
git-svn-id: trunk@36956 -
 2017-08-20 17:20:35 +00:00
florian
f18ddd6a54 + SLLXSRxXST2ST assembler optimization for SPARC64 
git-svn-id: trunk@36955 -
 2017-08-20 17:20:33 +00:00
florian
265eae2cc1 + DebugMsg for SPARC assembler optimizer 
git-svn-id: trunk@36954 -
 2017-08-20 17:20:32 +00:00
florian
dba1761a76 + tcgx86.a_load_reg_ref cuts data if the ref. size is smaller than the reg. size 
git-svn-id: trunk@36953 -
 2017-08-20 16:45:02 +00:00
florian
a53d6bd6bd * pass the correct size to a_load_cgparaloc_ref in gen_load_cgpara_loc to avoid to overwrite adjacent data 
git-svn-id: trunk@36952 -
 2017-08-20 15:22:01 +00:00
florian
43b017bde0 * tcg.a_load_cgparaloc_ref checks the size of the ref exactly to avoid overwriting of adjacent data 
git-svn-id: trunk@36951 -
 2017-08-20 15:21:59 +00:00
florian
9b3e0a80df * a_loadfpu_ref_cgpara uses g_concatcopy instead of a_load_ref_ref 
git-svn-id: trunk@36950 -
 2017-08-20 15:21:57 +00:00
florian
09d99a6009 * sparc64 does not generate a unimp instruction if a parameter is returned in a memory location 
git-svn-id: trunk@36949 -
 2017-08-20 15:21:55 +00:00
florian
4988337e6f * correctly set std_param_align for sparc64 
git-svn-id: trunk@36948 -
 2017-08-20 15:21:54 +00:00
florian
9c3f5db022 * split create_paraloc_info_intern for sparc32 and sparc64 
* fixed several sparc64 calling convention issues

git-svn-id: trunk@36947 -
 2017-08-20 15:21:51 +00:00
florian
0caccdc238 * fix range check error 
git-svn-id: trunk@36945 -
 2017-08-20 15:21:48 +00:00
florian
b948a0738c * unified internalerror 
* cosmetics

git-svn-id: trunk@36944 -
 2017-08-20 15:21:46 +00:00
svenbarth
324e63b5d3 * a bit of language consolidation: "type helper" can now be used for records and classes as well 
git-svn-id: trunk@36938 -
 2017-08-18 15:29:19 +00:00
svenbarth
b6a3d66224 * adjust check for non-static class methods in class helpers in so far that only classes allow such methods (interfaces and objects would not either) 
git-svn-id: trunk@36937 -
 2017-08-18 15:27:47 +00:00
svenbarth
eef06e9bc6 * move the check whether a subclassed type helper extends a suitable subtype of the parent's extended type to a nested procedure 
git-svn-id: trunk@36936 -
 2017-08-18 15:25:53 +00:00
nickysn
b41762d1bf + perform the optimization in tmoddivnode.firstoptimize also for div/mod by 
negative powers of 2 as well

git-svn-id: trunk@36930 -
 2017-08-17 15:56:20 +00:00
nickysn
910e1eccc8 * set the bit mask, used for modulus by power-of-2 in a way, that is independent 
from the sign of the divisor (so that negative powers of 2 can be supported as
  well in the future)

git-svn-id: trunk@36928 -
 2017-08-17 15:19:37 +00:00
pierre
0041450edc Regenerated with -Tandroid for mipsel not mipseb 
git-svn-id: trunk@36896 -
 2017-08-14 10:48:27 +00:00
pierre
edfcb6558b -Tandroid is for mipsel not mipseb 
git-svn-id: trunk@36895 -
 2017-08-14 10:47:14 +00:00
Károly Balogh
addc3a2f94 m68k-palmos: fixed the syscall generation, and improved it to support the dispatch-selector-in-reg-D2 traps 
git-svn-id: trunk@36892 -
 2017-08-13 01:19:19 +00:00
Károly Balogh
8a71a70d3c m68k-palmos: sketched up some entirely untested syscall support, but it's probably close to what we need 
git-svn-id: trunk@36891 -
 2017-08-12 21:45:01 +00:00
svenbarth
f9c1d0c0db - TPPCMPWAssembler: remove support for 8-Byte alignment again as that shouldn't be necessary anymore with the alignment fixes in i_macos.pas; so it's better we get an internal error again if someone tries to use it 
git-svn-id: trunk@36887 -
 2017-08-12 15:42:04 +00:00
svenbarth
01046b8a17 * more sensible values for the alignments (based on the powerpc-darwin ones) 
git-svn-id: trunk@36886 -
 2017-08-12 15:35:24 +00:00
svenbarth
3fd68bf59c * agppcmpw.getopstr: always access RTOC symbols as [TC](RTOC) instead of only (RTOC) 
git-svn-id: trunk@36885 -
 2017-08-12 15:25:00 +00:00
svenbarth
4c71fb9e28 * TPPCMPWAssembler: small improvement for the debug output of writeexternal() 
git-svn-id: trunk@36884 -
 2017-08-12 14:25:00 +00:00
svenbarth
86e50d4a26 * TPPCMPWAssembler: also write import statements for AB_EXTERNAL_INDIRECT symbols 
git-svn-id: trunk@36883 -
 2017-08-12 14:23:16 +00:00
Károly Balogh
8830ee0a3b powerpc: assume that the MPW assembler supports 8 byte alignments. (based on some inconclusive internet search it should, but this is not confirmed) 
git-svn-id: trunk@36881 -
 2017-08-12 12:19:52 +00:00
Károly Balogh
e3ffeed1b2 m68k: removed traces of the never obsolete/ancient openbsd-m68k and never existed freebsd-m68k ports 
git-svn-id: trunk@36877 -
 2017-08-12 08:52:44 +00:00
svenbarth
0b02dab684 + new Delphi-compatible intrinsic GetTypeKind() which returns the TTypeKind of a type as a constant value (and thus can be optimized away in If- and Case-statements) 
+ added test

git-svn-id: trunk@36875 -
 2017-08-11 22:12:53 +00:00
svenbarth
7e692fac2b + new utility function get_typekind() to retrieve the TTypeKind value of a def 
git-svn-id: trunk@36874 -
 2017-08-11 22:02:22 +00:00
svenbarth
2095cca98f * ensure that source info is set correctly on Win64 by including i_win for all Windows targets (this is especially important when cross compiling (e.g. Java) as otherwise the utilities won't be found correctly) 
git-svn-id: trunk@36871 -
 2017-08-11 20:27:43 +00:00
pierre
6a416a6aa1 use --32/--64 for Darwin GNU assembler calls 
git-svn-id: trunk@36870 -
 2017-08-11 16:04:40 +00:00
Károly Balogh
a1c879d093 * some tabs-to-spaces and whitespace cleanup. no functional changes 
git-svn-id: trunk@36868 -
 2017-08-10 11:10:45 +00:00
nickysn
3c96090d3c + optimized avr code generation for shr by shiftcount=size*8-1 and sar by 
shiftcount>=size*8-1. This is commonly used by code, that extracts the sign
  bit and improves code generation for signed division by power-of-2 as well.
  This also fixes building avr-embedded (mantis #32241), which was caused by an
  infinite loop in the register allocator, when regvars are enabled, due to too
  much register pressure, when building charset.pp after r36842.

git-svn-id: trunk@36867 -
 2017-08-09 15:53:06 +00:00
nickysn
1476b5168d + added F_PL and F_MI to TResFlags for avr. This allows generating the BRPL and 
BRMI instructions via a_jmp_cond

git-svn-id: trunk@36866 -
 2017-08-09 15:14:33 +00:00
pierre
225c4f33e9 Use old -m68020 architecture option for m68k-palmos assembler (version 2.14 from PRC tools) 
git-svn-id: trunk@36865 -
 2017-08-09 13:37:17 +00:00
pierre
4c7b73d48d Adjust string size for CpuTxt and Targets string arrays 
git-svn-id: trunk@36861 -
 2017-08-08 18:17:20 +00:00
pierre
90e846a470 Obsolete system_i386_qnx and remove last references to system_i386_qnx 
git-svn-id: trunk@36860 -
 2017-08-08 18:00:02 +00:00
pierre
b74c805c49 Fix singlezipinstall for systems that set NoNativeBinaries to 1 
git-svn-id: trunk@36857 -
 2017-08-07 16:14:09 +00:00
pierre
527d2dea4f Set EXEEXT to SRCEXEEXT if NoNativeBinaries is set (allow snapshot of jvm-java on linux) 
git-svn-id: trunk@36856 -
 2017-08-07 10:35:07 +00:00
pierre
c98e9b230f Some watcom assembler wasm improvements 
git-svn-id: trunk@36850 -
 2017-08-04 21:15:10 +00:00
nickysn
ee79ff3635 * improved the optimization of signed modulus by power-of-2, so it uses less 
operations. Previously generated code:
    sign:=sar(left,sizeof(left)*8-1);
    result:=((((left xor sign)-sign) and right) xor sign)-sign;
  New code:
    mask:=sar(left,sizeof(left)*8-1) and ((1 shl power)-1);
    result:=((left+mask) and right)-mask;

git-svn-id: trunk@36847 -
 2017-08-04 16:20:50 +00:00
nickysn
a1928859b3 * in the optimization of signed division by power-of-2 constant in 
tmoddivnode.firstoptimize, replaced tordconstnode(right).value-1 with
  tcgint((qword(1) shl power)-1), so that it becomes independent from the sign
  of right, so that in the future, we can also apply this optimization for
  negative power-of-2 divisors as well (only a unary minus node would have to
  be inserted in this case).

git-svn-id: trunk@36845 -
 2017-08-04 15:50:33 +00:00
nickysn
277026ffd4 * perform the high level signed division by power-of-2 optimization for all 
int types, larger than the ALU of the CPU, instead of just for 64-bit ints on
  32-bit or smaller CPUs.

git-svn-id: trunk@36842 -
 2017-08-04 14:34:42 +00:00
nickysn
b9fdca6f49 + better high level optimization for 64-bit signed division by 2 on 32-bit and 
lower CPUs. Instead of the (sar(temp,sizeof(temp)*8-1) and 1) expression, use
  the equivalent, but simpler (temp shr (sizeof(temp)*8-1))

git-svn-id: trunk@36839 -
 2017-08-04 13:51:51 +00:00
pierre
9fb2652433 List possible CPU in alphabetical order 
git-svn-id: trunk@36829 -
 2017-08-04 11:14:12 +00:00
pierre
4d29122097 msgtxt.inc and msgidx.inc regenerated after: Remove obsolete -Tsunos help line, it is not accpeted by the compiler anymore 
git-svn-id: trunk@36828 -
 2017-08-04 09:38:59 +00:00
pierre
8fba611697 Remove obsolete -Tsunos help line, it is not accpeted by the compiler anymore 
git-svn-id: trunk@36827 -
 2017-08-04 09:38:08 +00:00
pierre
708b9e162c Add obsolete comment in ppudump output for obsoleted cpu and systems 
git-svn-id: trunk@36824 -
 2017-08-04 09:07:01 +00:00
pierre
3d5be0fd2d Add obsolete prefix to cpu_vm and system_vm_embedded, vm(vis) specfic code has been removed in rev 30836 dated 2015-05-09 
git-svn-id: trunk@36823 -
 2017-08-04 09:02:50 +00:00
pierre
f281ee339e Add obsolete prefix to cpu_ia64, system_ia64_win64 and system_ia64_embedded, ia64 specfic code has been removed in rev 30836 dated 2015-05-09 
git-svn-id: trunk@36822 -
 2017-08-04 08:54:34 +00:00
pierre
cf5c6d11ac Add obsolete prefix to cpu_alpha, system_alpha_linux and system_alpha_embedded, alpha specfic code has been removed in rev 30836 dated 2015-05-09 
git-svn-id: trunk@36821 -
 2017-08-04 08:29:02 +00:00
nickysn
ee4c82f5f5 * in the high level optimization of signed division by power-of-2 constant, set 
shiftval to left.resultdef.size*8-1, instead of 31, so that it shifts by 15 or
  7 on 16-bit and 8-bit CPUs, when the integer type is small.

git-svn-id: trunk@36820 -
 2017-08-03 16:02:27 +00:00
nickysn
19087d04da * replace several emit_const_reg calls that generate SHR or SAR instructions 
with calls to cg.a_op_const_reg in the x86 div code generator, so that the
  same code can be used in the future for i8086 as well (SHR and SAR by
  constants other than 1 are 186+, so on 8086 they have to go through the CL
  register, which is handled correctly in cg.a_op_const_reg)

git-svn-id: trunk@36815 -
 2017-07-31 16:02:52 +00:00
florian
f4718c0969 * made nop handling generic for sparc, so it is used by sparc64 as well 
git-svn-id: trunk@36814 -
 2017-07-29 20:06:14 +00:00
svenbarth
e76b1b2959 * use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler) 
git-svn-id: trunk@36809 -
 2017-07-28 15:54:03 +00:00
nickysn
b92b0eac83 * also improve the code, generated for signed division by 2 on i8086, when 
optimize cpu target is 486+, by replacing the sequence
    sar reg, 15
    and reg, 1
  with:
    shr reg, 15

git-svn-id: trunk@36807 -
 2017-07-28 15:38:40 +00:00
Károly Balogh
071b588da2 netbsd/m68k: tweaks, so it works at least in my test-env with NetBSD/amiga 7.1 
git-svn-id: trunk@36801 -
 2017-07-27 19:00:37 +00:00
nickysn
9e8cc127b0 * improved the code, generated for signed division by 2 on i386 and x86_64 by 
replacing the sequence
    sar reg, 31 (or 63)
    and reg, 1
  with:
    shr reg, 31 (or 63)

git-svn-id: trunk@36800 -
 2017-07-27 16:02:30 +00:00
nickysn
bb7cd4866d * corrected comment in x86 division code - it said "signed", when it actually meant "negative" 
git-svn-id: trunk@36799 -
 2017-07-27 15:04:56 +00:00
nickysn
b6c3329f20 + also check for negative powers of 2 in the mod by power-of-2 constant x86 optimization, since the sign of the divisor is ignored by the 'mod' operation 
git-svn-id: trunk@36797 -
 2017-07-26 16:10:41 +00:00
nickysn
4b00414183 + added helper isabspowerof2, which checks whether abs(value) is a power of 2 
git-svn-id: trunk@36796 -
 2017-07-26 16:08:31 +00:00
pierre
7ee567fcca Use A_LD_R alias in functions using GOT indirection 
git-svn-id: trunk@36795 -
 2017-07-26 14:58:03 +00:00
pierre
ef3b006eb2 Use A_LD_R alias in do_spill_replace function 
git-svn-id: trunk@36794 -
 2017-07-26 14:57:21 +00:00
pierre
6e18d537fc Use A_LD_R and A_ST_R aliases for spilling_create_(load|store) functions 
git-svn-id: trunk@36793 -
 2017-07-26 14:56:11 +00:00
pierre
f5dfbb5ff3 Add A_ST_R and A_LD_R instruction alias for whole register size store/load 
git-svn-id: trunk@36792 -
 2017-07-26 14:53:30 +00:00
pierre
6f6139609d Add explicit '.set nompis16' at front of stabs debug information to solve bug report 32138 
git-svn-id: trunk@36781 -
 2017-07-24 07:31:31 +00:00
florian
a2e442e111 * keep the names of X, Y and Z in assembler files, fixes issue #32150 
git-svn-id: trunk@36776 -
 2017-07-23 19:24:45 +00:00
florian
8c33fbbe64 * indention fixed 
git-svn-id: trunk@36775 -
 2017-07-23 19:24:43 +00:00
florian
7ed3757f8c + TCGSparc64.a_load_reg_ref_unaligned 
git-svn-id: trunk@36763 -
 2017-07-21 21:17:41 +00:00
florian
eaa33f416c * sparc64: fix int to bool type conversions for 64 bit ints 
git-svn-id: trunk@36762 -
 2017-07-21 20:41:14 +00:00
nickysn
7c306f18e3 + perform unsigned modulus by power of 2 constant by using an AND instruction (instead of DIV) on x86 
git-svn-id: trunk@36756 -
 2017-07-21 15:58:26 +00:00
nickysn
9853c4a2a3 + enabled the load-modify-store optimization for the double argument version 
(i.e. shift/rotate by k) of sar, rol and ror with type conversion on i386 and
  x86_64.

git-svn-id: trunk@36755 -
 2017-07-21 13:17:18 +00:00
nickysn
c8377d3bfc + enabled the load-modify-store optimization for the double argument version 
(i.e. shift/rotate by k) of sar, rol and ror on i386 and x86_64. Only the case
  without any implicit type conversions is handled for now.

git-svn-id: trunk@36753 -
 2017-07-20 14:09:25 +00:00
pierre
6fdd952fd9 Fix check for setting use_unlimited_pic_mode for sparc64 
git-svn-id: trunk@36746 -
 2017-07-18 18:02:36 +00:00
nickysn
e562926763 + implemented the load/modify/store optimization for i:=sar/rol/ror(i) when 
there's a type conversion involved as well (e.g. uint32:=SarLongInt(unit32) ).
  This only works for signed<->unsigned conversions of equal size, due to the
  nature of the sar, rol and ror operations.

git-svn-id: trunk@36745 -
 2017-07-18 13:48:35 +00:00
pierre
903955f329 Add 's' for sparc64 specific message prefix 
git-svn-id: trunk@36744 -
 2017-07-18 12:50:47 +00:00
pierre
4c3d8d422a Add _GLOBAL_OFFSET_TABLE_ for sparc64 if -Cg is used 
git-svn-id: trunk@36743 -
 2017-07-18 12:49:26 +00:00
pierre
f3459454e6 Fix compilation failure for sparc CPU 
git-svn-id: trunk@36741 -
 2017-07-18 04:47:49 +00:00
nickysn
cb0c947f37 + enabled the load-modify-store optimization for the single argument version 
(i.e. shift/rotate by 1) of sar, rol and ror on i386 and x86_64.

git-svn-id: trunk@36739 -
 2017-07-17 14:50:39 +00:00
florian
a7d127cf08 * only sparc v7 and v8 require an instruction between FCMP and the branch 
git-svn-id: trunk@36737 -
 2017-07-16 09:24:20 +00:00
florian
ac894831e4 * use the 64 bit path in tSparcmoddivnode.pass_generate_code for all 64 bit types (including currency) on sparc64 
git-svn-id: trunk@36736 -
 2017-07-16 09:24:18 +00:00
svenbarth
0c42b6f44a * fix for Mantis #32118: also provide a range for undefined defs 
+ added test

git-svn-id: trunk@36723 -
 2017-07-10 19:47:21 +00:00
svenbarth
ca78bfffae * fix for Mantis #32111: allow undefined defs as a for loop's counter; the specialization will decide whether it will compile or not 
+ added test

git-svn-id: trunk@36722 -
 2017-07-10 19:45:15 +00:00
florian
bccc2f6863 + tcg.a_loadfpu_intreg_reg, make use of it in tcg.a_load_cgparaloc_anyreg 
git-svn-id: trunk@36717 -
 2017-07-09 21:33:24 +00:00
florian
dd3d62425c * guard case statement by internalerror to avoid a warning 
git-svn-id: trunk@36716 -
 2017-07-09 21:33:22 +00:00
florian
f30bf547e2 * TCGSparcGen.maybeadjustresult adapted for sparc64 
git-svn-id: trunk@36711 -
 2017-07-09 18:14:14 +00:00
Károly Balogh
eaa769053b m68k: enable 68881 FPU on Linux and NetBSD by default 
git-svn-id: trunk@36699 -
 2017-07-08 23:54:39 +00:00
Károly Balogh
0b561b6c8f powerpc: enable SUPPORT_GET_FRAME 
git-svn-id: trunk@36698 -
 2017-07-08 23:51:55 +00:00
svenbarth
0f9451fbb7 * switch x86_64-linux to indirect entry, essentially allowing for the use of dynamic packages on that target 
git-svn-id: trunk@36690 -
 2017-07-08 20:39:36 +00:00
florian
13801bebfe * pass debian specific path to c init files to ld for sparc64 as it is done on other targets as well 
git-svn-id: trunk@36676 -
 2017-07-07 22:33:42 +00:00
florian
25950b8575 * 64 bit multiplications for sparc64 fixed 
git-svn-id: trunk@36675 -
 2017-07-07 22:18:16 +00:00
florian
bd57ca99a8 * cosmetics 
git-svn-id: trunk@36672 -
 2017-07-07 22:18:11 +00:00
florian
cbe9a1b65f * make thlcgcpu.g_intf_wrapper usable for sparc64 as well 
git-svn-id: trunk@36665 -
 2017-07-07 13:17:42 +00:00
florian
8401a460e5 + support 64 bit sar on sparc64 
* fix on sparc64 broken a_cmp_const_reg_label and a_cmp_reg_reg_label

git-svn-id: trunk@36661 -
 2017-07-07 10:11:44 +00:00
florian
1f4d6e8a4d * compilation on 32 bit sparc fixed 
git-svn-id: trunk@36660 -
 2017-07-07 09:30:50 +00:00
florian
c8c14d8db9 * pass -32 to the sparc assembler 
git-svn-id: trunk@36659 -
 2017-07-07 09:08:05 +00:00
florian
a9a0ca6649 * sparc64 needs a helper for overflow checked 64 bit division operations 
git-svn-id: trunk@36658 -
 2017-07-07 09:08:02 +00:00
florian
ca51bd56c4 + a_jmp_cond64 
* generate 64 bit comparisons if needed

git-svn-id: trunk@36657 -
 2017-07-06 18:02:24 +00:00
Károly Balogh
8a22807efa m68k: also add Debian's custom library path like on other CPUs 
git-svn-id: trunk@36645 -
 2017-07-04 22:51:08 +00:00
florian
109612b7e1 * correctly load 32 bit values on sparc64 
git-svn-id: trunk@36644 -
 2017-07-04 20:52:47 +00:00
florian
57a137068b * integer registers must have the size R_SUBWHOLE for sparc, resolves issue #32065 
git-svn-id: trunk@36639 -
 2017-07-03 20:49:06 +00:00
florian
28cfa838b5 + support for the different flag registers of sparc 
* fixing 64 bit cmp operations on sparc64

git-svn-id: trunk@36638 -
 2017-07-03 20:49:05 +00:00
florian
4b30e5ee11 + TSparcmoddivnode.pass_generate_code for SPARC64 
git-svn-id: trunk@36637 -
 2017-07-03 20:49:03 +00:00
florian
5bc9890727 + more sparc64 instructions 
git-svn-id: trunk@36636 -
 2017-07-03 20:49:01 +00:00
florian
5b91fd7065 + taicpu.op_reg_sym for sparc 
git-svn-id: trunk@36635 -
 2017-07-03 20:49:00 +00:00
florian
65c9e6c32e + fccX registers 
git-svn-id: trunk@36633 -
 2017-07-03 20:48:56 +00:00
florian
94c3ac027b * fixed spelling: fpc_mode -> gpc_mode 
git-svn-id: trunk@36632 -
 2017-07-03 20:48:53 +00:00
svenbarth
ad65ff5600 * insert symbol only once 
git-svn-id: trunk@36620 -
 2017-06-30 15:59:33 +00:00
svenbarth
a301bf75ea * ngenutil.tnodeutils.sym_maybe_initialize: don't use "is" operator, but corresponding is_* functions 
git-svn-id: trunk@36617 -
 2017-06-29 18:51:35 +00:00
Károly Balogh
358f8eb85d m68k: do not internalerror on localsize < 0. this condition is handled elsewhere in the compiler properly, so we just let it through 
git-svn-id: trunk@36612 -
 2017-06-29 00:11:19 +00:00
Károly Balogh
ad89a972e5 m68k: also have tf_safecall_clearstack flag defined for Linux 
git-svn-id: trunk@36611 -
 2017-06-28 23:55:17 +00:00
Károly Balogh
0370d52f20 m68k: support longword to double conversions with the FPU, without a helper, better code for some other cases 
git-svn-id: trunk@36609 -
 2017-06-28 01:27:02 +00:00
Károly Balogh
02ed753fab m68k: yet another attempt to fix small struct alignments on stack 
git-svn-id: trunk@36605 -
 2017-06-27 02:36:55 +00:00
Károly Balogh
8a8753eb79 m68k: reenabled some safety checks and removed obsolete TODO comment 
git-svn-id: trunk@36604 -
 2017-06-26 19:45:11 +00:00
Károly Balogh
d5e1b391f9 m68k: when calling g_concatcopy for para copy, still only copy cgpara.intsize amount of bytes 
git-svn-id: trunk@36603 -
 2017-06-26 19:40:13 +00:00
Jeppe Johansen
09a8cafcd7 Restricted MlaCmp>Mlas optimization to only work in ARM mode. 
git-svn-id: trunk@36602 -
 2017-06-26 18:14:46 +00:00
Károly Balogh
22ae3cd186 m68k: revert the r36568 and the followup fix attempts altogether, as they broke Amiga support entirely. there will be a cleanup before another fixing attempt 
git-svn-id: trunk@36598 -
 2017-06-26 16:02:26 +00:00
Jeppe Johansen
f3889a191b Generate bx lr exit instruction in Thumb-2 instead of mov pc,lr as bx lr will trigger an exception return but mov doesn't. 
git-svn-id: trunk@36597 -
 2017-06-26 08:05:31 +00:00
Károly Balogh
a14b2fd80a m68k: modify some alignment calculations in the register calling convention code, hopefully it fixes some Amiga regressions introduced in r36568 
git-svn-id: trunk@36596 -
 2017-06-25 19:33:21 +00:00
Károly Balogh
890f4ac2bc m68k: use 2 byte alignments for C structs on Linux 
git-svn-id: trunk@36595 -
 2017-06-24 23:19:00 +00:00
Károly Balogh
41f72a0e6d m68k: some initial support for C ABIs which use an address register to return structs by address 
git-svn-id: trunk@36592 -
 2017-06-24 19:03:58 +00:00
Károly Balogh
da11451934 m68k: revert the 2 byte C record alignment fix on Linux. sadly it completely breaks RTTI, which takes longer to fix, so meanwhile, at least cause no regressions 
git-svn-id: trunk@36591 -
 2017-06-24 10:50:24 +00:00
Károly Balogh
4258413e8c m68k: revert recordalignmax to 2 on Linux. the value of 4 caused a bunch of weird RTTI test failures 
git-svn-id: trunk@36590 -
 2017-06-23 21:24:39 +00:00
Károly Balogh
bf3478fb35 m68k: fix C struct alignment on Linux. tested against GCC on current Debian-m68k 
git-svn-id: trunk@36589 -
 2017-06-23 20:47:06 +00:00
Károly Balogh
b481129f4e m68k: for cdecls with the SVR4 ABI return results both in A0 and D0 
git-svn-id: trunk@36588 -
 2017-06-23 19:21:20 +00:00
Károly Balogh
30176f3116 m68k: enable inlined get_frame for m68k 
git-svn-id: trunk@36577 -
 2017-06-22 17:43:24 +00:00
Károly Balogh
cf8aebf00f m68k: enabled safecall exception wrappers with linux 
git-svn-id: trunk@36575 -
 2017-06-22 15:31:32 +00:00
Károly Balogh
26d5500b7c m68k: one more alignment fix, hopefully fixes regressions not fixed by r36569 
git-svn-id: trunk@36570 -
 2017-06-22 02:41:36 +00:00
Károly Balogh
8ed84afdd4 m68k: try to fix some breakages caused by r36568 
git-svn-id: trunk@36569 -
 2017-06-22 02:11:42 +00:00
Károly Balogh
23f4304881 m68k: hopefully fix passing of smaller-than-alignment sized records/structs for stdcall/cdecl 
git-svn-id: trunk@36568 -
 2017-06-22 01:14:02 +00:00
florian
719faf5e54 * more restrictive alignment for variables 
git-svn-id: trunk@36549 -
 2017-06-19 21:18:11 +00:00
florian
c321fb35f1 * integer registers on sparc(64) do not have an explicit size anymore, simplifies compiler code sharing between sparc32 and sparc64 
+ %icc and %xcc register for sparc64

git-svn-id: trunk@36548 -
 2017-06-19 21:18:09 +00:00
florian
7edc8407fc + flushw opcode 
git-svn-id: trunk@36547 -
 2017-06-19 21:18:07 +00:00
florian
3ee8e836e9 * properly handle constants from -2^32 to -1 on sparc64 
git-svn-id: trunk@36546 -
 2017-06-19 21:18:05 +00:00
florian
2ad265505b * properly align unicode- and ansistring constants 
git-svn-id: trunk@36545 -
 2017-06-19 21:18:03 +00:00
florian
2e2e560d5a * use dwarf on sparc64 
git-svn-id: trunk@36539 -
 2017-06-19 21:17:51 +00:00
florian
85050f3383 * Makefiles regenerated 
git-svn-id: trunk@36528 -
 2017-06-18 21:06:34 +00:00
florian
e5977d5c52 + support sparc64 as host/source cpu 
git-svn-id: trunk@36525 -
 2017-06-18 21:06:29 +00:00