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25 Commits

Author SHA1 Message Date
pierre
75a9c5b500 Also avoid invalid typecast for RegLoadedWithNewValue method for mips, sparcgen and xtensa 
git-svn-id: trunk@49186 -
 2021-04-12 08:57:23 +00:00
yury
6478a727d7 * Fixed the peephole optimization of conditional movs for mips. 
git-svn-id: trunk@45826 -
 2020-07-22 11:40:21 +00:00
pierre
0c6998bb11 Try to fix mipsel-android by making sure P does not point to a freed instruction 
git-svn-id: trunk@45812 -
 2020-07-19 21:21:18 +00:00
florian
f505822ab5 o patch by J. Gareth Moreton: 
* fix jump optimizer for MIPS(EL).
    + New method called "MakeUnconditional" introduced that can do platform-specific changes

git-svn-id: trunk@43518 -
 2019-11-20 22:12:26 +00:00
florian
a969097a80 * optimization Move removed 4 fixed 
git-svn-id: trunk@43493 -
 2019-11-16 14:04:02 +00:00
Jonas Maebe
281b3ad276 * fix case completeness and unreachable code warnings in compiler that would 
be introduced by the next commit

git-svn-id: trunk@42046 -
 2019-05-12 14:29:03 +00:00
sergei
5165497498 * MIPS: fixed TCpuAsmOptimizer.InstructionLoadsFromReg, it now correctly considers instructions that read their first operand. 
git-svn-id: trunk@35921 -
 2017-04-23 15:26:17 +00:00
florian
6af656aaed + DebugMsg based debugging for the mips(el) assembler optimizer 
git-svn-id: trunk@35890 -
 2017-04-22 09:36:44 +00:00
sergei
41751bc5b4 + Next portion of MIPS peephole optimizations. Get more aggressive and do more than a single pass if needed, enabling optimization of instructions that logically turn into MOVE due to register renaming. 
git-svn-id: trunk@33095 -
 2016-02-13 12:33:30 +00:00
sergei
e8f2f42b75 * Reverted r29373 and replaced it with more appropriate fix. 
git-svn-id: trunk@33093 -
 2016-02-13 11:09:31 +00:00
florian
1266491085 o refactored some peephole optimizer code: 
* updated TAOptObj.RegUsedAfterInstruction with the arm implementation and removed the arm specific implementation
  * RegLoadedWithNewValue and InstructionLoadsFromReg are now a methods of TAoptBase
  * moved RegEndOfLife to TAOptObj
* during this refactoring, fixed also TCpuAsmOptimizer.RegLoadedWithNewValue for arm regarding post/preindexed 
  memory references: those modify the register but do not load it with a new value in the sense of RegLoadedWithNewValue

git-svn-id: trunk@33000 -
 2016-01-24 15:25:16 +00:00
yury
35ff024f03 * mips: Fixed internal error 2014061703 when optimization are enabled. 
git-svn-id: trunk@32112 -
 2015-10-21 12:14:49 +00:00
sergei
a709a9b637 * MIPS peephole: check that operand is present before accessing its fields, also check that it's not a branch target. Mantis #27608. 
git-svn-id: trunk@30110 -
 2015-03-06 00:04:06 +00:00
pierre
cc537a2e76 Try to avoid uncorrect optimization 
git-svn-id: trunk@29373 -
 2015-01-02 23:00:22 +00:00
sergei
06ee500352 * MIPS: improved code generation in make_simple_ref 
* Clean up the peephole optimizer
+ More peephole optimizations.

git-svn-id: trunk@28892 -
 2014-10-21 21:05:46 +00:00
sergei
84245a6e0c * MIPS: doing progress with peephole optimizer. 
git-svn-id: trunk@28628 -
 2014-09-08 23:24:43 +00:00
sergei
3ede5ec99b * MIPS peephole: refactored/simplified and added (another) couple of optimizations. 
git-svn-id: trunk@28591 -
 2014-09-03 20:00:42 +00:00
sergei
406a678223 * MIPS: MOVE instruction cannot be changed into conditional move (MOVZ/MOVN) if it overwrites register used as condition. 
git-svn-id: trunk@28587 -
 2014-09-03 11:59:16 +00:00
sergei
1e11e34f42 + MIPS: implemented more peephole optimizations. 
git-svn-id: trunk@28536 -
 2014-08-29 18:20:49 +00:00
sergei
482e61dafa * MIPS, TCpuAsmOptimizer.GetNextInstructionUsingReg: test that returned item is actually an instruction, because GetNextInstruction can sometimes stop on labels. 
+ Try to eliminate register move after instructions that load from memory.

git-svn-id: trunk@28380 -
 2014-08-10 21:31:13 +00:00
sergei
c2a29a0dbb + MIPS: implemented peephole optimization which changes appropriate patterns into conditional moves, which are available on MIPS4 and higher. 
git-svn-id: trunk@28008 -
 2014-06-20 05:57:39 +00:00
sergei
a8e30043db + MIPS: more peephole optimizations (basically updated to the state of SPARC peephole). 
git-svn-id: trunk@27990 -
 2014-06-17 22:50:29 +00:00
sergei
06735eaefc + MIPS peephole optimizer: eliminate redundant moves of floating point registers. 
git-svn-id: trunk@26136 -
 2013-11-25 13:57:19 +00:00
sergei
8e6d4b41e2 + MIPS: started the peephole optimizer. 
git-svn-id: trunk@25148 -
 2013-07-20 13:44:21 +00:00
florian
0c8546f94c * more MIPS code of David Zhang integrated 
git-svn-id: trunk@14228 -
 2009-11-20 14:46:45 +00:00