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96 Commits

Author SHA1 Message Date
pierre
e5dffebdc7 Avoid range check error in MaskLength evaluation 
git-svn-id: trunk@40110 -
 2018-10-31 14:51:23 +00:00
florian
9805214d34 * properly take care of register allocations between the first and second instruction for the FoldLea optimization 
* check for ait_instruction after a GetNextInstruction function call
* cosmetics

git-svn-id: trunk@39983 -
 2018-10-18 18:28:03 +00:00
florian
5782acc32d * patch by J. Gareth Moreton to fix 33909 
git-svn-id: trunk@39353 -
 2018-07-01 12:54:30 +00:00
florian
78943ea843 + patch by J. Gareth Moreton: x86 optimisations for Jcc and SETcc, resolves #33899 
* optimization also added for i386

git-svn-id: trunk@39307 -
 2018-06-25 20:40:05 +00:00
florian
1472a81768 * patch by J. Gareth Moreton to unify the x86 assembler optimizer method headers, resolves #33908 
git-svn-id: trunk@39305 -
 2018-06-25 20:13:34 +00:00
florian
0d168796d7 * patch by J. Gareth Moreton: More Peephole optimizations for AND and MOV 
git-svn-id: trunk@39242 -
 2018-06-18 20:50:08 +00:00
florian
a0b343a787 * patch by J. Gareth Moreton for less invasive DEBUG_AOPTCPU 
git-svn-id: trunk@39239 -
 2018-06-17 14:56:19 +00:00
florian
9b18e39c81 * enable Lea2AddBase and Lea2AddIndex in TX86AsmOptimizer.PostPeepholeOptLea as we have flag tracking now 
* some flag allocations fixed

git-svn-id: trunk@38501 -
 2018-03-11 20:30:09 +00:00
florian
5fbecc5501 + use TX86AsmOptimizer.OptPass1SHLSAL on x86-64 
git-svn-id: trunk@38499 -
 2018-03-11 14:35:22 +00:00
florian
47927f053a * factored out TX86AsmOptimizer.OptPass1SHLSAL 
git-svn-id: trunk@38498 -
 2018-03-11 14:35:19 +00:00
florian
78878f59b1 + generic TAOptObj.AllocRegBetween 
- removed x86 specific AllocRegBetween

git-svn-id: trunk@38445 -
 2018-03-07 22:17:35 +00:00
florian
c5f8567ed7 * getsubreg => getsupreg 
git-svn-id: trunk@38344 -
 2018-02-25 15:34:14 +00:00
florian
fc6c0e8ef4 + AndShlToShl optimization 
* moved topsize2memsize to cpubase

git-svn-id: trunk@38343 -
 2018-02-25 15:34:12 +00:00
florian
6e811d057c * MovOpMov2Op cannot be applied for L, Q, Q as operand sizes 
+ test

git-svn-id: trunk@38337 -
 2018-02-25 10:19:52 +00:00
florian
e92422383a * compilation fixed 
git-svn-id: trunk@38280 -
 2018-02-18 09:29:36 +00:00
florian
91514da267 * factored out TX86AsmOptimizer.PostPeepholeOptCall 
+ use TX86AsmOptimizer.PostPeepholeOptCall on x86-64

git-svn-id: trunk@38278 -
 2018-02-17 23:25:01 +00:00
florian
1b3627add1 + peephole optimization MovMov2Mov 5 
git-svn-id: trunk@38273 -
 2018-02-17 21:10:51 +00:00
florian
5eb59196d5 * remove sequential moves to the same register 
+ test

git-svn-id: trunk@38267 -
 2018-02-17 12:45:17 +00:00
florian
99f1fe54af * check for registers removed which is not needed anymore 
git-svn-id: trunk@38265 -
 2018-02-17 12:45:13 +00:00
florian
810acd82b2 * patch by J. Gareth Moreton that makes some improvements to the Peephole Optimizer for x86 and x86-64 code, as well as some cleanup with formatting, code syntax consistency, and debug messages. 
- xorq %reg,%reg (identical registers) is now changed to xorl %reg,%reg if doing so removes the REX prefix.
  - movw %bx,%ax; andl $0xffff,%eax, for example, is now changed to movzwl %bx,%eax as long as a conditional operation doesn't follow 'and' (checks to see if the CPU flags are in use).
  - movzbq and movzwq get optimised to movzbl and movzwl respectively if doing so removes the REX prefix.
  - Removal of optimisation code that zero-extends from 32-bit to 64-bit, because there isn't actually a valid combination of opcodes for MOVZX that allows that (for registers,
    just use  MOV). This is not the case with MOVSX.
  - movq is now optimised to movl even if the CPU flags are in use (this stops mov %reg,0 from being optimised to xor %reg,%reg if doing so breaks an algorithm that relies on them).
  - Fixed typo in peephole message regarding movq to movl (it said movd instead).
  - Made the peephole debug messages more consistent in formatting, some of which now have more detail.
* small fixes of the patch

git-svn-id: trunk@38070 -
 2018-01-28 14:41:54 +00:00
florian
10ea652493 * fix for #32576 
+ test case

git-svn-id: trunk@38069 -
 2018-01-28 13:26:49 +00:00
florian
93353d8d79 * typo 
git-svn-id: trunk@38068 -
 2018-01-28 13:26:47 +00:00
florian
674398c5a5 * i8086 compilation fixed after r37572 
git-svn-id: trunk@37573 -
 2017-11-11 13:25:02 +00:00
florian
73fda1ccb6 * factored out OptPass1Sub 
+ make use of OptPass1Sub on x86_64 and i8086 as well

git-svn-id: trunk@37572 -
 2017-11-10 20:55:22 +00:00
florian
4da4b768ec * factored out PostPeepholeOptTest 
+ use PostPeepholeOptTest on x86-64

git-svn-id: trunk@37551 -
 2017-11-04 19:10:14 +00:00
florian
3097eaf8ee * made PostPeepholeOptMov a function 
git-svn-id: trunk@37550 -
 2017-11-04 19:10:12 +00:00
florian
a7ea7fb569 * factored out PostPeepholeOptCmp 
+ use PostPeepholeOptCmp for x86_64

git-svn-id: trunk@37549 -
 2017-11-04 19:10:09 +00:00
nickysn
80226e3af4 + added an optimization pass, that optimizes x86 references 
git-svn-id: trunk@37494 -
 2017-10-20 15:55:55 +00:00
florian
ce7487b7de o patch by J. Gareth "Kit" Moreton, resolves partially issue #32037 
o improves readibility of TX86AsmOptimizer.OptPass1MOV and fixes some spelling mistakes
  + Optimization MovAnd2Mov 2
  + extended Optimization MovTestJxx2TestMov and MovTestJxx2ovTestJxx to take care of and as well
  + Peephole Optimization: movq x,%reg -> movd x,%reg

git-svn-id: trunk@37377 -
 2017-10-01 18:40:11 +00:00
florian
15b617546e + call TX86AsmOptimizer.OptPass1VOP for logical operations as well 
git-svn-id: trunk@37367 -
 2017-10-01 14:40:21 +00:00
florian
05ecd784f2 * factored out OptPass1LEA and use it for x86-64 as well 
+ LEAMov2LEA optimization

git-svn-id: trunk@37199 -
 2017-09-13 20:40:32 +00:00
florian
22956c4393 + TX86AsmOptimizer.OptPass1OP 
git-svn-id: trunk@36365 -
 2017-05-28 13:49:43 +00:00
florian
c83e6991d5 * properly check number of operands 
git-svn-id: trunk@36322 -
 2017-05-25 12:44:30 +00:00
yury
884cb758e7 * Ensure the number of operands is 2 for MOVXX instructions in OptPass1MOVXX. Otherwise the classic MOVSD/W/B no-operand instructions (REP MOVSX) cause AV during checks of operands. The AV is thrown when trying to compile ucomplex.pp with -Cfsse3. 
* Also fixed generation of debug comments in OptPass1MOVXX.

git-svn-id: trunk@36295 -
 2017-05-22 15:20:18 +00:00
florian
3c5ec4e76c * allocate register correctly for "MovMov2Mov 2" 
+ more debug messages
* debug message naming fixed

git-svn-id: trunk@36284 -
 2017-05-21 15:06:22 +00:00
florian
1ffdf02b94 + Ch_*Op4 
+ op_const_reg_reg_reg

git-svn-id: trunk@36279 -
 2017-05-21 11:12:55 +00:00
florian
0f16f6d94d + OptPass1MOVXX 
git-svn-id: trunk@36209 -
 2017-05-14 20:59:10 +00:00
florian
535c990233 + OptPass1MOVAP 
git-svn-id: trunk@36203 -
 2017-05-13 21:48:44 +00:00
florian
3ade6ae9b8 + Mov2Nop optimization 
git-svn-id: trunk@36201 -
 2017-05-13 09:58:27 +00:00
florian
f4a29bb75d * moved InstructionLoadsFromReg and RegReadByInstruction from TCpuAsmOptimizer (i386) to TX86AsmOptimizer 
git-svn-id: trunk@36200 -
 2017-05-13 09:58:25 +00:00
florian
f93b784895 * make fullcycle for i8086 fixed 
git-svn-id: trunk@36164 -
 2017-05-09 19:53:06 +00:00
florian
52d3756c26 * factored out OptPass1Movx and merged i386 and x86-64 version 
git-svn-id: trunk@36159 -
 2017-05-08 20:44:27 +00:00
florian
06c4c651fd * factored out PrePeepholeOptSxx 
+ x86-64 uses PrePeepholeOptSxx now as well

git-svn-id: trunk@36158 -
 2017-05-08 20:44:24 +00:00
florian
74b338266d * ifdef cmov optimization, as i8086 has no cpu_capabilities 
git-svn-id: trunk@36150 -
 2017-05-07 16:18:44 +00:00
florian
f8d517be70 * make TX86AsmOptimizer.IsExitCode usable for x86-64 as well 
git-svn-id: trunk@36148 -
 2017-05-07 16:18:40 +00:00
florian
4a43d992f5 * unified usage of MatchOpType 
* fixed generic MatchOpType

git-svn-id: trunk@36145 -
 2017-05-07 16:18:33 +00:00
florian
7afe762d22 * factored out OptPass2Jcc assembler optimization 
* OptPass2Jcc now used by x86-64 as well
* remove orphaned alignments if the label is not used anymore after cmov is used

git-svn-id: trunk@36143 -
 2017-05-07 12:45:48 +00:00
florian
e3f0b338d4 * SkipLabels moved to aoptutils 
* factored out OptPass2Jmp assembler optimization
* OptPass2Jmp now used by x86-64 as well

git-svn-id: trunk@36141 -
 2017-05-06 21:07:02 +00:00
florian
f985971a62 * apply mov reg1, mem1; cmp x, mem1 to mov reg1, mem1; cmp x, reg1 also for test 
git-svn-id: trunk@36138 -
 2017-05-06 18:47:47 +00:00
nickysn
b882ba5fd2 + also recognize sbb reg,reg as writing a new value in the register in TX86AsmOptimizer.RegLoadedWithNewValue 
git-svn-id: trunk@36119 -
 2017-05-05 14:24:13 +00:00