+ make use of it in tcgtypeconvnode.second_nothing
+ Xtensa: implementation of a_tcgcpu.a_loadfpu_intreg_reg and tcgcpu.a_loadfpu_reg_intreg
git-svn-id: trunk@46858 -
This is normally only used on big-endian targets, to re-convert records
of size < OS_INT into values fitting inside the byte size of the record,
after it was left-shifted to comply with ABI stipulating it but be
writable as a full-size register into a OS_INT size memory.
git-svn-id: trunk@45783 -
* rename the m68k/PowerPC-MacOS targets to m68k/PowerPC-MacOSClassic
* repurpose the AArch64/Darwin target for AArch64/macOS
o make AArch64-Darwin default target for a hosted AArch64-Darwin compiler
git-svn-id: trunk@45758 -
* changed the way OP_NEG and OP_NOT are handled in op_reg_ref, in order to be
consistent with op_reg_reg
* introduced op_reg,op_ref,op_subsetreg,op_subsetref and op_loc for the unary
operations only (OP_NEG,OP_NOT)
git-svn-id: trunk@45302 -
of its own buggy version
o added support to the generic version to override part of the functionality
needed to implement an ARM quirk
git-svn-id: trunk@41335 -
First the symbol's address is taken and then it is used to load the value and also store the result. It eliminates extra calculation of the symbol's address needed to store the result.
x86 and other CPUs which can handle refs ops directly or more efficiently already have overloaded versions of these methods and are not affected by this change.
git-svn-id: trunk@40050 -
so that they can still be freed after the reference has been changed
(e.g. in case of array indexing or record field accesses) (mantis #33628)
git-svn-id: trunk@38814 -
tcpuparamanager, very similar to the existing get_volatile_registers_XXX. The
new methods are called get_saved_registers_XXX, where XXX is the register
type ("int", "address", "fpu" or "mm")
git-svn-id: trunk@38794 -
from cpubase unit to a method in the tcg class. The reason for doing that is
that this is now a standard part of the 16-bit and 8-bit code generators and
moving to the tcg class allows doing extra checks (not done yet, but for
example, in the future, we can keep track of whether there was an extra
register allocated with getintregister and halt with an internalerror in case
GetNextReg() is called for registers, which weren't allocated as a part of a
sequence, therefore catching a certain class of 8-bit and 16-bit code
generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
anything. It might be added to the tcg class, in case it's ever needed, but
for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.
git-svn-id: trunk@37180 -