2259 Commits

Author	SHA1	Message	Date
J. Gareth "Curious Kit" Moreton	e40996cd2c	* Fixed bug in "JccMovJmpMov2CMovCMov" optimisation where it didn't track registers in references getting changed	2023-04-30 22:25:55 +00:00
florian	e40f997a40	* another patch to fix #40223	2023-03-31 23:45:45 +02:00
Pierre Muller	644ffa8e7a	Do not always set DEBUG_AOPTCPU	2023-03-30 22:07:37 +00:00
florian	6663d5ca63	* do not replace index registers with esp/rsp, resolves #40223	2023-03-30 21:36:35 +02:00
J. Gareth "Curious Kit" Moreton	3f25438d35	* x86: TEST/Jcc/TEST optimisations can now look beyond the next instruction under -O3	2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton	d372286159	* x86: RegModifiedByInstruction and RegInInstruction ... are now more accurate for (I)MUL and (I)DIV.	2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton	3635f7cd6f	* x86: Fixed oversight in RegModifiedByInstruction not checking W0, W1 and WU-type flags	2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton	b637a3a022	* x86: Fix to MOV/CMP register deallocation positioning	2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton	77f53ebde3	* x86: The LEA/LEA optimisations can now work with a different ... destination register and the intermediate register still in use.	2023-03-08 21:54:41 +00:00
J. Gareth "Curious Kit" Moreton	931bda5633	* x86: LeaLea2Lea now handles cases where the second LEA instruction ... has a second register in the reference.	2023-03-08 21:54:41 +00:00
florian	66ff7a928c	+ added debug messages	2023-03-08 22:54:17 +01:00
florian	bf8746ed10	* fixed comment ... * shortened code	2023-03-05 21:24:50 +01:00
florian	ccbdfa9150	+ x86: AND/CMP -> CMP optimiziation	2023-03-04 21:20:52 +01:00
J. Gareth "Curious Kit" Moreton	b8933dd267	* x86: Some refactoring to use aoc_ForceNewIteration instead of manually advancing p	2023-03-04 18:40:27 +00:00
J. Gareth "Curious Kit" Moreton	ecf2ad3e53	x86: Some oversights fixed where another iteration of pass 1 wasn't performed when it should have been	2023-03-03 20:47:24 +00:00
J. Gareth "Curious Kit" Moreton	4d33e5f137	* x86: OptPass1_V_MOVAP now uses GetNextInstructionUsingReg and UpdateUsedRegsBetween	2023-02-24 19:39:39 +00:00
J. Gareth "Curious Kit" Moreton	2a44ffe51b	* x86: BZHI optimisation now sets the subtract and shift nodes to 'do not execute' as they are skipped over.	2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton	16bd996e74	* x86: 'and not' optimisation now sets the NOT node to 'do not execute' as it is skipped over	2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton	dd7320ec13	* x86: PostPeepholeOptCmp and PostPeepholeOptTestOr ... now do a final attempt of TrySwapMovCmp to clean up Pass 2 optimisations	2023-02-19 20:22:49 +00:00
J. Gareth "Curious Kit" Moreton	4d676cd6fa	* x86: JccMovJmpMov2CMovCMov will no longer move ... MOV instructions (fixes i40122)	2023-02-19 20:22:49 +00:00
J. Gareth "Curious Kit" Moreton	4e8ef448ed	* i386: Bug fix where EBP was marked as preserved when it wasn't, causing faulty optimisations	2023-02-19 16:49:29 +00:00
J. Gareth "Curious Kit" Moreton	2224305834	* x86: Fixed bad register tracking in OptPass2JMP	2023-02-12 15:14:21 +00:00
J. Gareth "Curious Kit" Moreton	33dfb6cb4e	* x86: Converted bit-test optimisations to use ... debug_hexstr so comments aren't truncated (and put $ before BTx values)	2023-02-06 21:31:50 +00:00
J. Gareth "Curious Kit" Moreton	ae47cc2c88	* x86: New debug_hexstr instruction to help produce concise debug comments	2023-02-06 21:31:50 +00:00
J. Gareth "Curious Kit" Moreton	f3f9c68ddb	* x86-64: Extended the movl/movq optimisation to cover more distance	2023-01-22 09:35:35 +00:00
J. Gareth "Curious Kit" Moreton	42b052eb83	* x86-64: movl/movq -> movl/movl zero-extension optimisation	2023-01-22 09:35:35 +00:00
florian	5598ffc210	* x86_64: warn only on negative offsets if rsp is involed, second part of #40113 ... + tests	2023-01-17 23:09:42 +01:00
florian	8b08486fa1	* do not warn on lea e/rsp with negative address offset, part of #40113 ... + tests	2023-01-15 23:06:05 +01:00
florian	a9dca32689	* undid accidentely activated define	2023-01-13 22:34:57 +01:00
J. Gareth "Curious Kit" Moreton	df80d4e612	* x86: CMOV optimisations now check optimizecputype rather than cputype	2023-01-10 22:23:58 +00:00
J. Gareth "Curious Kit" Moreton	4d57dee8d9	* x86: Extension to CanBeCMOV that permits a potentially unsafe reference if it appears in the previous comparison	2023-01-10 22:23:58 +00:00
J. Gareth "Curious Kit" Moreton	b108608b29	* x86: New CMP optimisation that mimics some of the CMOV optimisations and removes unnecessary conditions.	2023-01-10 22:23:58 +00:00
J. Gareth "Curious Kit" Moreton	bab60d819f	* x86: Refactored CMOV optimisations and permitted the use of constants in some cases.	2023-01-10 22:23:58 +00:00
J. Gareth "Curious Kit" Moreton	5f3749dc49	* x86: Introduced TrySwapMovOp method, and redesigned TrySwapMovCmp ... to use it while also trying to move one more instruction back	2023-01-10 22:23:58 +00:00
florian	6c5f9537b3	* avoid to generate bt [mem], reg, resolves #40039	2022-12-31 18:27:27 +01:00
Pierre Muller	e2905b8fad	Refuse A_Jcc, A_SETcc, and A_CMOVcc without condition	2022-12-10 19:50:47 +00:00
Pierre Muller	af04a523bb	* Fix testing of A_JCC and A_SETCC, add A_CMOVCC ... * Add $PIC for i386 and x86_64 solaris assemblers	2022-12-10 17:41:33 +01:00
florian	14466ee9d9	* change table updates	2022-12-06 22:41:30 +01:00
florian	8ad7decaa3	* another change information update	2022-12-04 23:17:56 +01:00
florian	42d91c02bd	* continued to fix change information	2022-12-03 23:36:07 +01:00
florian	e0eff8bd89	+ more change information fixed	2022-12-02 23:34:36 +01:00
florian	96d4bd19ac	* use bzhi only (if at all) for in_and_assign_x_y and not other in_*_x_y operations, resolves #40016	2022-11-30 22:16:21 +01:00
florian	a1a2549cf1	+ Debug message	2022-11-29 23:20:35 +01:00
J. Gareth "Curious Kit" Moreton	cc27576339	* x86: Fixed movzwl/movzbl bug in OptPass2Movx (resolves i40003)	2022-11-28 21:43:50 +00:00
J. Gareth "Curious Kit" Moreton	69c7838571	* x86: Addition of AMD CPUs: Bobcat, Jaguar, Piledriver, Excavator, Zen2 and Zen3 (and supporting flags)	2022-11-25 22:14:59 +00:00
florian	7da8c774be	+ ShlShl2Shl optimization	2022-11-21 22:23:55 +01:00
florian	4778973492	* further look ahead for temp. deallocation for FstpFldFstp2Fstp and FstpFld2<Nop>	2022-11-19 21:05:22 +01:00
florian	ef53f9bc25	+ FstpFldFstp2Fstp optimization	2022-11-18 23:37:34 +01:00
J. Gareth "Curious Kit" Moreton	c21bf747fb	* x86: Extension to Cmp1Jl2Cmp0Jle to catch inverted variant	2022-11-18 17:20:20 +00:00
J. Gareth "Curious Kit" Moreton	e57ef24e37	* x86: TEST and CMP optimisations now perform jump optimisations prematurely to remove unnecessary TEST/CMPs	2022-11-18 17:20:20 +00:00