Commit Graph

75 Commits

Author SHA1 Message Date
florian
73e6af4864 + cpu flag CPUARM_HAS_THUMB_IDIV
* test for CPUARM_HAS_THUMB_IDIV instead the CPU type when creating sdiv/udiv code

git-svn-id: trunk@25648 -
2013-10-05 12:38:55 +00:00
florian
d4968e054b + arm: tsettings.instructionset
* the selected instruction set is now independent from the cpu type: e.g. armv7-a can perfectly execute thumb(2) code

git-svn-id: trunk@25370 -
2013-08-25 21:56:12 +00:00
florian
0e9b8adb7a patch by Michael Ring:
+ support of several armv6m MCUs for arm-embedded
* renamed lpc1343 unit to lpc13xx
+ more lpc13xx MCUs added

git-svn-id: trunk@24379 -
2013-04-29 19:57:08 +00:00
florian
b434b7bc7d * armv6-m has no blx <immediate>
git-svn-id: trunk@23983 -
2013-03-24 20:24:15 +00:00
florian
c2baf7b4c0 Merge r23058
git-svn-id: trunk@23776 -
2013-03-10 16:37:57 +00:00
florian
086ae4b999 Merge r22905 and r22906
git-svn-id: trunk@23773 -
2013-03-10 10:45:34 +00:00
florian
21c154d60a Merged r22903
git-svn-id: trunk@23757 -
2013-03-09 20:56:07 +00:00
florian
1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet
git-svn-id: trunk@23682 -
2013-03-03 12:20:10 +00:00
florian
bcd48ac1a1 + patch by Justin Smyth to support the lpc1343, resolves #23844
git-svn-id: trunk@23620 -
2013-02-14 20:38:53 +00:00
Jeppe Johansen
3ee29eb219 Fixed ARMv7-EM code generation and RTL compilation
Added LM4F120H5 controller type and startup code

git-svn-id: branches/laksen/arm-embedded@22903 -
2012-11-01 17:25:01 +00:00
tom_at_work
312e8b8ecc Add implementations for read/write barrier code for ARM
git-svn-id: trunk@22864 -
2012-10-27 22:53:44 +00:00
Jeppe Johansen
628d46f2d3 Fixed Bsf* functions on platforms that support RBIT
Fixed stackframe epilogue code for Thumb2 to allow proper processing of interrupts

git-svn-id: branches/laksen/arm-embedded@22813 -
2012-10-21 19:13:59 +00:00
Jeppe Johansen
4e84431dde Fix some optimizations which assume that there are 3 operands
Add simple Mul+Sub/Mul+Add into MLS/MLA optimizations
Fix some other small issues in the optimizer
Implement Interlocked* functions with proper use of LDREX/STREX

git-svn-id: branches/laksen/arm-embedded@22801 -
2012-10-21 16:20:52 +00:00
Jeppe Johansen
84ea70fddc Fixed some minor formating issues
Implemented a small heap mananger
Implemented console IO
Changed default LineEnding to CrLf(to ease console IO parsing)

git-svn-id: branches/laksen/arm-embedded@22646 -
2012-10-14 19:10:20 +00:00
Jeppe Johansen
14879a9e82 Added all STM32F1 configurations
git-svn-id: branches/laksen/arm-embedded@22599 -
2012-10-09 06:58:58 +00:00
Jeppe Johansen
a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU
git-svn-id: branches/laksen/arm-embedded@22597 -
2012-10-08 20:10:45 +00:00
Jeppe Johansen
80bb3febea Fixed assembler calling command line for cpus>ARMv5TE. EDSP instructions will generate errors while assembling, due to RTL assembler routines
Updated boot code for all Cortex-M3 controllers, and sc32442b to use weak linking for exception tables.
Cortex-M3 devices now also share initialization routine to simplify maintenance
STM32F10x classes now have specific units which fit the interrupt source names and counts

git-svn-id: branches/laksen/arm-embedded@22581 -
2012-10-08 03:15:40 +00:00
Jeppe Johansen
8b17a358e4 Remove all traces of the interrupt vector table generation mechanism
Clean up cpuinfo tables
Fixed ARMv7M bug(BLX <label> doesn't exist on that version)

git-svn-id: branches/laksen/arm-embedded@22579 -
2012-10-08 00:10:52 +00:00
florian
d67af82228 * patch by Jeppe Johansen: Thumb2-only targets don't support the BLX <label>, and have to use BL <label>, resolves #22770
git-svn-id: trunk@22314 -
2012-09-04 14:57:26 +00:00
florian
91156f8652 + cpuflag CPUARM_HAS_CLZ for arm
git-svn-id: trunk@22309 -
2012-09-04 12:56:27 +00:00
florian
765fb18679 + add a description to the cpuflags where I know the exact meaning/definition
git-svn-id: trunk@22119 -
2012-08-17 20:45:46 +00:00
florian
ba6ba52e7f * instruction scheduling is pretty slow so make it a level 3 optimization for now
git-svn-id: trunk@22115 -
2012-08-17 19:36:29 +00:00
florian
5ceeb8aaa9 * enable scheduler when compiling at least with -O2
git-svn-id: trunk@22111 -
2012-08-17 19:36:04 +00:00
florian
354cac2bb6 + completed arm architectures
* ldrd/strd and pld collected under the edsp define

git-svn-id: trunk@22104 -
2012-08-17 10:37:27 +00:00
florian
7588896775 * make use of cpuflags in the arm compiler
* armv5te architecture

git-svn-id: trunk@22103 -
2012-08-17 10:37:17 +00:00
florian
e4f89fe524 + introduce cpuflags for arm
git-svn-id: trunk@22090 -
2012-08-15 15:49:05 +00:00
florian
4d86d25c6c * -O4 switch for optimizations which are correct but which might have unexpected effects
like field reordering (possible problems cracker classes) or using ebp as normal register (broken
      stack traces from dump_stack)
    + niln is also valid in a cse domain
    * parameters passed by reference shall have a complexity >1
    * load nodes from outer scopes shall have a complexity >1
    * better cse debugging
    + more node types added to cse
    * consider parameters passed by reference in cse
    * take care of cse in parameters in simple cases

git-svn-id: trunk@22050 -
2012-08-09 18:58:54 +00:00
florian
b330bba0bc + introduce -Oofastmath
* limit the application of the tree transformation introduced in r21986 to safe cases and -Oofastmath

git-svn-id: trunk@22040 -
2012-08-08 19:35:45 +00:00
florian
283afbcb07 * new controllers by lelekx, resolves #22523
git-svn-id: trunk@21980 -
2012-07-28 21:57:29 +00:00
Jonas Maebe
3798b79fd7 + optimization that (re)orders instance fields of Delphi-style classes in
order to minimise memory losses due to alignment padding. Not yet enabled
    by default at any optimization level, but can be (de)activated separately
    via -Oo(no)orderfields
   o added separate tdef.structalignment method that returns the alignment
     of a type when it appears in a record/object/class (factors out
     AIX-specific double alignment in structs)
   o changed the handling of the offset of a delegate interface
     implemented via a field, by taking the field offset on demand
     rather than at declaration time (because the ordering optimization
     causes the offsets of fields to be unknown until the entire
     declaration has been parsed)

git-svn-id: trunk@21947 -
2012-07-22 16:47:19 +00:00
Jonas Maebe
6ba8dc7146 + support for the ARM hard float EABI on Linux (patch by Peter Green):
o new eabihf (hard float) abi
   o vfpv3_d16 variant of VFP (default variant used by EABI assemblers: VFPv3
     with only 16 double registers instead of 32) and pass it to GNU as
   o make the odd numbered single precision floating point VFP registers
     available for explicit allocation for use by the calling convention
  * fixed copy/paste error in stdname of S30 register
  -> use -dFPC_ARMHF to create an ARM eabi hard float compiler
  (mantis #21554)

git-svn-id: trunk@20660 -
2012-03-29 20:50:09 +00:00
florian
0cbdc1ae6e * deactivate assembler scheduler, needs some more fixes first
git-svn-id: trunk@20537 -
2012-03-18 17:05:22 +00:00
florian
0fe22a358b + first version of ldr instruction scheduler on arm
git-svn-id: trunk@20512 -
2012-03-11 19:10:58 +00:00
florian
7ea7031017 + cpu type armv5t
git-svn-id: trunk@20500 -
2012-03-10 19:04:22 +00:00
florian
ce070c93fc + patch by Jeppe Johansen to support the SC32442B
git-svn-id: trunk@20081 -
2012-01-14 21:39:32 +00:00
pierre
fc9dd61f03 Avoid warning about missing fields in embedded_controllers array
git-svn-id: trunk@19577 -
2011-11-03 10:07:35 +00:00
florian
0781ac1f82 + support for lpc1768 by David Welch
git-svn-id: trunk@18927 -
2011-08-31 20:17:23 +00:00
florian
34b033ba72 + armv4t
* use armv4t and armv7m, in the makefiles instead of armv7 and cortexm3

git-svn-id: trunk@18863 -
2011-08-27 20:21:42 +00:00
florian
c95f7b1c2f * remove cpu type cortex m3 on arm, it is just an ARMv7-M
git-svn-id: trunk@18862 -
2011-08-27 19:26:16 +00:00
florian
42c94d1b91 * controllerunit.inc is no longer used
git-svn-id: trunk@18852 -
2011-08-26 07:22:09 +00:00
florian
a08dfdf803 o slightly modified patch by John Clymer:
* converts the embedded information into controller specific records (arm and avr)
  * new cpu-specific units for several Stellaris (Fury and Tempest class) targets, 
  + STM32F103RB
  - old Stellaris unit has been removed

git-svn-id: trunk@18848 -
2011-08-25 21:46:26 +00:00
florian
e6e6b98dd8 * stellaris => ct_stellaris
git-svn-id: trunk@18125 -
2011-08-06 19:56:01 +00:00
Jonas Maebe
da056da20f + added armv7 identifier (no special code generation, but required to
link against Xcode 3.2.6/4-generated code for ARMv7 -- use -Cparmv7,
    but note that you also have to compile the RTL and all other units with
    this option for them to be linkable against other ARMv7 code when using
    those tools)

git-svn-id: trunk@18069 -
2011-08-02 20:36:43 +00:00
florian
3ce9ff93f1 + patch by Jeppe Johansen to support automatic interrupt table generation by using the interrupt directive with an offset. Not activated yet because it requires to change also the startup code of the different mcus.
git-svn-id: trunk@17279 -
2011-04-10 15:59:06 +00:00
florian
f13eff22b0 + added generic stellaris support as provided by #17365
git-svn-id: trunk@15957 -
2010-09-09 09:02:14 +00:00
florian
5acf377e31 * enable node cse for all cpus as level 2 optimization
git-svn-id: trunk@14703 -
2010-01-17 12:28:28 +00:00
Jonas Maebe
d1538ab023 o added ARM VPFv2/VFPv3 support:
+ RTL support:
      o VFP exceptions are disabled by default on Darwin,
        because they cause kernel panics on iPhoneOS 2.2.1 at least
      o all denormals are truncated to 0 on Darwin, because disabling
        that also causes kernel panics on iPhoneOS 2.2.1 (probably
        because otherwise denormals can also cause exceptions)
    * set softfloat rounding mode correctly for non-wince/darwin/vfp
      targets
    + compiler support: only half the number of single precision
      registers is available due to limitations of the register
      allocator
    + added a number of comments about why the stackframe on ARM is
      set up the way it is by the compiler
    + added regtype and subregtype info to regsets, because they're
      also used for VFP registers (+ support in assembler reader)
    + various generic support routines for dealing with floating point
      values located in integer registers that have to be transferred to
      mm registers (needed for VFP)
    * renamed use_sse() to use_vectorfpu() and also use it for
      ARM/vfp support
    o only superficially tested for Linux (compiler compiled with -Cpvfpv6
      -Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
      the fpu exception handler still needs to be implemented), Darwin has
      been tested more thoroughly
  + added ARMv6 cpu type and made it default for Darwin/ARM
  + ARMv6+ implementations of atomic operations using ldrex/strex
  * don't use r9 on Darwin/ARM, as it's reserved under certain
    circumstances (don't know yet which ones)
  * changed C-test object files for ARM/Darwin to ARMv6 versions
  * check in assembler reader that regsets are not empty, because
    instructions with a regset operand have undefined behaviour in that
    case
  * fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
    int64->single type conversion
  * fixed constant pool locations in case 64 bit constants are generated,
    and/or when vfp instructions with limited reach are present

  WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
    code with -Cparmv6 (or higher), or you will get crashes. The reason is
    that storing/restoring multiple VFP registers must happen using
    different instructions on pre/post-ARMv6.

git-svn-id: trunk@14317 -
2009-12-03 22:46:30 +00:00
Jonas Maebe
62c1781bea + mw_pascal calling convention support for ARM, ppc64 and x86_64: identical
to cdecl, except that all const record parameters are passed by reference
    (required for Mac OS X interfaces)

git-svn-id: trunk@14114 -
2009-11-08 13:42:11 +00:00
florian
515774b864 * merged armthum branch
-- Zusammenführen der Unterschiede zwischen Projektarchiv-URLs in ».«:
U    rtl/arm/setjump.inc
A    rtl/arm/thumb2.inc
U    rtl/arm/divide.inc
A    rtl/embedded/arm/stm32f103.pp
U    rtl/inc/system.inc
U    compiler/alpha/cgcpu.pas
U    compiler/sparc/cgcpu.pas
U    compiler/i386/cgcpu.pas
U    compiler/ncgld.pas
U    compiler/powerpc/cgcpu.pas
U    compiler/avr/cgcpu.pas
U    compiler/aggas.pas
U    compiler/powerpc64/cgcpu.pas
U    compiler/x86_64/cgcpu.pas
U    compiler/cgobj.pas
U    compiler/psystem.pas
U    compiler/aasmtai.pas
U    compiler/m68k/cgcpu.pas
U    compiler/ncgutil.pas
U    compiler/rautils.pas
U    compiler/arm/raarmgas.pas
U    compiler/arm/armatts.inc
U    compiler/arm/cgcpu.pas
U    compiler/arm/armins.dat
U    compiler/arm/rgcpu.pas
U    compiler/arm/cpubase.pas
U    compiler/arm/agarmgas.pas
U    compiler/arm/cpuinfo.pas
U    compiler/arm/armop.inc
U    compiler/arm/narmadd.pas
U    compiler/arm/aoptcpu.pas
U    compiler/arm/armatt.inc
U    compiler/arm/aasmcpu.pas
U    compiler/systems/t_embed.pas
U    compiler/psub.pas
U    compiler/options.pas

git-svn-id: trunk@13801 -
2009-10-04 09:03:44 +00:00
florian
60169d34dc * fixed compilation of AVR compiler
git-svn-id: trunk@13342 -
2009-06-27 19:31:24 +00:00