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334 Commits

Author SHA1 Message Date
florian
3f8aeadb91 * do not generate exit code for arm (thumb and thumb-2) if a routine is marked as noreturn 
git-svn-id: trunk@49506 -
 2021-06-15 20:09:46 +00:00
florian
695665c393 + optimized multiplication for "symmetric" bit patterns on arm 
git-svn-id: trunk@49199 -
 2021-04-13 21:16:56 +00:00
florian
09d6398942 * arm: better cfi 
git-svn-id: trunk@48685 -
 2021-02-15 22:25:18 +00:00
florian
e694897bb3 * initial implementation of CFI support for arm (non-thumb) 
git-svn-id: trunk@48684 -
 2021-02-15 21:34:07 +00:00
florian
a3d68e6839 * arm thumb: generate proper cfi 
git-svn-id: trunk@48678 -
 2021-02-14 21:26:41 +00:00
florian
0316a7697f * arm thumb1: several fixes for the internal assembler writer 
git-svn-id: trunk@48675 -
 2021-02-14 17:52:26 +00:00
florian
dda9f83dfe * factored out tbasecgarm.init_mmregister_allocator 
git-svn-id: trunk@48671 -
 2021-02-13 22:16:59 +00:00
florian
87e1dc159d * do not mess with FPA registers if they are not available 
git-svn-id: trunk@48669 -
 2021-02-13 17:04:03 +00:00
florian
3b49e95415 * do not initialize unncessary register allocators 
git-svn-id: trunk@48628 -
 2021-02-10 19:52:52 +00:00
florian
637976e83f * patch by Marģers to unify internal error numbers, resolves #37888 
git-svn-id: trunk@47103 -
 2020-10-13 19:59:01 +00:00
Jonas Maebe
e7d1a77f9a * rename the ARM/AArch64-Darwin targets to ARM/AArch64-iOS 
* rename the m68k/PowerPC-MacOS targets to m68k/PowerPC-MacOSClassic
  * repurpose the AArch64/Darwin target for AArch64/macOS
   o make AArch64-Darwin default target for a hosted AArch64-Darwin compiler

git-svn-id: trunk@45758 -
 2020-07-10 21:52:24 +00:00
florian
497ff94cb0 + fpu_fpv4_sp_d32 
* some fixes to make fpv4-sp-d32 work

git-svn-id: trunk@44702 -
 2020-04-12 14:24:56 +00:00
Jonas Maebe
1e3f72403e * renamed getintparaloc to getcgtempparaloc 
o it can be used for more than integer parameters

git-svn-id: trunk@43781 -
 2019-12-24 22:12:25 +00:00
florian
29bdbdba95 * reduce amount of software floating point exception checking, VSTR, VMOV, VLDR do not raise those 
git-svn-id: trunk@43162 -
 2019-10-10 20:31:30 +00:00
florian
16163b74ec + support for the gnu2 general-dynamic tls model on arm, use it instead of the gnu one as the gnu2 one can be relaxed (access optimizations by the linker) 
+ support pic relocations in the internal assembler writer

git-svn-id: trunk@43128 -
 2019-10-05 20:48:26 +00:00
florian
03dfc615dc + new relocations for arm tls 
git-svn-id: trunk@43123 -
 2019-10-05 20:48:21 +00:00
florian
ba0768b6a6 * building with -Cfvfpv2 hopefully fixed 
git-svn-id: trunk@42683 -
 2019-08-13 22:12:52 +00:00
florian
867df5362c + basic Neon support in the assembler writer 
+ make use of VEOR if possible to clear VFP registers

git-svn-id: trunk@42682 -
 2019-08-13 22:12:51 +00:00
florian
85edf1c1eb * reworked arm vfp capability handling to use fpu_capabilites 
git-svn-id: trunk@42679 -
 2019-08-13 18:41:15 +00:00
florian
99f92ce5dd * insert FPC_THROWFPUEXCEPTION call into the correct assembler list 
git-svn-id: trunk@42540 -
 2019-07-30 21:04:32 +00:00
florian
46bac33a2d + fpu_capabilities for arm 
* some code converted to use fpu_capabilities

git-svn-id: trunk@42536 -
 2019-07-30 21:04:28 +00:00
florian
b3ed34592f + software handling of exceptions on arm 
* reworked software handling of exceptions so they can be check lazily

git-svn-id: trunk@42525 -
 2019-07-28 21:06:36 +00:00
Jonas Maebe
281b3ad276 * fix case completeness and unreachable code warnings in compiler that would 
be introduced by the next commit

git-svn-id: trunk@42046 -
 2019-05-12 14:29:03 +00:00
yury
3a43ffd57b * arm: Include pi_needs_got to current_procinfo.flags when the GOT register is accessed. It forces proper initialization of the GOT register at the beginning of a procedure. This fixes storing of a double constant to a field in a packed record and other rare copy operations when PIC is enabled. 
git-svn-id: trunk@41405 -
 2019-02-20 20:06:32 +00:00
yury
3e8c7f66b7 * arm: Fixed crash while loading double constants with PIC enabled. This is the regression after r41129. The crash has occurred due to usage of a rare code path. It will be fixed in the next commit. 
git-svn-id: trunk@41404 -
 2019-02-20 20:00:06 +00:00
Jonas Maebe
d99d1f1f30 * let the ARM code generator use the generic tcg.a_load_ref_cgpara() instead 
of its own buggy version
   o added support to the generic version to override part of the functionality
     needed to implement an ARM quirk

git-svn-id: trunk@41335 -
 2019-02-16 10:45:46 +00:00
florian
2b6076a719 * compilation fixed 
git-svn-id: trunk@41139 -
 2019-01-29 22:06:32 +00:00
florian
acbf7d15c4 * do not load always the references into a register in g_concatcopy 
git-svn-id: trunk@41129 -
 2019-01-29 20:40:39 +00:00
pierre
4657f45e74 * Change first parameter type of function is_continuous_maks to aword type. 
Add typecasts where needed to allow for successful compilation of arm-linux target
    with -CriotR options when building the compiler.

git-svn-id: trunk@40314 -
 2018-11-14 13:13:19 +00:00
florian
9f16c34329 + initial work for tls-based threadvar support on arm-linux 
git-svn-id: trunk@40267 -
 2018-11-07 22:02:58 +00:00
pierre
e42ccccecf Disable range check completely in arm/cgcpu unit 
git-svn-id: trunk@40112 -
 2018-10-31 15:48:32 +00:00
Jonas Maebe
0b246f3dbd * converted Boolean8 to an internal type, and mapped Boolean to the 
new internal pasbool1(type) (part of mantis #34411)
   o apply the _Bool x86-64 parameter passing rules only to pasbool1

git-svn-id: trunk@39949 -
 2018-10-16 21:14:18 +00:00
Jonas Maebe
d69ad8fa41 * removed temppos field again from parameter locations: they're not allocated 
by the temp manager of the current procedure

git-svn-id: trunk@38858 -
 2018-04-27 19:18:55 +00:00
Jonas Maebe
4686f61002 * keep track of the temp position separately from the offset in references, 
so that they can still be freed after the reference has been changed
    (e.g. in case of array indexing or record field accesses) (mantis #33628)

git-svn-id: trunk@38814 -
 2018-04-22 17:03:16 +00:00
Jeppe Johansen
f3889a191b Generate bx lr exit instruction in Thumb-2 instead of mov pc,lr as bx lr will trigger an exception return but mov doesn't. 
git-svn-id: trunk@36597 -
 2017-06-26 08:05:31 +00:00
yury
2ae3ce79bb * ARM: Never use the "BLX label" instruction. Use "BL label" instead. 
The linker will always change BL to BLX if necessary, but not vice versa (linker version dependent).
  "BLX label" ALWAYS changes the instruction set. It changes a processor in ARM state to Thumb state,
  or a processor in Thumb state to ARM state.

git-svn-id: trunk@36086 -
 2017-05-04 15:55:55 +00:00
Jonas Maebe
880d438704 * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 
inherit from it for LLVM without a thousand ifdefs

git-svn-id: trunk@35141 -
 2016-12-16 22:41:21 +00:00
Jonas Maebe
a25ebbba3e + added volatility information to all memory references 
o separate information for reading and writing, because e.g. in a
     try-block, only the writes to local variables and parameters are
     volatile (they have to be committed immediately in case the next
     instruction causes an exception)
   o for now, only references to absolute memory addresses are marked
     as volatile
   o the volatily information is (should be) properly maintained throughout
     all code generators for all archictures with this patch
   o no optimizers or other compiler infrastructure uses the volatility
     information yet
   o this functionality is not (yet) exposed at the language level, it
     is only for internal code generator use right now

git-svn-id: trunk@34996 -
 2016-11-27 18:17:37 +00:00
Jonas Maebe
aa1be3276f - removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol(): 
it was AT_NONE, which is invalid and should never be used
  * explicitly pass the correct value for all calls to those methods elsewhere
    in the compiler

git-svn-id: trunk@34250 -
 2016-08-05 07:09:16 +00:00
florian
ad71b8348e * S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers 
git-svn-id: trunk@33187 -
 2016-03-06 13:33:26 +00:00
florian
1c067e96bf * fix VFPv4 support 
git-svn-id: trunk@33182 -
 2016-03-06 13:33:16 +00:00
florian
3f2057a2f2 * do not generate blx instructions, the generation of blx instead of bl was introduced some years ago but today it proves to be wrong: if necessary, the linker converts the bl into a blx, this is also how gcc and clang handle it 
git-svn-id: trunk@32788 -
 2015-12-29 13:32:21 +00:00
yury
61a1976e09 * Removed a leftover of my code. It is not needed anymore. 
git-svn-id: trunk@31755 -
 2015-09-18 10:34:27 +00:00
yury
40628fa614 * Removed unused vars. 
git-svn-id: trunk@31731 -
 2015-09-17 12:24:59 +00:00
yury
80e5eb0c5d * ARM: I hope this is a final proper fix for GOT initialization. + Test. 
git-svn-id: trunk@31730 -
 2015-09-17 12:18:04 +00:00
yury
1dff9bf025 * ARM: Fixed GOT init when optimization is off. 
git-svn-id: trunk@31728 -
 2015-09-16 21:30:20 +00:00
yury
f2c8824963 * ARM: Do not use R9 as a fixed GOT register. 
git-svn-id: trunk@31712 -
 2015-09-16 13:52:15 +00:00
yury
61c0448903 * Big fix for ARM GOT support to make it work: 
- Fixed access to symbols with offset.
  - Always use register R9 for GOT pointer to prevent bugs when free register limit is reached in a function.
  - GOT is not needed for function calls by name.

git-svn-id: trunk@31681 -
 2015-09-14 23:15:10 +00:00
Jeppe Johansen
dac294c680 Fix ARMv3/ARMv2A support. 
git-svn-id: trunk@31561 -
 2015-09-06 20:33:26 +00:00
Jonas Maebe
61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm) 
git-svn-id: trunk@30429 -
 2015-04-04 14:29:16 +00:00