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324 Commits

Author SHA1 Message Date
Jonas Maebe
f402b0d7df * changed getpointerdef() into a tpointerdef.getreusable() class method 
o allows removing the ugly x86 hacks

git-svn-id: trunk@31144 -
 2015-06-22 08:17:49 +00:00
florian
b222d0b663 * correctly handle LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF in second_int_to_bool, resolves issue #28007 
git-svn-id: trunk@30765 -
 2015-05-02 13:52:50 +00:00
florian
7dd1d6aa77 o fixes handling of iso i/o parameters/program parameters: 
* explicit reset is needed
  * variable must be declared again

git-svn-id: trunk@30757 -
 2015-05-01 20:58:31 +00:00
Jonas Maebe
61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm) 
git-svn-id: trunk@30429 -
 2015-04-04 14:29:16 +00:00
Jonas Maebe
687bb15299 * renamed getdatalabel() to getglobaldatalabel 
git-svn-id: branches/hlcgllvm@30336 -
 2015-03-27 21:25:34 +00:00
Jonas Maebe
bd203a5b57 * synchronised with trunk till r30240 
git-svn-id: branches/hlcgllvm@30241 -
 2015-03-15 19:44:58 +00:00
Jeppe Johansen
914e9e7b49 Merged from trunk 
git-svn-id: branches/laksen/armiw@30146 -
 2015-03-08 12:33:46 +00:00
sergei
a709a9b637 * MIPS peephole: check that operand is present before accessing its fields, also check that it's not a branch target. Mantis #27608. 
git-svn-id: trunk@30110 -
 2015-03-06 00:04:06 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095 
git-svn-id: branches/hlcgllvm@30101 -
 2015-03-05 20:32:15 +00:00
Jeppe Johansen
47dbec3111 Rebase to trunk revision 
git-svn-id: branches/laksen/armiw@29708 -
 2015-02-15 16:08:18 +00:00
pierre
cc537a2e76 Try to avoid uncorrect optimization 
git-svn-id: trunk@29373 -
 2015-01-02 23:00:22 +00:00
Jeppe Johansen
7390acc426 Merged from recent trunk. 
git-svn-id: branches/laksen/armiw@29369 -
 2015-01-01 23:54:40 +00:00
sergei
b46ce6b70e * Fixed condition to output div/divu having R0 as first operand as non-macros. 
git-svn-id: trunk@29359 -
 2014-12-29 23:19:01 +00:00
sergei
57094d495b + MIPS: implement inline full 64-bit multiplication, for cases when overflow checking is off and CPU is set to mips32r2. 
git-svn-id: trunk@29354 -
 2014-12-28 22:03:15 +00:00
Jeppe Johansen
901275b4a1 Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen). 
Add missing fields to other elf targets.

git-svn-id: branches/laksen/armiw@29286 -
 2014-12-14 16:28:35 +00:00
florian
5c67fcc43f + change always floating point divisions into multiplications if they are a power of two, 
this is an exact operation so it is always allowed
* change only divisions by normal numbers into multiplications

git-svn-id: trunk@29085 -
 2014-11-16 20:47:38 +00:00
sergei
a4053370fc * ELF linker: track relocation style (REL or RELA) of each input section and use it instead of global default on MIPS targets. This fixes internal linking of tests/test/units/system/tres*.pp. 
git-svn-id: trunk@29070 -
 2014-11-13 22:10:53 +00:00
Tomas Hajny
dc1446d32a * fixed misplaced constant definition 
git-svn-id: trunk@29053 -
 2014-11-10 13:51:50 +00:00
Tomas Hajny
3ee3542744 * boolean constant instead of IFDEFs for detection of microcontroller support 
git-svn-id: trunk@29052 -
 2014-11-10 12:34:59 +00:00
sergei
06ee500352 * MIPS: improved code generation in make_simple_ref 
* Clean up the peephole optimizer
+ More peephole optimizations.

git-svn-id: trunk@28892 -
 2014-10-21 21:05:46 +00:00
sergei
f85a8159ef * compiler/mips/cpuinfo.pas: removed "FPU_" prefixes from FPU names, not necessary because compiler inserts one itself. 
* rtl/embedded/system.pp: removed (commented out) FPU initialization from initialization of system unit, was dead code anyway because FPC_HAS_FEATURE_FPU is never defined and "feature FPU" does not exist.
* rtl/mips/*.inc: don't compile FPU instructions if compiling RTL with -CfNONE or -CfSOFT (however, handling these switches for MIPS targets in compiler needs further fixing).

git-svn-id: trunk@28670 -
 2014-09-15 18:24:23 +00:00
sergei
84245a6e0c * MIPS: doing progress with peephole optimizer. 
git-svn-id: trunk@28628 -
 2014-09-08 23:24:43 +00:00
sergei
3ede5ec99b * MIPS peephole: refactored/simplified and added (another) couple of optimizations. 
git-svn-id: trunk@28591 -
 2014-09-03 20:00:42 +00:00
sergei
ac64c4600f + MIPS: make use of instructions MUL,SEB and SEH that are available in modern cores. 
git-svn-id: trunk@28590 -
 2014-09-03 19:59:00 +00:00
sergei
4e2fb9d28b * MIPS: fixed O_MOVE_SOURCE and O_MOVE_DEST constants (they were swapped, amazing that it ever worked with such a mistake). 
+ Spilling for SEB and SEH
* Another attempt to get spilling of 3-operand form DIV/DIVU be done correctly.

git-svn-id: trunk@28588 -
 2014-09-03 19:57:46 +00:00
sergei
406a678223 * MIPS: MOVE instruction cannot be changed into conditional move (MOVZ/MOVN) if it overwrites register used as condition. 
git-svn-id: trunk@28587 -
 2014-09-03 11:59:16 +00:00
sergei
02f39c667a * MIPS: added a couple of important capabilities and made them available for big-endian targets as well. 
git-svn-id: trunk@28581 -
 2014-09-02 12:51:48 +00:00
sergei
768e090006 - MIPS: don't create reg.allocator for MM registers. 
git-svn-id: trunk@28579 -
 2014-09-01 21:55:03 +00:00
sergei
1e11e34f42 + MIPS: implemented more peephole optimizations. 
git-svn-id: trunk@28536 -
 2014-08-29 18:20:49 +00:00
sergei
d9a7d28838 + MIPS: support floating point conditions in its emulated flags, on MIPS4+ convert such flags to registers using conditional move instructions (i.e. without branching). For older cores generated code remains the same. 
git-svn-id: trunk@28535 -
 2014-08-29 18:18:17 +00:00
sergei
3b06465322 + MIPS: support replacement spilling for mov.s, mov.d and (partially) mtc1 instructions. 
git-svn-id: trunk@28530 -
 2014-08-27 21:26:38 +00:00
sergei
5655baa23a * MIPS: optimized conversion of unsigned 32-bit integers to float, now uses one integer register instead of two and does not generate redundant move. 
git-svn-id: trunk@28529 -
 2014-08-27 21:23:47 +00:00
sergei
f0496001fb - MIPS: removed allocation of stack/frame pointer registers in prologue, hacks like this are no longer needed since r27104. 
git-svn-id: trunk@28505 -
 2014-08-21 19:36:00 +00:00
Károly Balogh
d22dc68fda * fixed DFA warnings for MIPS and AVR 
git-svn-id: trunk@28502 -
 2014-08-20 15:05:43 +00:00
Jonas Maebe
b745dcc64c * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because 
for some platforms it depends on that routine

git-svn-id: branches/hlcgllvm@28492 -
 2014-08-19 20:22:54 +00:00
Jonas Maebe
5c75b6dd6b * synchronised with trunk up till r28402 
git-svn-id: branches/hlcgllvm@28403 -
 2014-08-13 16:04:30 +00:00
sergei
482e61dafa * MIPS, TCpuAsmOptimizer.GetNextInstructionUsingReg: test that returned item is actually an instruction, because GetNextInstruction can sometimes stop on labels. 
+ Try to eliminate register move after instructions that load from memory.

git-svn-id: trunk@28380 -
 2014-08-10 21:31:13 +00:00
sergei
f1d1fd4f24 * Inserted explicit typecasts in order to prevent range check errors at some places where signed and unsigned types are assigned to each other (mostly MIPS-specific, but one was necessary in generic code). 
git-svn-id: trunk@28379 -
 2014-08-10 21:26:14 +00:00
sergei
e4fea2ebc8 * Dummy implementations of a_bit_scan_reg_reg and g_stackpointer_alloc in tcg, removes the need to override these methods in every descendant code generator solely to avoid "constructing a class with abstract method" warning. 
git-svn-id: trunk@28175 -
 2014-07-06 11:34:04 +00:00
Jonas Maebe
7949bebb8d * synchronised with r28168 of trunk 
git-svn-id: branches/hlcgllvm@28169 -
 2014-07-05 21:30:28 +00:00
Jonas Maebe
1516661249 + new chlcgobj class reference variable that can be used to call thlcg* 
virtual methods even when hlcg doesn't contain a valid instance

git-svn-id: branches/hlcgllvm@28143 -
 2014-07-03 22:28:31 +00:00
Jonas Maebe
b0ff41406a * grouped all tai_real* types into a single tai_realconst type, 
to free up space for more ait_* types in taitype (can't have
    more than 32 because they have to fit in a small set)
   o factored out writing of floating point numbers as an array of
     byte in the external assemblers

git-svn-id: branches/hlcgllvm@28105 -
 2014-07-01 16:29:58 +00:00
sergei
e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 
* Change register type of second operand in CTC1 and CFC1 instructions to R_SPECIALREGISTER, so it is not output using a symbolic name. Mantis #26380.

git-svn-id: trunk@28034 -
 2014-06-22 22:01:44 +00:00
sergei
c2a29a0dbb + MIPS: implemented peephole optimization which changes appropriate patterns into conditional moves, which are available on MIPS4 and higher. 
git-svn-id: trunk@28008 -
 2014-06-20 05:57:39 +00:00
sergei
4e7c908b0d + MIPS: added movn and movz instructions. 
git-svn-id: trunk@28007 -
 2014-06-19 22:44:17 +00:00
sergei
25037f5318 - MIPS: completely removed trgcpu.add_constraints method. 
While it can be correct from some point of view, it does not prevent aliasing a single-precision register into upper half of double-precision one. This is currently handled by making only even floating-point registers available to RA. At the same time, it somehow (possibly due to another bug in RA) generates a lot of unnecessary moves, as if physical double-precision registers conflict with each other. Anyway, removing it considerably improves the code without regressions in the test suite.

git-svn-id: trunk@27999 -
 2014-06-19 03:59:24 +00:00
sergei
c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 
* cpubase.pas, std_regname: changed logic to lookup known names for special registers before resorting to default name, so that $fcc0..$fcc7 can be used as operands.

git-svn-id: trunk@27992 -
 2014-06-17 23:15:34 +00:00
sergei
c77225d2c4 + MIPS: added some instructions. 
git-svn-id: trunk@27991 -
 2014-06-17 22:52:35 +00:00
sergei
a8e30043db + MIPS: more peephole optimizations (basically updated to the state of SPARC peephole). 
git-svn-id: trunk@27990 -
 2014-06-17 22:50:29 +00:00
sergei
244f65525b * MIPS: dropped gas_std_regname, its functionality merged into std_regname. This fixes register names in non-instructions (reg. allocation information, variable locations, etc.) and makes assembler listings more readable. 
git-svn-id: trunk@27986 -
 2014-06-16 22:52:56 +00:00