Commit Graph

109 Commits

Author SHA1 Message Date
tg74
867d145e50 support vector operand bcst,{sae},{er} + k-register
git-svn-id: branches/tg74/avx512@39457 -
2018-07-16 17:06:57 +00:00
tg74
31e4d4ef5e AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512
git-svn-id: branches/tg74/avx512@39196 -
2018-06-08 06:53:35 +00:00
florian
fc6c0e8ef4 + AndShlToShl optimization
* moved topsize2memsize to cpubase

git-svn-id: trunk@38343 -
2018-02-25 15:34:12 +00:00
florian
31f78ea2b6 + implementation of the vectorcall calling convention by J. Gareth Moreton
+ tests

git-svn-id: trunk@38206 -
2018-02-11 17:50:37 +00:00
nickysn
baf492c7a5 + another helper function: x86_parameterized_string_op_param_count
* when generating x86 code for parameterized string instructions with the
  internal object writer, don't rely on the destination operand being [(r/e)di]
  when determining the segment prefix, because when using intel syntax, source
  and destination can be anything (only the operand size, the address size and
  the source segment is taken into account)

git-svn-id: trunk@37452 -
2017-10-12 16:07:15 +00:00
nickysn
4c75b15afe * shortened the names of the is_x86_string_instruction_op,
is_x86_parameterless_string_instruction_op and
  is_x86_parameterized_string_instruction_op by removing 'instruction' from
  their names

git-svn-id: trunk@37451 -
2017-10-12 15:20:22 +00:00
nickysn
e3ca2a3043 + added helper functions get_x86_string_op_si_param and get_x86_string_op_di_param
* use get_x86_string_op_si_param in the nasm writer

git-svn-id: trunk@37450 -
2017-10-12 15:12:40 +00:00
nickysn
5a5cd65559 + added helper functions x86_param2paramless_string_op and
get_x86_string_op_size
* refactored the AT&T inline asm handling of x86 parameterized string ops, so it
  uses the new helper functions

git-svn-id: trunk@37449 -
2017-10-12 14:25:32 +00:00
nickysn
98c4986b6d + added x86 helper functions is_x86_string_instruction_op,
is_x86_parameterless_string_instruction_op and
  is_x86_parameterized_string_instruction_op

git-svn-id: trunk@37447 -
2017-10-12 13:18:38 +00:00
nickysn
ddba821561 * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved
from cpubase unit to a method in the tcg class. The reason for doing that is
  that this is now a standard part of the 16-bit and 8-bit code generators and
  moving to the tcg class allows doing extra checks (not done yet, but for
  example, in the future, we can keep track of whether there was an extra
  register allocated with getintregister and halt with an internalerror in case
  GetNextReg() is called for registers, which weren't allocated as a part of a
  sequence, therefore catching a certain class of 8-bit and 16-bit code
  generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
  anything. It might be added to the tcg class, in case it's ever needed, but
  for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.

git-svn-id: trunk@37180 -
2017-09-11 14:53:06 +00:00
nickysn
30c38a81a9 + also check register type (must be R_INTREGISTER) and subregister (must be
R_SUBW) in i8086's GetNextReg()

git-svn-id: trunk@37177 -
2017-09-11 13:25:32 +00:00
florian
b1dff29cbf * removed unused units
git-svn-id: trunk@36165 -
2017-05-09 19:53:14 +00:00
nickysn
8926adbab5 * fixed names, returned by std_regname for ymm registers
git-svn-id: trunk@35997 -
2017-04-28 13:46:57 +00:00
nickysn
c8487c4150 + added individual bits of the x86 flags register as subregisters
git-svn-id: trunk@35955 -
2017-04-26 13:52:52 +00:00
nickysn
5f66f5cebb + distinguish between x86 flags subregisters: flags, eflags and rflags
git-svn-id: trunk@35953 -
2017-04-25 16:10:43 +00:00
nickysn
52f41a8f67 * fixed i8086 regressions after r35082
git-svn-id: trunk@35317 -
2017-01-16 23:17:08 +00:00
florian
1e374df5b8 * correctly calculate the bit mask in thlcgobj.a_load_regconst_subsetreg_intern, resolves #31042
* convert immediates on x86 always to 32 (x86-64, i386) or 16 bit (i8086) signed values

git-svn-id: trunk@35082 -
2016-12-07 20:08:22 +00:00
florian
d0b2701693 * similiar fix for i386 as done in r34984 for x86-64
git-svn-id: trunk@35016 -
2016-11-29 20:41:33 +00:00
sergei
2861362780 * Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471.
git-svn-id: trunk@33076 -
2016-02-09 16:48:32 +00:00
Jonas Maebe
9d4c8f68d4 * fixed first_fpu_immreg definition
git-svn-id: trunk@30427 -
2015-04-04 14:29:09 +00:00
sergei
07e90aaa24 + Implemented IEEE 754-compliant checking for unordered results of floating-point compares on x86 targets. Mantis #9362.
git-svn-id: trunk@27581 -
2014-04-14 12:36:11 +00:00
nickysn
4763723c75 + support compact, large and huge memory models in x86/cpubase.segment_regs_equal()
git-svn-id: trunk@27392 -
2014-03-30 19:36:21 +00:00
nickysn
3555b76495 - rm FDISI,FENI,FSAVE,FSTCW,FSTENV and FSTSW from the requires_fwait_on_8087()
list, because these instructions already have a built in FWAIT prefix even
  when targeting the 287/387+ both with the internal asm writer and with the
  NASM back end.

git-svn-id: trunk@26178 -
2013-12-03 23:56:45 +00:00
nickysn
e9a4896565 - rm the 287/387+ FPU instructions from the requires_fwait_on_8087() list
git-svn-id: trunk@26176 -
2013-12-03 22:48:52 +00:00
nickysn
12b2f86e99 + added function requires_fwait_on_8087(), which checks whether a given
instruction needs adding a FWAIT prefix on the i8087.

git-svn-id: trunk@26106 -
2013-11-18 23:38:57 +00:00
florian
f132a804d6 + handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics
git-svn-id: trunk@25909 -
2013-11-01 19:01:39 +00:00
nickysn
58b22adaf1 + added function cpubase.segment_regs_equal, which checks whether 2 segment regs are equal in the current memory model
git-svn-id: trunk@24949 -
2013-06-23 11:27:00 +00:00
nickysn
4840a33b80 * also return true in is_calljmp() for the A_JCXZ instruction on the i8086
git-svn-id: trunk@24886 -
2013-06-12 23:42:45 +00:00
nickysn
ecb5a4866d * refactored the int64 result passing in ax:bx:cx:dx to use 4 paralocs, instead of the GetNextReg hack
git-svn-id: trunk@24527 -
2013-05-19 12:50:15 +00:00
nickysn
6b2f59c3e0 + preparations for returning int64 in ax:bx:cx:dx on i8086
git-svn-id: trunk@24498 -
2013-05-14 22:19:17 +00:00
nickysn
e2cd2813ce + stop with an internal error if GetNextReg is called with a non-imaginary register
git-svn-id: trunk@24493 -
2013-05-13 22:34:13 +00:00
nickysn
107a6f6552 * i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc
git-svn-id: branches/i8086@24232 -
2013-04-12 12:06:28 +00:00
nickysn
981f0a5c6c nested ifdefs converted to series of elseif + some other ifdefs cleaned up
git-svn-id: branches/i8086@23740 -
2013-03-09 11:25:25 +00:00
nickysn
eff0894a66 all the extra i8086 units added
git-svn-id: branches/i8086@23718 -
2013-03-08 00:04:45 +00:00
nickysn
a4b1a9011b i8086 specific stuff added to x86/cpubase.pas
git-svn-id: branches/i8086@23713 -
2013-03-07 22:49:35 +00:00
Jonas Maebe
68dd05e259 * fixed std_regname() for xmm registers with custom sizes
* fixed findreg_by_number() for xmm registers with R_SUBNONE
    (from the assembler reader)

git-svn-id: trunk@23151 -
2012-12-15 22:47:12 +00:00
masta
e327b4581c Use TRegNameTable instead of array[tregisterindex] of string[10]
TRegNameTable is defined in compiler/rgbase.pas and is an array of
strings, limited to the maximum length of the used register names.

r22792 added a long register name but did not scale the string-size
enough, resulting in the compiler built breaking for arm.

git-svn-id: trunk@22817 -
2012-10-22 10:23:21 +00:00
Jeppe Johansen
0087661fb5 Added FPv4_d16 FPU instructions, and a few extra registers
git-svn-id: branches/laksen/arm-embedded@22596 -
2012-10-08 20:04:14 +00:00
florian
283ff05127 * merged avx support in inline assembler developed by Torsten Grundke
git-svn-id: trunk@22568 -
2012-10-06 19:47:18 +00:00
florian
d93cee995b * fix register method pointer for ppc64 and x86_64-linux
git-svn-id: trunk@22351 -
2012-09-07 15:15:10 +00:00
florian
4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
git-svn-id: trunk@22181 -
2012-08-22 19:38:27 +00:00
Jonas Maebe
f79aff553e - removed duplicate RS_INVALID declaration (with moreover a different
value than in cgbase)

git-svn-id: trunk@21619 -
2012-06-15 13:48:05 +00:00
sergei
e11c880b1e x86 assembler improvements:
* Don't generate rex.w for "CALL|JMP|LCALL|LJMP regmem", they are 64-bit by default.
* LCALL,LJMP flagged as calljump instructions.
* LCALL,LJMP encode only far jumps and don't accept register operands.
* GAS writer: fixed writing rip-relative operands of calljump instructions.
+ test.

git-svn-id: trunk@19413 -
2011-10-08 11:34:04 +00:00
florian
87696a4b70 * cr*, dr*, tr* registers are 64 bit on x86-64
git-svn-id: trunk@18243 -
2011-08-17 11:42:11 +00:00
florian
58d1a66cd0 * set max_operands to 4 on x86 to be prepared for avx and to be able to fix #19910,
- memory usage of a compiler compilation increases by approx. 2 per cent due to this
  - actually docs say avx has operations with 5 parameter, however I were not able to find
    an instruction having 5 operands

git-svn-id: trunk@18202 -
2011-08-14 09:09:57 +00:00
pierre
af32b57170 * increase op2strtable size to string[15] and rectify askeygen to askeygenassist for ATT
git-svn-id: trunk@17358 -
2011-04-21 13:38:20 +00:00
Jonas Maebe
34c985cfa6 * added register type parameter to cgsize2subreg(), as the subreg can
depend on that (and correct a number of cases where this was wrong)
  * set the correct subreg type for xmm x86_64 parameter registers
    (resolved mantis #14067)

git-svn-id: trunk@13410 -
2009-07-19 13:57:23 +00:00
yury
491f0fa1d8 * Replaced all user defined warnings by TODO comments to reduce compiler noise.
git-svn-id: trunk@11443 -
2008-07-23 11:00:03 +00:00
peter
658d9fcc92 * reset subregister before writing mm register names
git-svn-id: trunk@8846 -
2007-10-18 21:52:04 +00:00
florian
08f48f5fc9 * completed jrcxz support
git-svn-id: trunk@6401 -
2007-02-10 21:14:05 +00:00