Commit Graph

28522 Commits

Author SHA1 Message Date
Pierre Muller
e749c81040 Disable limitation of nonlocal setting for LLVM compiler 2025-02-23 09:22:10 +00:00
florian
da6c0e919b + RiscV: rv32gcb 2025-02-22 21:57:52 +01:00
Pierre Muller
665b019ef3 Fix ld.lld options for i386-freebsd target 2025-02-22 14:22:16 +01:00
Pierre Muller
13a5cdb8fa Try to avoid clang error on global labels inside .cfi_start/.cfi_end pairs 2025-02-22 02:05:10 +01:00
florian
fecd25bac1 * fix typo
* properly pass zba, zbb, zbs to march
2025-02-21 22:47:44 +01:00
florian
4664e510e6 * RiscV: handle more instructions in taicpu.spilling_get_operation_type 2025-02-20 23:05:52 +01:00
florian
8e45bb133d + RV64GCB CPU type 2025-02-20 22:41:35 +01:00
florian
d842d822ff * RiscV64: make use of zext.w instruction if available 2025-02-19 22:44:03 +01:00
florian
4427392d56 * RiscV: fix AddiAddi2Addi optimization 2025-02-17 22:35:15 +01:00
Pierre Muller
389c927061 Allow to use ld64.lld if -XLL option is used 2025-02-17 15:06:52 -06:00
Karoly Balogh
0730e86c9d m68k: refactor - use the new CPUM68K_HAS_TSTAREG capability where applicable 2025-02-17 12:03:24 +01:00
Karoly Balogh
e09304f671 m68k: do not try to optimize CMP #0,Ax to TST Ax, if the CPU doesn't support it 2025-02-17 12:03:24 +01:00
Karoly Balogh
7c01edf831 m68k: new CPU capability - the TST instruction supports address registers (68020+ and CF) 2025-02-17 12:03:24 +01:00
florian
9432af9ec6 * RiscV: play safe in taicpu.spilling_get_operation_type 2025-02-16 14:46:39 +01:00
Nikolay Nikolov
39fb7618e4 * WebAssembly internal linker: refactored the writing of the memory section and
the memory import section: introduced a TWasmMemoryType record, and structures
  for holding the memory entries in the import and memory sections, instead of
  writing them in an ad hoc manner. The memory information in the linker map
  file is now also a little more detailed.
2025-02-16 03:22:20 +02:00
Nikolay Nikolov
eb38ba60c4 * fixed warning after previous commit 2025-02-16 02:19:16 +02:00
Nikolay Nikolov
c005544f3d + WebAssembly internal linker: write the global section in the linker map file 2025-02-16 02:11:52 +02:00
florian
5a07867d20 * RiscV: fixing spilling_get_operation_tpye for LI 2025-02-15 23:08:15 +01:00
Nikolay Nikolov
326356e8e9 * WebAssembly internal linker: write the memory section before the export section, so it appears in a more logical order in the map file 2025-02-15 23:34:09 +02:00
Nikolay Nikolov
ef7f2ab5a7 + WebAssembly internal linker: write the import section in the linker map file 2025-02-15 23:29:36 +02:00
florian
9a223100d1 + x86: proper flag (de)alloc in a_bit_scan 2025-02-15 22:19:05 +01:00
Nikolay Nikolov
3a714774ff + WebAssembly internal linker: write the export section to the linker map file 2025-02-15 23:18:24 +02:00
Nikolay Nikolov
847ae42cc1 + WebAssembly internal linker: write the contents of the memory section to the linker map file 2025-02-15 23:11:45 +02:00
Rika Ichinose
98ecfb1e41 Simplify SanitiseXMLString. 2025-02-15 20:44:16 +00:00
florian
d87ba06608 * improve complexity calculation for tempref nodes 2025-02-15 21:41:57 +01:00
Margers
7cb2e5a180 Browser information for generic records 2025-02-15 13:22:39 +00:00
florian
d71f823373 * cleanup 2025-02-14 20:33:33 +01:00
Nikolay Nikolov
4e3fc8290a + WebAssembly internal linker: write the indirect function table to the linker map file 2025-02-14 16:33:02 +02:00
Nikolay Nikolov
d88aad944e + WebAssembly internal linker: add the contents of the type section to the map file 2025-02-14 04:58:40 +02:00
Nikolay Nikolov
21668148d8 * WebAssembly internal linker: invoke helper code generation moved earlier,
before the relocation fixups are applied. This should make the DWARF debug
  line info correct again. Also, the offsets in the linker map file should be
  correct now, as well.
2025-02-14 00:10:37 +02:00
florian
490c431bf9 * make use of not_zero in tbasecgarm.a_bit_scan_reg_reg 2025-02-12 23:02:03 +01:00
Pierre Muller
1a07e13c02 Disable high(taitype)<=31 check for LLVM compiler 2025-02-12 02:05:08 +01:00
florian
29b3b09251 * allow absolutes on open arrays (use of this is doubtful though), resolves #41147 2025-02-11 22:45:56 +01:00
florian
99b71eafda * simplified code 2025-02-10 22:29:18 +01:00
Rika Ichinose
d1ba97d462 Make use of not_zero in x86 bitscans. 2025-02-09 21:01:43 +00:00
Nikolay Nikolov
55aa5ac129 * WebAssembly: micro optimization in the invoke helper - omit the last 'return' instruction 2025-02-09 20:12:57 +02:00
Nikolay Nikolov
8790c4303a * WebAssembly: impose a limit on the br_table instruction length, when generating the invoke helper 2025-02-09 18:36:42 +02:00
Nikolay Nikolov
f3ded5e82e * WebAssembly: optimized the number of nested blocks inside the invoke helper 2025-02-09 17:57:42 +02:00
florian
1802a8c493 + apply OptPass1Data to variable shifting/rotating operations as well 2025-02-09 15:23:24 +01:00
florian
ec76f13bd7 * node_not_zero can be apply to int->int conversion only if no data is cut off 2025-02-09 15:22:44 +01:00
florian
6cd75b75c3 * apply OptPass1Data to UDIV/SDIV as well 2025-02-09 10:41:39 +01:00
florian
09be204011 + extend node_not_zero to take range types into account
+ aarch64: if no FPC_DIVBYZERO call is needed, div nodes do not generate calls
2025-02-09 10:26:10 +01:00
florian
bcaa58db01 * extend node_not_zero and make more use of it 2025-02-09 09:42:52 +01:00
florian
9cb6497fae + function node_not_zero and make use of it 2025-02-08 20:07:20 +01:00
florian
b2f6214b33 + a_bit_scan_reg_reg gets a flag if src cannot be zero: this simplifies the generated code 2025-02-08 14:27:48 +01:00
Rika Ichinose
6631f83ccf Change CompareChar uses inside compiler/RTL to CompareByte. 2025-02-07 20:51:50 +03:00
Michaël Van Canneyt
44282acecb * Allow to process .fmx files just as .lfm/.dfm files 2025-02-07 16:12:05 +01:00
florian
125da5f10a * SubLea2Lea has to check both times for equal super registers, resolves the second part of #41126 2025-02-03 22:19:25 +01:00
florian
f75de6c340 * check for 64 bit registers in TX86AsmOptimizer.RegReadByInstruction as well for sanity reasons 2025-02-02 22:12:06 +01:00
Nikolay Nikolov
ba8554fcf5 * override tcpuparamanager.has_strict_proc_signature and return true for WebAssembly 2025-02-02 19:11:14 +02:00
Nikolay Nikolov
9a77a855e4 * WebAssembly codegen: enable -CN nil pointer checks in more places: a_cmp_const_ref_stack, a_cmp_ref_reg_stack and a_cmp_reg_ref_stack 2025-02-02 17:17:42 +02:00
Nikolay Nikolov
bd1a6a60e8 + added ref2string debug helper function to the WebAssembly code generator 2025-02-02 17:05:40 +02:00
Nikolay Nikolov
6ce57a1625 * WebAssembly: also handle dup=true in thlcgwasm.prepare_stack_for_ref for absolute address refs 2025-02-02 16:46:44 +02:00
Nikolay Nikolov
2e77e1a471 * WebAssembly codegen: fixed access to absolute variables, pointing to just a constant address, e.g. var a: longint absolute 5; 2025-02-02 16:26:42 +02:00
florian
56fa196b03 * properly read +/- for the warn directive, resolves #41105 2025-02-01 21:39:49 +01:00
florian
e17c575123 * properly write RV32E/RV64E architecture tags 2025-01-28 22:38:59 +01:00
Nikolay Nikolov
5f9ea00b38 * fixed WebAssembly code generator internal error when passing real constants as
constref parameters. Also fixes test webtbs/tw41011
2025-01-28 10:52:21 +02:00
florian
95c2a5a2d7 + RiscV: support ZMMUL extension 2025-01-26 14:43:57 +01:00
Nikolay Nikolov
522612a632 + WebAssembly internal linker: rewrite the fpc_wasm_invoke_helper function in the linker, so that it becomes functional 2025-01-25 08:22:44 +02:00
florian
bf41de879a * factor out TRVCpuAsmOptimizer.OptPass1SLTI 2025-01-22 22:58:34 +01:00
florian
cfc5f17b0d + CPURV_HAS_ZICOND 2025-01-20 22:52:23 +01:00
florian
ea9e3e02bd + RiscV: write arch attribute 2025-01-17 23:16:38 +01:00
Jinyang He
d1c3ba96f2 LoongArch: Always emit la.got for global symbol 2025-01-15 14:41:18 +08:00
Sven/Sarah Barth
599b187589 * fix #40979: don't recurse further into the nested hierarchy for code generation if the function is generic
+ added test
2025-01-14 20:38:37 +01:00
florian
5c6abd2e51 * factor out TRVCpuAsmOptimizer.OptPass1SLTx 2025-01-14 18:53:20 +01:00
florian
9355e703d7 * change some getglobaldatalabel into getlocaldatalabel to simplify code if pic is used 2025-01-13 22:34:31 +01:00
Sven/Sarah Barth
d3c3b79e79 * don't cast the succeeded node succn to a tcallparanode (it's usually a tloadnode or something similar instead) 2025-01-13 22:23:11 +01:00
Sven/Sarah Barth
1a130056f7 * reformat statement for better readability 2025-01-13 22:22:26 +01:00
Pierre Muller
c6c05f8395 Check that index value is not below lower bound in TMessage.Valid method 2025-01-13 13:17:55 +00:00
florian
f417c87ec8 * RiscV: check for cpu capabilities before using fmv for loading zero 2025-01-12 18:30:32 +01:00
florian
5bb4049737 * remove accidently committed debug statement 2025-01-12 11:32:34 +01:00
florian
dc2c6c8996 * factor out TRVCpuAsmOptimizer.OptPass1Sub 2025-01-12 11:07:29 +01:00
florian
cfee7d07d8 * cleanup 2025-01-11 23:11:41 +01:00
florian
971d97c179 + RiscV: make use of the fmv.w.x/fmv.d.x instruction to load 0.0 2025-01-11 21:03:54 +01:00
Sven/Sarah Barth
366acce9ef * fix compiling binaries on JVM: the entries list contains pinitfinalentry values, not tused_unit 2025-01-11 15:35:58 +01:00
florian
1202b2612f + RiscV: make use of the fl* rd,symbol,rd pseudoinstruction 2025-01-11 14:22:01 +01:00
florian
63845c2be6 * missing Copyright year update 2025-01-11 10:45:24 +01:00
florian
bcbf521922 * updated copyright year to 2025 2025-01-10 22:47:03 +01:00
Margers
87d4c18992 Every compile gets actual current directory (fix for Textmode IDE) 2025-01-10 18:38:22 +00:00
Pierre Muller
a9ab15c60d Fix compilation of riscv32 compiler 2025-01-10 12:10:02 +00:00
florian
c3110dfaa9 + RiscV: make use of the fneg.* instruction 2025-01-09 22:25:26 +01:00
Michaël Van Canneyt
5d100fd2c6 cpuNbitalu is not the correct type for fpc_atomic_cmp_xchg_alu on webassembly 2025-01-08 12:06:52 +01:00
florian
a370b6ff1d * set is_jmp 2025-01-07 22:51:16 +01:00
Sven/Sarah Barth
d595976f4c + add missing cpu64bit defines for consistency 2025-01-07 20:39:16 +01:00
ccrause
891e91590f Do not add abi-call0 to linker options for esp8266 2025-01-07 18:18:20 +00:00
Pierre Muller
f2f39d4aaa Avoid wrong typecast by checking explictly that hp1 is indeed an instruction 2025-01-07 14:40:13 +00:00
Michaël Van Canneyt
3f0593b554 * Better fix for atomic operations on wasm 2025-01-07 14:42:21 +01:00
florian
e082fe9752 + OptPass1FSGNJ optimization 2025-01-06 16:00:11 +01:00
florian
7aae7a8d51 + min/max optimization support for RiscV 2025-01-06 15:21:18 +01:00
florian
b5eaa8555a * apply OptPass1FOP to FMIN/FMAX as well 2025-01-06 15:21:18 +01:00
florian
2c5a070959 + random bits for quad support on RiscV 2025-01-06 15:21:18 +01:00
florian
b4d3468f68 * use HAS_MINMAX_INTRINSICS define 2025-01-06 15:21:18 +01:00
Sven/Sarah Barth
155756f668 * if an outer capturer is required then that outer capturer must not be optimized into a register (fixes compilation with -Ooregvar enabled (e.g. in -O3)) 2025-01-05 13:19:31 +01:00
Jonas Maebe
5c4db7dbca Extended RTTI: more Objective-C handling
Resolves #41034
2025-01-05 11:50:26 +01:00
florian
c8052a3f1d * cleanup merge artefacts 2025-01-05 11:07:22 +01:00
florian
72daf3f556 * RiscV64: optimize 32 bit shift instructions as well 2025-01-04 14:59:00 +01:00
Sven/Sarah Barth
50b160651c * fix #38122 in a more correct way than previously done: instead of adjusting the methodpointer node when it's a deref node adjust what value is stored in a temp if a call node is encountered: store the pointer value, not the pointed to value to avoid the reference getting lost
+ added test (note: the test fails at least on x86_64-win64 due to some different reason :/ )
2025-01-04 10:31:26 +01:00
florian
06f8ad2e3d * write " as octal number as well in assembler output, it is more compatible 2025-01-03 17:38:37 +01:00
florian
dc6057a112 * .toc sections do not need a .csect on powerpc-macosclassic 2025-01-03 17:38:36 +01:00
florian
f7264d3f29 * MacOS Classic uses apparently very similiar mechanisms for the TOC as powerpc-aix 2025-01-03 17:38:36 +01:00
florian
83f1d1eefb * write sections/section names correctly for as-macos 2025-01-02 16:06:22 +01:00
florian
8674d45d7b * better checking of valid addr_no 2025-01-02 16:06:22 +01:00
Sven/Sarah Barth
4185e1dc67 * fix typo in comment 2025-01-02 13:24:46 +01:00
Sven/Sarah Barth
ead882f58d * fix #40876: correctly check for generic constant parameters without concrete value
+ added test
2025-01-02 13:24:46 +01:00
florian
bc3b68ae7e + as-macos for using as from Retro68 2025-01-01 23:13:15 +01:00
Jonas Maebe
f3b2836947 Extended RTTI: generate RTTI for Objective-C fields like for generic pointers
Resolves #41034
2025-01-01 22:07:15 +01:00
florian
5add799193 * fix trvinlinenode.second_fma 2025-01-01 18:00:15 +01:00
Jonas Maebe
540807c5c8 WPO: don't crash on TP-style objects with only abstract virtual methods 2025-01-01 15:23:06 +01:00
Sven/Sarah Barth
2a6fb32974 * don't use $MINSTACKSIZE and $MAXSTACKSIZE on non-Windows instead of disabling the warning 2024-12-31 21:44:23 +01:00
Sven/Sarah Barth
4f5b708d49 * fix typo in comment 2024-12-31 18:32:17 +01:00
Sven/Sarah Barth
558a7ef1ed * store the current verbosity as part of the settings so that they're stored as part of a generic token stream as well 2024-12-31 18:32:17 +01:00
Sven/Sarah Barth
59be46a6fb * reset the message state only inside flushpendingswitchesstate(), not during $POP itself 2024-12-31 18:32:17 +01:00
Sven/Sarah Barth
b1791af0a3 * also (re)store the pending state when replaying a token stream 2024-12-31 18:32:17 +01:00
Sven/Sarah Barth
3ba27d3160 * ensure that current_settings.pmessage is reset when doing a replay and when loading the current message state from the token stream 2024-12-31 18:32:17 +01:00
Sven/Sarah Barth
5ec9386d27 * ensure that only the newest message state is applied 2024-12-31 18:32:17 +01:00
Sven/Sarah Barth
1388e2af5b * don't use tmessage.setverbosity() to check whether the message is valid as it should only be applied when the switches are flushed, so use the new tmessage.valid() instead 2024-12-31 18:32:17 +01:00
Sven/Sarah Barth
9a2d0e0692 + add method to TMessage to check whether a message is valid 2024-12-31 18:32:16 +01:00
Sven/Sarah Barth
f2d41e680b * when restoring the state after parsing the last token of the token buffer append the message state to the pending state so that they are reapplied at the correct time 2024-12-31 18:32:16 +01:00
Sven/Sarah Barth
c3a6df26ee * apply message state to the pending state so that they are applied at the correct moment 2024-12-31 18:32:16 +01:00
Sven/Sarah Barth
d335ce60dd * ensure that flushpendingswitchesstate had been called before the start of replaying tokens 2024-12-31 18:32:16 +01:00
Sven/Sarah Barth
7fe7e26659 * use dispose() instead of freemem() for consistency with the allocation of pmessagestaterecord 2024-12-31 18:32:16 +01:00
Margers
93d855b2ca Remove one of two CPULLVM define macro 2024-12-30 21:25:43 +00:00
Margers
f7cbed1a72 def_system_macro -> undef_system_macro (fix oversight as if then block is equal to else block) 2024-12-30 21:23:30 +00:00
florian
40f9d006d6 * write basic attributes for riscvXX-linux 2024-12-30 15:56:24 +01:00
florian
a16f2ae35d * tai_eabi_attribute -> tai_attribute so it can be used by other architectures 2024-12-30 15:56:24 +01:00
florian
e30ca27914 * RiscV: write also nopic directive 2024-12-29 18:38:27 +01:00
Sven/Sarah Barth
de8d54cfef * reset oo_is_forward object option for external classes after parsing the parent classes 2024-12-29 17:38:30 +01:00
florian
64e87c87bc * apply OptPass1OP to SLT/SLTU as well 2024-12-28 23:38:22 +01:00
Sven/Sarah Barth
3b7d9956ca * fix #40653: don't allow the use of a class during its declaration as parent for a nested class (Delphi compatible)
+ added test
2024-12-27 16:32:06 +01:00
Sven/Sarah Barth
dedc018beb * when parsing generic parameter types allow the use of generics that are part of the current specialization stack (this can be the case if a generic is used inside itself as a type parameter for a specialization)
+ added tests
2024-12-27 16:32:06 +01:00
Sven/Sarah Barth
9b63123bf0 + add utility function to check whether a generic belongs to the currently parsed generic even if it's further up in the specialization stack 2024-12-27 16:32:06 +01:00
Sven/Sarah Barth
8f81b213dc * keep track of the current generic def in the specialization state 2024-12-27 16:32:06 +01:00
Sven/Sarah Barth
db83f9c696 * keep track of the current specialization state of the current module 2024-12-27 16:32:06 +01:00
Sven/Sarah Barth
79ff74ac44 * fix #41007: only unlink typesyms from their typedefs when releasing an unused implicit specialization if the typesym was created for the implicit specialization
+ added test
2024-12-26 18:08:09 +01:00
Sven/Sarah Barth
32b3477fe2 * fix #41063: don't add classrefdefs or objectdefs to the WPOInfo if they are declared locally (e.g. capturer instances)
+ added test
2024-12-26 18:08:09 +01:00
florian
b7608b045b * RiscV: push_addr_param unified 2024-12-26 16:49:43 +01:00
Sven/Sarah Barth
9de0025394 * fix #41074: adjust conversion level of class/interface to pointer and class to interface conversions so that sub class to class conversions take precedence
+ added tests
2024-12-26 15:03:14 +01:00
Sven/Sarah Barth
310afcd783 * fix #41075: don't allow @<anonfunc>
+ added tests
2024-12-26 12:48:44 +01:00
florian
9ba3b12eaa * RiscV: unify push_addr_param 2024-12-25 23:33:11 +01:00
florian
b4a83e29a4 * fixes RiscV32 building 2024-12-25 22:48:40 +01:00
Sven/Sarah Barth
aa0ccd8b59 * fix #41072: proc_to_procvar_equal_internal() might be passed a procvar in case of "procvar := @<anon func>", reject that as incompatible
+ added test
2024-12-25 22:30:30 +01:00
florian
065a81b72c + apply OptPass1OP to LA as well 2024-12-25 18:35:46 +01:00
florian
64ba751ef1 * make use of LA pseudo-instruction 2024-12-25 18:35:46 +01:00
florian
57da25581e + write .option pic directive if needed 2024-12-25 18:35:46 +01:00
florian
8d0bdf2f16 + RiscV: vector registers 2024-12-25 10:34:46 +01:00
florian
af233b8ef8 * RiscV: floating point registers are saved only for hard float ABIs 2024-12-25 10:16:39 +01:00
florian
2da48488d7 * RiscV: emit an error if fpu_fd is used on a cpu without f and d extensions 2024-12-24 16:38:31 +01:00
florian
0c749505ef * fpu type must be fpu_soft if the cpu is rv32ima 2024-12-24 16:38:31 +01:00
florian
553a1b968d * formatting
+ test for issue #41066 which was already resolved previously
2024-12-23 16:11:03 +01:00
florian
d147488133 * partly revert 8cd6606970, resolves #41052
(cherry picked from commit 854d4e6f4a5b53040160f8921d0089167f6b00be)
2024-12-23 14:27:48 +01:00