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261 Commits

Author SHA1 Message Date
Károly Balogh
5acd04d284 m68k: some experimental code for the unaligned access support on plain 68000. work in progress, inactive code for now 
git-svn-id: trunk@33744 -
 2016-05-22 00:32:41 +00:00
Károly Balogh
786aecabeb m68k: improved a_op_reg_ref, to support more operations. implemented a_op_ref_reg 
git-svn-id: trunk@33739 -
 2016-05-21 16:41:13 +00:00
Károly Balogh
3b4822d320 m68k: utilize MVS and MVZ instructions to load values from references with zero/sign extend when they're available 
git-svn-id: trunk@33656 -
 2016-05-05 23:55:50 +00:00
Károly Balogh
2e9ed396b4 m68k: convert non-int paraloc sizes to int in a_load_ref_cgpara, fixes build breaks with softfpu since r33651 
git-svn-id: trunk@33653 -
 2016-05-05 02:33:54 +00:00
Károly Balogh
1e6e5a1874 m68k: implemented a_load64_reg_ref and a_load64_ref_reg. avoids duplicated reference simplifications in the generated code during 64bit load/store 
git-svn-id: trunk@33652 -
 2016-05-05 00:58:21 +00:00
Károly Balogh
2b250a1b0a m68k: use a_load_ref_ref in a_load_ref_cgpara instead of a custom loading code which does the same. causes no changes in generated code 
git-svn-id: trunk@33651 -
 2016-05-05 00:55:52 +00:00
Károly Balogh
88e14dc456 m68k: only extend the dest reg to tosize during reg-reg moves. this removes a large amount of unnecessary sign and zero extensions from the generated code. this was attempted before, but thanks to other fixes it no longer causes testsuite regressions 
git-svn-id: trunk@33648 -
 2016-05-04 09:52:27 +00:00
Károly Balogh
92b2cf917d m68k: when saving/restoring FPU registers, use the right FPU register size on ColdFire to calculate the stored size 
git-svn-id: trunk@33614 -
 2016-05-02 14:18:30 +00:00
Károly Balogh
aa8b45904e m68k: use the existing g_call infrastructur to handle the register allocation in the helpers 
git-svn-id: trunk@33589 -
 2016-05-01 10:42:52 +00:00
Károly Balogh
0b7464e4cd m68k: fix large const loading to address registers 
git-svn-id: trunk@33588 -
 2016-05-01 10:41:40 +00:00
Károly Balogh
f48747adf5 m68k: reworked cg.g_concatcopy. generates shorter and faster code in most cases now. 
git-svn-id: trunk@33575 -
 2016-04-30 00:15:34 +00:00
Károly Balogh
4287f81b92 m68k: support and use float TResFlags in the rest of the CG. ColdFire FPU now works, and FSxx is no longer generated which is software supported on '060, and doesn't exist on CF. if we still want to support it later, we can add it to cg.g_flags2reg 
git-svn-id: trunk@33558 -
 2016-04-25 23:40:44 +00:00
Károly Balogh
9d2dad2463 m68k: added cpu type cfv4e, which is the only ColdFire with FPU, and GNU AS needs this to actually allow CF FPU code 
git-svn-id: trunk@33556 -
 2016-04-25 22:04:05 +00:00
Károly Balogh
bd564b8933 m68k: some code to support the ColdFire v4e FPU. not functional yet. 
git-svn-id: trunk@33533 -
 2016-04-18 03:25:32 +00:00
Károly Balogh
4e964c2ed7 m68k: rewrote fixref and a_load_ref_ref, fixing a bunch of problems on ColdFire, unifying and simplifying the code a lot, and hopefully not killing anything in the process 
git-svn-id: trunk@33446 -
 2016-04-08 03:27:19 +00:00
Károly Balogh
1e0763e251 m68k: use a_load_const_ref in a_load_const_cgpara to utilize the recently added optimized small const loading here too. this change alone shaves off ~80KB from the compiled FP IDE size... 
git-svn-id: trunk@32841 -
 2016-01-03 23:48:06 +00:00
Károly Balogh
185ee93312 m68k: if we're loading small (8 bit signed) values into long references, move them through a register (usually with MOVEQ). this is two bytes shorter and also faster on most 68k CPUs 
git-svn-id: trunk@32837 -
 2016-01-03 18:32:27 +00:00
Károly Balogh
c82328e3fd m68k: implemented tcg68k.check_register_size for future use. use R_SUBNONE for FPU registers, because R_SUBWHOLE will change. use isregoverlap in a_load_reg_reg 
git-svn-id: trunk@32658 -
 2015-12-13 19:18:39 +00:00
Károly Balogh
3c0dca44d3 m68k: fixed a copypaste fail in tcg68k.g_restore_registers, which affected FPU register restoring 
git-svn-id: trunk@32651 -
 2015-12-13 13:15:51 +00:00
Jonas Maebe
61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm) 
git-svn-id: trunk@30429 -
 2015-04-04 14:29:16 +00:00
Jonas Maebe
201121d7c9 * synchronised with trunk till r30345 
git-svn-id: branches/hlcgllvm@30349 -
 2015-03-28 12:28:15 +00:00
Károly Balogh
b617345e43 m68k: disabled premature MOVEA #0,Ax to SUBA Ax,Ax in the CG, because it breaks with spilling temp replacement and moved it to the optimizer, where it belongs. this fixes some code with potentially heavy address register pressure, like the IDE. 
git-svn-id: trunk@30245 -
 2015-03-16 02:04:58 +00:00
Jonas Maebe
bd203a5b57 * synchronised with trunk till r30240 
git-svn-id: branches/hlcgllvm@30241 -
 2015-03-15 19:44:58 +00:00
Károly Balogh
2555f12394 m68k: improved handling of moves and sign/zero extensions targeting address regs 
git-svn-id: trunk@30232 -
 2015-03-15 01:44:43 +00:00
Károly Balogh
935820293c m68k: in tm68ktypeconvnode.int_to_real, fix the reference before using it, and if the source is a register, make sure it's a data register 
git-svn-id: trunk@30190 -
 2015-03-14 17:14:10 +00:00
Károly Balogh
1121c2e6ce m68k: before doing a reg->ref operation, make sure the source is a datareg 
git-svn-id: trunk@30189 -
 2015-03-14 16:36:02 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095 
git-svn-id: branches/hlcgllvm@30101 -
 2015-03-05 20:32:15 +00:00
Károly Balogh
106056f462 m68k: more FMOVEM.X store/load size fixes 
git-svn-id: trunk@30062 -
 2015-03-02 02:55:23 +00:00
Károly Balogh
acaf382ea0 m68k: FMOVEM.X stores/loads each reg as 12 bytes (96 bits) not 10 bytes (80 bits), see 68k PRM, page 5-86 
git-svn-id: trunk@30061 -
 2015-03-02 02:48:35 +00:00
Károly Balogh
a526b0e5d6 m68k: implemented some missing bits of FPU cgpara handling, functions with float arguments seem to work much better now 
git-svn-id: trunk@29650 -
 2015-02-08 10:26:47 +00:00
Károly Balogh
06dfa4d30c m68k: also alloc FPU registers during RTL helper calls 
git-svn-id: trunk@29646 -
 2015-02-07 23:31:46 +00:00
Károly Balogh
a99c9c29b6 m68k: basic 68881 FPU register save/restore support. probably still needs some work here and there. 
git-svn-id: trunk@29644 -
 2015-02-07 22:13:07 +00:00
Károly Balogh
7a91d5f495 m68k: oops, unbroke the build with softfpu 
git-svn-id: trunk@29372 -
 2015-01-02 16:00:53 +00:00
Károly Balogh
d000b1bc7c m68k: basic 68881 fpu support. probably still broken at umpzillion places, and mostly untested, but at least it builds the RTL and all packages successfully with -Cp68020 -Cf68881 instead of dying with random internalerrors() and now even emits actual FPU opcodes. 
git-svn-id: trunk@29370 -
 2015-01-02 05:29:45 +00:00
Károly Balogh
3b205742b6 m68k: also try to optimize a special case of OP_SAR using the SWAP instruction 
git-svn-id: trunk@28657 -
 2014-09-14 12:47:07 +00:00
Károly Balogh
d561e8ab57 m68k: generate smarter shifting/rotation code on 68k, for example by utilizing the SWAP instruction 
git-svn-id: trunk@28617 -
 2014-09-07 23:46:46 +00:00
Károly Balogh
9991ee4165 m68k: support loading of refs to data registers, also when explicit paraloc is set and it's a register, use that directly, this fixes several syscall-related corner cases on Amiga 
git-svn-id: trunk@28582 -
 2014-09-02 17:38:34 +00:00
sergei
a5958d6e5f * m68k: do not emit moves between same register, they end up in wrong code in some cases when register needs to be spilled (and entirely useless otherwise). 
git-svn-id: trunk@28545 -
 2014-08-30 22:00:54 +00:00
Károly Balogh
392da9e43f * fix warnings when compiling the compiler with DFA optimizer enabled on m68k 
git-svn-id: trunk@28499 -
 2014-08-20 13:49:47 +00:00
Jonas Maebe
b18ba8e85b * syncrhonised with trunk up till r28471 
git-svn-id: branches/hlcgllvm@28495 -
 2014-08-19 20:23:11 +00:00
Jonas Maebe
b745dcc64c * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because 
for some platforms it depends on that routine

git-svn-id: branches/hlcgllvm@28492 -
 2014-08-19 20:22:54 +00:00
Károly Balogh
9b0bf91076 m68k: do not generate CLR instructions to memory references on plain 68k. there this instruction also causes reads from the address, which is slow and can have side effects. 
git-svn-id: trunk@28422 -
 2014-08-16 13:03:03 +00:00
sergei
a28d6a84a7 + m68k, a_load_const_reg: use MOV3Q if applicable for data registers as well, since it allows spilling replacement of destination. 
+ a_load_const_ref: use CLR and MOV3Q if possible.
* a_cmp_reg_reg_label: force size to 32 bits for ISA_A and ISA_A+ targets.
+ support for stack frames larger than 32767 bytes.

git-svn-id: trunk@28298 -
 2014-08-02 12:46:34 +00:00
sergei
a42ecadddf + m68k: implemented overflow checking (does not work for multiplication yet). 
+ support references as source operands for 64-bit AND and OR operations.

git-svn-id: trunk@28275 -
 2014-07-30 01:46:25 +00:00
sergei
dac52f503c * m68k: fixed extension in a_load_ref_reg. Existing code cleans only bits 16-31 when loading a 8-bit register from 16-bit reference, and leaves garbage in bits 8-15. 
git-svn-id: trunk@28256 -
 2014-07-24 12:17:29 +00:00
sergei
b7da785688 * m68k: support stack cleanup at caller side, fixed calculation of pushed parameters size and offsets and cleaned out another pile of junk. 
* Parameter offsets are now calculated similar to other targets, target_info,first_parm_offset is applied only to callee side, while at caller side offsets start from 0.
* For cdecl procedures, parameters are removed by caller, for the rest it's still done by callee (resembles i386 target, except there is no 'register' calling convention).

git-svn-id: trunk@28185 -
 2014-07-08 19:08:56 +00:00
sergei
df60309d96 * m68k: fixed the last remaining warning and removed "$WARNINGS OFF" directive. 
git-svn-id: trunk@28176 -
 2014-07-06 11:36:33 +00:00
sergei
b91d965096 * m68k: initial support for ROL/ROR operations, defining 'cpurox' for CPU target can actually enable them. However it cannot be done outright because these instructions do not exits on Coldfire, and internal processing of RoX,Sar,BsX, etc. can not yet be switched depending on CPU subtype. 
git-svn-id: trunk@28101 -
 2014-06-29 17:49:30 +00:00
sergei
535218e837 * m68k: fixed OP_NOT/OP_NEG with two registers, it must never modify the source register. 
git-svn-id: trunk@28097 -
 2014-06-28 05:22:03 +00:00
sergei
4df49964ca * tcg68k.a_op_reg_reg: renamed parameters 'reg1' and 'reg2' to 'src' and 'dst' to make it clear what's what. 
* tcg68k.fixref method made public.

git-svn-id: trunk@28095 -
 2014-06-28 05:09:34 +00:00
sergei
3851c1f494 - m68k: removed a_loadmm_* methods, no need to override because they produce internal error already in base class. 
git-svn-id: trunk@28086 -
 2014-06-27 12:15:00 +00:00
sergei
acd3ea8750 * m68k: Fixed parameter passing to conform to ABI: 
* records are passed by value
  * records with size of 1,2 or 4 are returned in registers
  * parameters with size<4 are justified on the stack according to big-endian target

Now everything except floating-point parameters is compatible with C code compiled with "-malign-int -mrtd".
Compatibility with "-mno-align-int" is achievable by changing target_info.maxCrecordalign to 2, but doings so causes a lot more troubles because RTL (incorrectly) assumes that records declared with {$PACKRECORDS C} are aligned to pointer size.

+ Reuse parameter locations. Since everything is passed on stack, it reduces code size quite a bit.
- tm68kparamanager.getintparaloc removed, generic implementation has been tested and works as expected.

git-svn-id: trunk@28083 -
 2014-06-27 06:58:39 +00:00
Károly Balogh
5276de5627 m68k: restored orglen variable to g_concatcopy which was actually used, but still got removed in r28072 
git-svn-id: trunk@28080 -
 2014-06-26 19:46:57 +00:00
Károly Balogh
3028f3ac78 m68k: disabled PEA debug comment accidentally left in 
git-svn-id: trunk@28077 -
 2014-06-26 16:50:42 +00:00
Károly Balogh
d93e7b3367 m68k: cleaned ancient silly debug mess from a_loadaddr_ref_reg. no functional changes. 
git-svn-id: trunk@28076 -
 2014-06-26 16:47:55 +00:00
Károly Balogh
1388cb9bae m68k: implemented a proper a_loadaddr_ref_cgpara instead of the disabled mess in the source, utilizing the PEA instruction 
git-svn-id: trunk@28075 -
 2014-06-26 16:39:17 +00:00
sergei
4c3eb391ef * m68k: cleaned out unused variables in cgcpu.pas 
* Fixed reference strength in a_call_reg.

git-svn-id: trunk@28072 -
 2014-06-26 08:27:38 +00:00
sergei
ad59098457 + m68k: initial implementation of g_stackpointer_alloc method, it has to exist for targets with non-fixed stack. 
git-svn-id: trunk@28064 -
 2014-06-25 17:43:37 +00:00
Károly Balogh
531ac093ed m68k: implemented a simple a_cmp_const_ref_label. uses TST instruction to test ref contents against zero 
git-svn-id: trunk@28053 -
 2014-06-25 06:56:58 +00:00
Károly Balogh
519094055c m68k: cleaned up and fixed cgcpu/fixref for coldfire at least; also enabled n68kmem node, so addressing with scaling is generated now 
git-svn-id: trunk@28025 -
 2014-06-21 21:36:48 +00:00
Károly Balogh
0045f34322 tabs to spaces and indentation fix, no functional changes 
git-svn-id: trunk@27950 -
 2014-06-14 09:09:53 +00:00
Károly Balogh
7963351440 m68k: removed comment generation line accidentally left in from the previous commit 
git-svn-id: trunk@27936 -
 2014-06-11 22:42:26 +00:00
Károly Balogh
ed3ce4087a m68k: try to generate a bit smaller code in g_adjust_self; also changed two JMPs to S_NO from S_L, because JMP is unsized anyway 
git-svn-id: trunk@27935 -
 2014-06-11 22:33:09 +00:00
Károly Balogh
1b11541c90 m68k: simplification and cleanup of g_proc_entry. the generated code shouldn't change 
git-svn-id: trunk@27922 -
 2014-06-10 09:15:26 +00:00
Károly Balogh
17657ca11d m68k: more minor reference usage tweaking, hopefully fixes Mantis 26286 
git-svn-id: trunk@27880 -
 2014-06-06 16:41:40 +00:00
Károly Balogh
381cf72023 m68k: minor bits, addq/subq works also on address regs, remove reference validity check in a_op_const_ref because we have fixref() later anyway 
git-svn-id: trunk@27876 -
 2014-06-06 15:15:03 +00:00
Károly Balogh
0fe656e82d m68k: simplified code generated by g_concatcopy and cleaned up the old mess from the code 
git-svn-id: trunk@27859 -
 2014-06-05 12:42:36 +00:00
Károly Balogh
f3bbad26c3 m68k: use MOVEA without size to load values to address regs. use a_op_const_reg in a_op_const_ref for smarter const loading when necessary 
git-svn-id: trunk@27828 -
 2014-05-30 05:29:22 +00:00
Károly Balogh
28323135f8 m68k: minor optimizations to g_proc_exit() - use LEA for stackpointer math which is better than ADDing large constants, also only modify the SP reg once 
git-svn-id: trunk@27817 -
 2014-05-25 01:34:00 +00:00
Károly Balogh
3b9e2a620b added a remark about a possible QEMU issue with CMP/CMPI .W and .B on ColdFire 
git-svn-id: trunk@27291 -
 2014-03-26 17:08:16 +00:00
Károly Balogh
1af6d17b4d don't enforce BPL length, use SUBQ in g_concatcopy 
git-svn-id: trunk@27290 -
 2014-03-26 15:43:25 +00:00
Károly Balogh
9ae38cdc1c back to more conservative sign extension. this really needs separate handling for ColdFire and normal 68k, because the CF executes 32bit arithmetics only while normal 68k will do any size happily. 
git-svn-id: trunk@27289 -
 2014-03-26 15:02:50 +00:00
Károly Balogh
bca09a8f69 reverted parts of r27117 because it caused regressions 
git-svn-id: trunk@27118 -
 2014-03-12 19:22:04 +00:00
Károly Balogh
c7d1cef334 support sign/zero extension to subreg sizes, not just always to 32bit 
git-svn-id: trunk@27117 -
 2014-03-12 18:27:50 +00:00
Károly Balogh
552ab2938e avoid some unnecessary sign extensions 
git-svn-id: trunk@27111 -
 2014-03-12 04:16:52 +00:00
Károly Balogh
3a464dbdcf don't swap the base and index registers if we have a scalefactor 
git-svn-id: trunk@27109 -
 2014-03-12 02:34:30 +00:00
Károly Balogh
7b05113322 addressing improvements: fixref can swap base/index registers if better fits 68k pattern, less need to move around registers. also fix reference in a_op_const_ref. 
git-svn-id: trunk@27108 -
 2014-03-12 01:32:44 +00:00
Károly Balogh
13210ff7d4 use MVZ/MVS ColdFire instructions to load constants where applicable 
git-svn-id: trunk@26935 -
 2014-03-03 00:53:52 +00:00
Károly Balogh
1d5f74fae0 m68k implementation of g_save_registers and g_restore_registers using movem.l 
git-svn-id: trunk@26923 -
 2014-03-02 14:58:05 +00:00
Károly Balogh
8730b1bf45 cleaned up g_proc_exit, optimized generated code and also added some comments about possible ABI variations. the changes also fix two tests on my system related to cdecl procedures 
git-svn-id: trunk@26918 -
 2014-03-01 23:52:00 +00:00
Károly Balogh
bd4cc3b8f3 cleaned up, reindented, simplified and allowed some minor optimizations in tcg64f68k 
git-svn-id: trunk@26914 -
 2014-03-01 18:25:05 +00:00
Károly Balogh
74533a7c90 avoid generating addressing like <label>+8(aX), since this might fail during linking if label is more than 32k away, fixes linking with lineinfo unit here 
git-svn-id: trunk@26826 -
 2014-02-22 02:12:03 +00:00
Károly Balogh
667ec17cae tiny optimization for clearing address regs 
git-svn-id: trunk@26569 -
 2014-01-23 02:29:45 +00:00
Károly Balogh
047395df5f implemented add/sub ops in a_op_reg_ref, since these are used often. also fixed up reference handling in a_op_const_ref a bit 
git-svn-id: trunk@26568 -
 2014-01-23 02:07:24 +00:00
Károly Balogh
cd4bb364e5 reenabled and fixed up tcg68k.op_const_ref a bit 
git-svn-id: trunk@26567 -
 2014-01-22 23:15:01 +00:00
nickysn
85dd9e5789 + added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1) 
git-svn-id: trunk@26561 -
 2014-01-22 15:00:34 +00:00
Károly Balogh
b37ebeaabd disabled a_loadaddr_ref_cgpara() for m68k, this code was copy-pasted from x86 probably and could never work properly as it is 
git-svn-id: trunk@26462 -
 2014-01-15 01:27:02 +00:00
Károly Balogh
74af6d0dab enabled hardware mul reg, reg codepath for ColdFire too, accelerates tfloattostr test (thus some of the SoftFPU code) by a magnitude... 
git-svn-id: trunk@25770 -
 2013-10-13 21:36:24 +00:00
Károly Balogh
e5eac1bd44 make the array of registers to use depending on wheter we have an FP or not, and which register we have as FP 
git-svn-id: trunk@25758 -
 2013-10-13 16:06:35 +00:00
svenbarth
6fef9a2c80 Correctly implement g_intf_wrapper. Fixes nearly 200 tests and now the cross compiled compiler is at least able to print the help (compiling a simple program does not work yet though). 
m68k/cgcpu.pas, tcg68k:
  + override g_adjust_self_value as we don't do register allocation for the wrapper we need to adjust the Self value using the scratch registers (could be improved however) and we also can not use the offset that the original procedure in tcg uses
  * fix g_intf_wrapper by using the correct operations and loading the correct (virtual) method offset

git-svn-id: trunk@25728 -
 2013-10-09 19:56:17 +00:00
svenbarth
a4683461cf Fix around 25 tests (under them all tcalval* tests!) by indeed using the save/restore registers code I adjusted earlier. 
m68k/cgcpu.pas, tcg68k:
  - remove g_save_registers and g_restore_registers which DID NOT CALL inherited!
  - also remove commented methods g_save_all_registers & g_restore_all_registers

git-svn-id: trunk@25715 -
 2013-10-07 19:36:21 +00:00
Károly Balogh
1f11c39a5d * huge m68k/cgcpu.pas cleanup and improvement commit 
- removed the ancient DEBUG_CHARLIE silliness... :)
- moved some repeated code patterns into separate functions
- rewrote most of of tcg68k.a_op_const_reg and tcg68k.a_op_reg_reg
- smarter code generation in tcg68k.a_cmp_const_reg_label
- added support for MULU/MULS on Coldfire in a case which is often used by the CG to index arrays to be used instead of the RTL helpers, this results in a *HUGE* speedup in tw5086 for example

git-svn-id: trunk@25702 -
 2013-10-06 22:16:37 +00:00
svenbarth
b1d79494dd Fix around 30 tests by using a volatile register for restoring the stack pointer 
m68k/cgcpu.pas, tcg68k.g_proc_exit:
  * use A0 (which is a volatile register) instead of A3 (which is not) to restore the stack pointer

git-svn-id: trunk@25663 -
 2013-10-05 21:32:27 +00:00
svenbarth
20587d8547 And another place where I forgot to (de)allocate address registers... 
m68k/cgcpu.pas, tcg68k.call_rtl_mul_const_reg & tcg68k.call_rtl_mul_reg_reg:
  * (de)allocate address registers

git-svn-id: trunk@25654 -
 2013-10-05 17:53:06 +00:00
svenbarth
29ff548c0b Revert some additions of add_move_instruction as this heavily breaks code when the frame pointer is involved 
git-svn-id: trunk@25632 -
 2013-10-03 18:58:38 +00:00
svenbarth
dd204f395d m68k: add a few more add_move_instruction to tcg68k 
git-svn-id: trunk@25631 -
 2013-10-03 14:36:08 +00:00
svenbarth
03623c6c1a Forgot to commit that I moved tcgsize2opsize from cgcpu to cpubase. 
git-svn-id: trunk@25630 -
 2013-10-03 14:34:54 +00:00
svenbarth
0cb2bda0a5 Correctly handle loads of different sizes. Fixes 1 test. Might be more, but some other bugs might hide it. 
m68k/cgcpu.pas, tcg68k:
  * a_load_ref_cgpara: use pashsize instead of paraloc^.size as the latter could be OS_NO and thus a "move" instead of a "move.x" will be generated resulting in a word move when a long or byte move might have been necessary
  * a_load_reg_ref: use the smallest size when moving the value to a reference
  * a_load_ref_ref: when the size is different always use a temporary register for a ref to ref move
  * a_load_ref_ref: when doing a fixed move for Coldfire use the correct ref (that's another embarrasing error...) and size (fixes usage of String[Index] for a const array parameter)
  * a_load_ref_reg: use the smallest size when moving the value from a reference
  * g_concatcopy: don't use source.alignment as that doesn't contain the correct value and also load the value into the temp register using the correct size (fixes passing of small values as parameters, like chars)

git-svn-id: trunk@25624 -
 2013-10-02 20:14:16 +00:00
Károly Balogh
31e7b790a7 a_load_const_reg: don't sign_extend after MOVEQ, it's not needed. also use CRL.L before loading to reg instead of sign_extend when possible 
git-svn-id: trunk@25615 -
 2013-10-02 01:19:44 +00:00
svenbarth
2c93687c5a Fix an embarrasing error in m68k which fixes 60 tests. 
m68k/cgcpu.pas, tcg68k.g_flags2reg:
  * don't sign extend the flag value which was stored to the register, but instead do a "AND 1" on it to reduce it to 1 bit; afterall Booleans in Pascal are either 0 or 1 and not 0 or $FF

+ added test

git-svn-id: trunk@25598 -
 2013-09-28 20:07:57 +00:00