Commit Graph

1240 Commits

Author SHA1 Message Date
florian
dda9f83dfe * factored out tbasecgarm.init_mmregister_allocator
git-svn-id: trunk@48671 -
2021-02-13 22:16:59 +00:00
florian
87e1dc159d * do not mess with FPA registers if they are not available
git-svn-id: trunk@48669 -
2021-02-13 17:04:03 +00:00
florian
7f1aac8bd7 - armv5 never existed (without extension), removed
git-svn-id: trunk@48652 -
2021-02-11 21:27:12 +00:00
florian
3b49e95415 * do not initialize unncessary register allocators
git-svn-id: trunk@48628 -
2021-02-10 19:52:52 +00:00
yury
9b1567f054 * Corrected method's visibility.
git-svn-id: trunk@48393 -
2021-01-24 14:06:35 +00:00
yury
64c586b86d * Removed/ifdefed lots of unused variables.
git-svn-id: trunk@48384 -
2021-01-24 12:24:01 +00:00
pierre
19d5e43615 Avoid internalerror in RemoveCurrentP for arm compiler
git-svn-id: trunk@47690 -
2020-12-05 21:23:09 +00:00
florian
1014e53081 * patch by J. Gareth Moreton: fixes crash on ARM with -CriotR, resolves #38116
git-svn-id: trunk@47531 -
2020-11-22 19:47:34 +00:00
pierre
3d374727dd Move explicit typecast to after check to avoid RTE when compiled with -CR
git-svn-id: trunk@47367 -
2020-11-09 21:19:40 +00:00
pierre
e50a388f30 Change CLZ support for arm32 minimal CPU to armv5t according to ARM documentation in arminst.dat
git-svn-id: trunk@47207 -
2020-10-26 13:40:45 +00:00
pierre
3f19bd693f + Add new LastCommonAsmOp constant to arm and aarch64 CPU targets.
* Uses this new constant to define TCommonAsmOps set type.
  + Use this constant in armgen/aoptarm MatchInstruction function,
    to avoid a range check error when compiling with -CriotR with optimization.

git-svn-id: trunk@47137 -
2020-10-19 09:19:25 +00:00
florian
637976e83f * patch by Marģers to unify internal error numbers, resolves #37888
git-svn-id: trunk@47103 -
2020-10-13 19:59:01 +00:00
florian
eec51afadd * patch (with little modification) by J. Gareth Moreton: refactor ARM/Aarch64 peephole optimizer, first part of #37526
git-svn-id: trunk@46975 -
2020-09-27 21:05:42 +00:00
florian
28f25b2df0 * reworked usage of tcgnotnode.handle_locjump
git-svn-id: trunk@46275 -
2020-08-05 21:15:32 +00:00
Jonas Maebe
eb7ba1690e * mark all external assemblers using an LLVM tool using af_llvm
+ added support for constructing target triplets
  * pass "-target triplet" when using an LLVM assembler
   o removed no longer needed $DARWINVERSION and $ARCH parameters
  * consistently use as_clang_gas when clang is used to assembler GAS-style
    assembly, and rename as_llcm_clang to as_clang_llvm (for consistency)
  * support pipe assembling when using clang on *nix in all cases

git-svn-id: trunk@45807 -
2020-07-19 14:30:35 +00:00
florian
db250b04e0 * generate soft float code for arm vfp units which have no double operation support
git-svn-id: trunk@45799 -
2020-07-17 16:45:52 +00:00
pierre
bb6d4929d8 * Handle R_SUBMMWHOLE in reg_cgsize for R_MMREGISTER type
* Disable range and overflow checking inside is_continuous_mask function.

git-svn-id: trunk@45798 -
2020-07-17 15:27:27 +00:00
pierre
53eca29309 Also issue -mfpu option when calling GNU assembler for fpu_fpa family
git-svn-id: trunk@45788 -
2020-07-15 09:01:10 +00:00
Jonas Maebe
e7d1a77f9a * rename the ARM/AArch64-Darwin targets to ARM/AArch64-iOS
* rename the m68k/PowerPC-MacOS targets to m68k/PowerPC-MacOSClassic
  * repurpose the AArch64/Darwin target for AArch64/macOS
   o make AArch64-Darwin default target for a hosted AArch64-Darwin compiler

git-svn-id: trunk@45758 -
2020-07-10 21:52:24 +00:00
pierre
39f3a72c62 tarmunaryminusnode.pass_1 must call inherited method for system_arm_wince
git-svn-id: trunk@45755 -
2020-07-10 09:43:15 +00:00
pierre
96ac7f29f7 Only try to use softfpu functions when fputype is fpu_soft
git-svn-id: trunk@45751 -
2020-07-09 22:51:42 +00:00
pierre
cb41b22fdc Try to fix tarmunaryminusnode.pass_1
git-svn-id: trunk@45750 -
2020-07-09 22:50:34 +00:00
florian
c5d7e6807c * ARM: factor out TARMAsmOptimizer.OptPass1And
git-svn-id: trunk@45536 -
2020-05-30 20:44:19 +00:00
florian
0acae47310 * ARM: get rid of more unneeded sxtb/h uxtb/h instructions
git-svn-id: trunk@45529 -
2020-05-29 20:51:04 +00:00
florian
651f5cb8a1 * ARM: (V)LDM do not load from the registers in the reg. set
git-svn-id: trunk@45525 -
2020-05-28 21:37:05 +00:00
pierre
f2b924573a Do not use inherited first_int_to_real when arm FPU_HAS_FPA is in fpu_capabilities
git-svn-id: trunk@45267 -
2020-05-05 12:25:18 +00:00
nickysn
29d681168a * merged the z80 branch
git-svn-id: trunk@45143 -
2020-04-27 20:07:54 +00:00
florian
a084c8829f * patch by J. Gareth Moreton: refactor RemoveCurrentP
git-svn-id: trunk@45142 -
2020-04-27 19:27:16 +00:00
nickysn
a8fe46c0f5 + introduced labelmaxlen in tasminfo and added code in ReplaceForbiddenAsmSymbolChars that limits the
output label to that length

git-svn-id: branches/z80@45066 -
2020-04-25 12:59:25 +00:00
florian
8ac8c79a71 + initial support for arm-freertos largely based on patch by Michael Ring
git-svn-id: trunk@44871 -
2020-04-19 20:59:52 +00:00
florian
099faf2d2b * factored out and improved TARMAsmOptimizer.RedundantMovProcess
+ AArch64: use TARMAsmOptimizer.RedundantMovProcess

git-svn-id: trunk@44799 -
2020-04-18 21:48:25 +00:00
florian
9176efbab4 * factored out TARMAsmOptimizer.OptPass1SXTH
* AArch64: use TARMAsmOptimizer.OptPass1SXTH

git-svn-id: trunk@44739 -
2020-04-16 21:19:14 +00:00
florian
19a9d4c4ac * factored out TARMAsmOptimizer.OptPass1SXTB
* AArch64: use TARMAsmOptimizer.OptPass1SXTB

git-svn-id: trunk@44738 -
2020-04-16 21:19:13 +00:00
florian
7172397077 * factored out TARMAsmOptimizer.OptPass1UXTH
* AArch64: use TARMAsmOptimizer.OptPass1UXTH

git-svn-id: trunk@44737 -
2020-04-16 21:19:12 +00:00
pierre
73b563b367 Avoid invalid typecast in tarmunaryminusnode.pass_1 method
git-svn-id: trunk@44726 -
2020-04-15 20:47:04 +00:00
florian
9bcff94e9e * factored out TARMAsmOptimizer.OptPass1UXTB
* several other routines being very similar for ARM and AAarch64 moved to aoptarm

git-svn-id: trunk@44725 -
2020-04-15 20:21:29 +00:00
florian
2276caae24 + common assembler optimizer base class for arm and aarch64
git-svn-id: trunk@44720 -
2020-04-13 21:01:01 +00:00
pierre
3022927a6f Handle all existing possible values for init_settings.fputype to set Tag_FP_Arch .eabi_attribute
git-svn-id: trunk@44719 -
2020-04-13 20:56:44 +00:00
florian
7c2c8581b7 * get rid of fpu_vfp_first/last hack
git-svn-id: trunk@44716 -
2020-04-13 17:27:46 +00:00
florian
3d4cc7c2f6 * fixes compilation on WinCE
git-svn-id: trunk@44715 -
2020-04-13 13:09:15 +00:00
florian
458a6000e7 + arm: optimize sxth/sxtb
git-svn-id: trunk@44713 -
2020-04-12 20:50:40 +00:00
florian
d772a42375 * arm: more fixes for fpu_fpv4_sp_d16
* take care of FPUARM_HAS_VFP_DOUBLE
  * use FPUARM_HAS_VFP_EXTENSION instead of checking fpu_vfp_first and ...last

git-svn-id: trunk@44707 -
2020-04-12 18:05:50 +00:00
florian
38c32bcada * reorganized arm cpu flags
git-svn-id: trunk@44703 -
2020-04-12 14:24:56 +00:00
florian
497ff94cb0 + fpu_fpv4_sp_d32
* some fixes to make fpv4-sp-d32 work

git-svn-id: trunk@44702 -
2020-04-12 14:24:56 +00:00
florian
b033ccbddb * cleanup
git-svn-id: trunk@44515 -
2020-04-02 20:04:03 +00:00
Jonas Maebe
10b15628ab * split i/t_darwin from i/t_bsd, as they don't have that much in common
any more

git-svn-id: trunk@44407 -
2020-03-29 18:27:27 +00:00
florian
80c0fc3c92 * several fixes to get better reg. allocations in the arm assembler optimizer
git-svn-id: trunk@44245 -
2020-02-26 20:59:35 +00:00
florian
62129db44c * ARM: look further ahead when optimizing mov rX, yyyy
* ARM: fix Mov0 and MovMLA2MUL optimizations

git-svn-id: trunk@44244 -
2020-02-25 21:28:53 +00:00
florian
9132b54b3b + ARM: MovMLA2MUL optimization
git-svn-id: trunk@44243 -
2020-02-25 21:28:52 +00:00
florian
684ef3008f * ARM: optimize mov rX,#0 .... mul/mla/umull ...,rX,...
git-svn-id: trunk@44242 -
2020-02-24 21:10:55 +00:00
Jonas Maebe
592df7fa59 * disable cs_opt_regvar on all platforms when compiled for LLVM (LLVM does
that itself, our LLVM code generator can't handle it, and if it did then
    afterwards we would have to spill 90% of those register variables again
    to make them SSA)

git-svn-id: trunk@44062 -
2020-01-29 22:21:07 +00:00
florian
7b4292c94e * patch by Robert Roland to support the RaspberryPi 2 as a bare metal embedded target, resolves #35236
git-svn-id: trunk@44027 -
2020-01-23 21:14:49 +00:00
florian
d409548842 -- Zusammenführen von r31198 in ».«:
C    compiler/arm/aasmcpu.pas
U    compiler/arm/aoptcpu.pas
-- Aufzeichnung der Informationen für Zusammenführung von r31198 in ».«:
 U   .

git-svn-id: trunk@43825 -
2019-12-31 13:28:03 +00:00
Jonas Maebe
1a9e246c29 * added is_normal_fieldvarsym() helper and use it
o fixes several places where there was a check whether something is a
     fieldvarsym, but not whether it's an instance rather than a class field

git-svn-id: trunk@43786 -
2019-12-24 22:12:44 +00:00
Jonas Maebe
1e3f72403e * renamed getintparaloc to getcgtempparaloc
o it can be used for more than integer parameters

git-svn-id: trunk@43781 -
2019-12-24 22:12:25 +00:00
florian
a20209e691 + tf_init_final_units_by_calls
* arm-embedded generates direct calls for unit init/final now as well

git-svn-id: trunk@43771 -
2019-12-24 16:14:30 +00:00
florian
ef87879402 * common naming for fpu_none string
git-svn-id: trunk@43768 -
2019-12-24 16:14:28 +00:00
florian
2a315df80c * check in CheckLive* if a register allocator is initialized for a certain register type
git-svn-id: trunk@43665 -
2019-12-08 22:22:17 +00:00
florian
da54d0e8f7 + patch by J. Gareth Moreton: new method TAOptObj.CanDoJumpOpts and arm specific implementation
git-svn-id: trunk@43519 -
2019-11-20 22:12:27 +00:00
florian
e1e8986462 * patch by J. Gareth Moreton, issue #36271, part 3: support for the other architectures
git-svn-id: trunk@43441 -
2019-11-10 16:11:40 +00:00
pierre
6f7a39adab Fix compilation for arm-darwin using clang and forbid use of eabihf ABI for that target
git-svn-id: trunk@43205 -
2019-10-15 22:17:52 +00:00
florian
29bdbdba95 * reduce amount of software floating point exception checking, VSTR, VMOV, VLDR do not raise those
git-svn-id: trunk@43162 -
2019-10-10 20:31:30 +00:00
florian
245b58c249 + support for arm attributes
* abi notes fixed

git-svn-id: trunk@43157 -
2019-10-09 17:45:40 +00:00
florian
8ecdb2e9ca + dwarf support for tls threadvars
git-svn-id: trunk@43134 -
2019-10-05 20:48:31 +00:00
florian
a2d3522812 * general-dynamic -> global-dynamic
git-svn-id: trunk@43132 -
2019-10-05 20:48:29 +00:00
florian
16163b74ec + support for the gnu2 general-dynamic tls model on arm, use it instead of the gnu one as the gnu2 one can be relaxed (access optimizations by the linker)
+ support pic relocations in the internal assembler writer

git-svn-id: trunk@43128 -
2019-10-05 20:48:26 +00:00
florian
abb9401011 + tls models tlsm_general_dynamic and tlsm_local_exec for arm
git-svn-id: trunk@43127 -
2019-10-05 20:48:24 +00:00
florian
03dfc615dc + new relocations for arm tls
git-svn-id: trunk@43123 -
2019-10-05 20:48:21 +00:00
florian
03f7ef4c63 * renamed tls model switches and symbols to match gcc
git-svn-id: trunk@43122 -
2019-10-05 20:48:20 +00:00
florian
69786ffe73 somehow committing went wrong, second part of last commit:
+ AArch64: support for vX.8b/vX.16b register names
+ support for more than 256 registers in the register dat files
- removed totherregisterset
+ AArch64: use vmov to load immediates if possible
+ AArch64: use eor to clear mm registers

git-svn-id: trunk@42917 -
2019-09-03 21:07:33 +00:00
pierre
0fa280f4c2 Fix code generated in tarmnotnode.second_boolean
git-svn-id: trunk@42860 -
2019-08-28 07:38:35 +00:00
florian
5d1d9858d1 + VMovVMov2VMov optimization
git-svn-id: trunk@42727 -
2019-08-18 12:09:03 +00:00
florian
3d5ab366e1 * fix RemoveSuperfluousVMov if the VMov destination reg is an integer register, resolved #35978
git-svn-id: trunk@42726 -
2019-08-18 11:28:39 +00:00
florian
45847da693 * fix building for targets with no vfp support
git-svn-id: trunk@42693 -
2019-08-15 09:37:50 +00:00
florian
3a1ecd4f16 * fix tarminlinenode.first_sqrt_real
git-svn-id: trunk@42685 -
2019-08-13 22:12:53 +00:00
florian
0a0397c9f5 * forgotten part of previous commit: fix BccB2Cond optimization on arm
git-svn-id: trunk@42684 -
2019-08-13 22:12:52 +00:00
florian
ba0768b6a6 * building with -Cfvfpv2 hopefully fixed
git-svn-id: trunk@42683 -
2019-08-13 22:12:52 +00:00
florian
867df5362c + basic Neon support in the assembler writer
+ make use of VEOR if possible to clear VFP registers

git-svn-id: trunk@42682 -
2019-08-13 22:12:51 +00:00
florian
c418d63c16 + create defines with FPU capabilites
+ make use of FPU capability defines in the rtl

git-svn-id: trunk@42681 -
2019-08-13 22:12:49 +00:00
florian
85edf1c1eb * reworked arm vfp capability handling to use fpu_capabilites
git-svn-id: trunk@42679 -
2019-08-13 18:41:15 +00:00
florian
fd70fcace6 * fix BccB2Cond optimization on arm
git-svn-id: trunk@42676 -
2019-08-13 10:07:30 +00:00
florian
f23f3a4c5e * enable TCpuAsmOptimizer.RemoveSuperfluousVMov for VLDR
* fixed TCpuAsmOptimizer.RemoveSuperfluousVMov to be actually applied

git-svn-id: trunk@42668 -
2019-08-12 21:25:30 +00:00
florian
58bbbadc16 * fix return registers for hfa's containing singles
git-svn-id: trunk@42666 -
2019-08-12 20:30:18 +00:00
florian
5a379cc256 * fix detection of floating point constants for arm
git-svn-id: trunk@42665 -
2019-08-12 20:29:03 +00:00
Jonas Maebe
ce598c15ec * factored out the conditions under which add nodes need to perform
overflow checks
   o in particular ensure that cpu-specific overrides don't perform overflow
     checks when nf_internal is set

git-svn-id: trunk@42573 -
2019-08-03 12:19:50 +00:00
florian
99f92ce5dd * insert FPC_THROWFPUEXCEPTION call into the correct assembler list
git-svn-id: trunk@42540 -
2019-07-30 21:04:32 +00:00
florian
46bac33a2d + fpu_capabilities for arm
* some code converted to use fpu_capabilities

git-svn-id: trunk@42536 -
2019-07-30 21:04:28 +00:00
florian
b3ed34592f + software handling of exceptions on arm
* reworked software handling of exceptions so they can be check lazily

git-svn-id: trunk@42525 -
2019-07-28 21:06:36 +00:00
Jonas Maebe
3fee990218 * on Mach-O, PECOFF and ELF platforms, write local symbols as hidden/
private_extern (or plain global in case of PECOFF, as the effect is
    the same there): visible across object files, but they become local
    when linked into a binary/library. This enables cross-unit inlining
    of functions accessig implementation-only symbols.

git-svn-id: trunk@42340 -
2019-07-07 21:33:43 +00:00
pierre
828a248287 Systematically include fpcdefs.inc at sart of all units used by compiler
git-svn-id: trunk@42322 -
2019-07-03 13:35:05 +00:00
Jonas Maebe
faf75095cd * synchronised with trunk till r42189
git-svn-id: branches/debug_eh@42190 -
2019-06-07 18:24:38 +00:00
Jeppe Johansen
750567f8e3 Added T2 form of LDR/STR for SP relative forms.
git-svn-id: trunk@42169 -
2019-06-03 22:10:49 +00:00
Jeppe Johansen
cba4aeaca5 Fix division of constants on ARM thumb without long multiplication.
git-svn-id: trunk@42158 -
2019-06-01 20:30:09 +00:00
Jonas Maebe
a0e35fd1bc * synchronised with trunk till r42118
git-svn-id: branches/debug_eh@42119 -
2019-05-25 13:19:06 +00:00
Jonas Maebe
77658b925b * disable regular array -> dynamic array type coversion support unless
{$modeswitch arraytodynarray} is active (mantis #35576)
   o changed compiler to compile without this modeswitch
   o added the modeswitch to a test that depends on it

git-svn-id: trunk@42118 -
2019-05-25 12:31:32 +00:00
Jonas Maebe
9e9a982bfe * synchronised with trunk till r42095
git-svn-id: branches/debug_eh@42096 -
2019-05-18 18:43:51 +00:00
pierre
2ff391c25c Fix arm-aros rtl compilation
git-svn-id: trunk@42090 -
2019-05-17 06:39:57 +00:00
Jonas Maebe
1b6425176b * synchronised with trunk till r42049
git-svn-id: branches/debug_eh@42050 -
2019-05-12 18:44:05 +00:00
Jonas Maebe
281b3ad276 * fix case completeness and unreachable code warnings in compiler that would
be introduced by the next commit

git-svn-id: trunk@42046 -
2019-05-12 14:29:03 +00:00
Jonas Maebe
a0f850d57f * synchronised with trunk till r41885
git-svn-id: branches/debug_eh@41886 -
2019-04-16 16:20:44 +00:00