default segment base for the ref, in case there's no segment override
* in the internal assembler, use get_default_segment_of_ref to strip redundant
prefixes, instead of always assuming all refs are DS-based
git-svn-id: trunk@37486 -
* taicpu.needaddrprefix now uses is_32_bit_ref on x86_64
* is_16/32/64_bit_ref made part of the aasmcpu unit interface, so they can be
used elsewhere (e.g. in the inline assembler readers)
git-svn-id: trunk@37469 -
* when generating x86 code for parameterized string instructions with the
internal object writer, don't rely on the destination operand being [(r/e)di]
when determining the segment prefix, because when using intel syntax, source
and destination can be anything (only the operand size, the address size and
the source segment is taken into account)
git-svn-id: trunk@37452 -
(movs, cmps, scas, lods, stos, ins, outs) in the inline asm of the i8086, i386
and x86_64 targets. Both intel and at&t syntax is supported.
* NEC V20/V30 instruction 'ins' (available only on the i8086 target, because it
is incompatible with 386+ instructions) renamed 'nec_ins', to avoid conflict
with the 186+ 'ins' instruction.
git-svn-id: trunk@37446 -
(16-bit and 32-bit), i386 (16-bit and 32-bit) and x86_64 (32-bit and 64-bit).
Known bug: 32-bit addresses with an offset have their offset truncated to its
low 16-bits on i8086
git-svn-id: trunk@37409 -
process_ea_ref_64_32, process_ea_ref_32 and process_ea_ref_16, indicating
the address size they support; this is done, so that in the future, we can
mix them all on the same x86 architecture and support multiple address sizes
git-svn-id: trunk@37407 -
easily and so that all the values are now available to the compiler
(previously, there were several, which were mapped to the same value and thus
were only used to make x86ins.dat easier to read)
git-svn-id: trunk@37299 -
this removes the limit of 3 Ch_XXX flags per instruction (thus allowing adding
more precise flags, e.g. for tracking only certain bits of the flags register,
etc.) and avoids the ugliness of having the Ch_None filler, which makes
x86ins.dat less readable.
git-svn-id: trunk@35850 -
* AAA and AAS also read flags (AF)
* CMC reads and writes flags (it inverts CF)
* CMPSx and SCASx write flags
* CMPSx, SCASx, LODSx, STOSx, MOVSx read the direction flag
* NOT doesn't affect flags
* REP isn't affected by and doesn't affect flags
* REPE/REPNE/REPZ/REPNZ/REPC/REPNC don't write flags, only read them
* ROL and ROR don't read flags
* SAL doesn't read flags
* SHLD and SHRD don't read flags
git-svn-id: trunk@35849 -
o separate information for reading and writing, because e.g. in a
try-block, only the writes to local variables and parameters are
volatile (they have to be committed immediately in case the next
instruction causes an exception)
o for now, only references to absolute memory addresses are marked
as volatile
o the volatily information is (should be) properly maintained throughout
all code generators for all archictures with this patch
o no optimizers or other compiler infrastructure uses the volatility
information yet
o this functionality is not (yet) exposed at the language level, it
is only for internal code generator use right now
git-svn-id: trunk@34996 -
In comparison with the original patch, support for a i386 has been added as well as a test program.
Further, a small issue with xbegin has been fixed
git-svn-id: trunk@33375 -
instead of using the optimized instructions for 386+, which assume also a
32-bit address and operand size, so they didn't work even on a 386+ in real
mode
git-svn-id: trunk@33371 -
supposed to handle in the i8086 internal asm instruction level check, because
these two flags are no longer part of the IF_PLEVEL mask, after r33316
git-svn-id: trunk@33318 -
TObjData.writeReloc; on i8086 it was changed to longint to allow using 32-bit
relocations
+ added support for writing 32-bit OMF relocations
git-svn-id: trunk@32936 -
the i8086 internal object writer. This allows weeding out spurious 386
instructions, as is similarly done by NASM when using it as an external
assembler.
git-svn-id: trunk@32871 -
the i8086 bugs, related to code that assumes that they are the same)
+ also added RELOC_RELATIVE32 on i8086
* RELOC_ABSOLUTE32 and RELOC_RELATIVE32 are not yet implemented in the OMF
object writer and linker (and currently produce an internal error), but will
be implemented in the future, as the OMF format supports both 16-bit and
32-bit relocations
git-svn-id: trunk@32311 -
It fixes PIC code generation with GOT for i386 with enabled optimizations. Bugs #28667, #28668.
Prior the fix I have not been able to compile even RTL with -O2 due to not enough free registers, since EBX is reserved for GOT.
It can be further optimized to teach register allocator to not spill the GOT register if possible.
git-svn-id: trunk@32020 -
the condition inverted; this will be used to simulate near conditional jumps
on processors earlier than 386 (i.e. "Jcc near target" will be encoded as
"JNcc short +3; JMP target")
git-svn-id: trunk@30611 -
language, An optimization guide for x86 platforms, Page 87), so restored the 32 Bit part of the old alignment
bytes for use on those old CPUs and use it depending on the CPU switches
git-svn-id: trunk@29777 -
