as well as insert_regalloc_info_all()
+ "register" allocator for the jvm target, which simply replaces every
virtual register with a temp. This is done for all register types in
one pass, so that the temps can be easily reused without worrying
about conflicts. Small optimisation: alloc/store/dealloc/load
sequences for a single reg are removed (many of these are generated
because most cg nodes return their value in a register which is then
immediately consumed by the parent)
* map addressregisters to integer registers with size R_SUBD, because
they require one stackslot (the subregister type is used by rgcpu
to determine the size of the temp it has to allocate)
git-svn-id: branches/jvmbackend@18316 -
of the same register (or of a register and its aliases) -> make
sure that all relevant constraints are applied to it as well
(mantis #16980)
git-svn-id: trunk@15952 -
+ RTL support:
o VFP exceptions are disabled by default on Darwin,
because they cause kernel panics on iPhoneOS 2.2.1 at least
o all denormals are truncated to 0 on Darwin, because disabling
that also causes kernel panics on iPhoneOS 2.2.1 (probably
because otherwise denormals can also cause exceptions)
* set softfloat rounding mode correctly for non-wince/darwin/vfp
targets
+ compiler support: only half the number of single precision
registers is available due to limitations of the register
allocator
+ added a number of comments about why the stackframe on ARM is
set up the way it is by the compiler
+ added regtype and subregtype info to regsets, because they're
also used for VFP registers (+ support in assembler reader)
+ various generic support routines for dealing with floating point
values located in integer registers that have to be transferred to
mm registers (needed for VFP)
* renamed use_sse() to use_vectorfpu() and also use it for
ARM/vfp support
o only superficially tested for Linux (compiler compiled with -Cpvfpv6
-Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
the fpu exception handler still needs to be implemented), Darwin has
been tested more thoroughly
+ added ARMv6 cpu type and made it default for Darwin/ARM
+ ARMv6+ implementations of atomic operations using ldrex/strex
* don't use r9 on Darwin/ARM, as it's reserved under certain
circumstances (don't know yet which ones)
* changed C-test object files for ARM/Darwin to ARMv6 versions
* check in assembler reader that regsets are not empty, because
instructions with a regset operand have undefined behaviour in that
case
* fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
int64->single type conversion
* fixed constant pool locations in case 64 bit constants are generated,
and/or when vfp instructions with limited reach are present
WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
code with -Cparmv6 (or higher), or you will get crashes. The reason is
that storing/restoring multiple VFP registers must happen using
different instructions on pre/post-ARMv6.
git-svn-id: trunk@14317 -
shortstring temps don't get maximum alignment)
* changed some gettemptyed() calls into gettemp() calls (gettemptyped
means that this temp can only be used for temps of that type,
which is necessary for refcounted types but not for floats)
git-svn-id: trunk@12036 -
* Suppressed 2 unreachable code warnings.
* Now x86 compiler compiles without warnings and notes! It will be great to keep such state in future...
git-svn-id: trunk@11455 -
suite compiled with -Cg compared to without -Cg)
+ support for using a virtual register as PIC/got base register
* moved got loading code from ncgutil to cgobj/cgcpu (can't test whether
it didn't break anything under linux/i386, because "make cycle OPT=-Cg"
was already broken due to the *prt*.as -> si_*.pp changes)
git-svn-id: trunk@8651 -
- {$intpromotion common_type} or -CIcommon_type switches to common type promotion.
- {$intpromotion native_integer} or -CIcommon_type switches to current behaviour.
- Default in tp mode is common_type, native_integer in other modes
- Compiler can cycle with -CIcommon_type
- Still needs checking on other architectures than i386
git-svn-id: trunk@8118 -
removed by the register allocator and thus become invalid. This fixed
make cycle with -Or for ppc, but I'm not sure what the warning on
symsym.pas:1663 means. Since the tlocation change, even regular make
cycle doesn't work anymore though...
spilling routines. Special x86 optimization still needs
to be added.
* Spilling fixed when both operands needed to be spilled
* Cleanup of spilling routine, do_spill_readwritten removed
inner loops, see for example colour_registers. According to profile data
this causes fillchar to be the most time consuming procedure.
Some modifications done to make it clear less than 8kb of memory each
call. Divides time spent in fillchar by two, but it still is the no.1
procedure.
removes moves of that particular register type. This is necessary so
we don't remove the live_start instruction of a register before it
has been processed
- Worklist no longer a ringbuffer
- No find operations are left
- Simplify now done in constant time
- unusedregs is now a Tsuperregisterworklist
- Microoptimizations
- invalid calling conventions for a certain cpu are rejected
- arm softfloat calling conventions
- -Sp for cpu dependend code generation
- several arm fixes
- remaining code for value open array paras on heap
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units
* moved location_* and reference_* to cgobj
* first things for mmx register allocation
* move some protected and private field around
* the temp. register for register parameters/arguments are now released
before the move to the parameter register is done. This improves
the code in a lot of cases.
* fixed some volatile register bugs
+ -dnotranslation option for -dnewra, which causes the registers not to
be translated from virtual to normal registers. Requires support in
the assembler writer as well, which is only implemented in aggas/
agppcgas currently
* Figured out why -dnewra generates superfluous "mov reg1,reg2"
statements: changes in location_force. These moves are now no longer
constrained so they are optimized away.
getexplicitregisterint()
* writing the intereference graph is now only done with -dradebug2 and
the created files are now called "igraph.<module_name>"
