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337 Commits

Author SHA1 Message Date
yury
61c0448903 * Big fix for ARM GOT support to make it work: 
- Fixed access to symbols with offset.
  - Always use register R9 for GOT pointer to prevent bugs when free register limit is reached in a function.
  - GOT is not needed for function calls by name.

git-svn-id: trunk@31681 -
 2015-09-14 23:15:10 +00:00
Jeppe Johansen
dac294c680 Fix ARMv3/ARMv2A support. 
git-svn-id: trunk@31561 -
 2015-09-06 20:33:26 +00:00
Jonas Maebe
61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm) 
git-svn-id: trunk@30429 -
 2015-04-04 14:29:16 +00:00
Jonas Maebe
687bb15299 * renamed getdatalabel() to getglobaldatalabel 
git-svn-id: branches/hlcgllvm@30336 -
 2015-03-27 21:25:34 +00:00
Jonas Maebe
bd203a5b57 * synchronised with trunk till r30240 
git-svn-id: branches/hlcgllvm@30241 -
 2015-03-15 19:44:58 +00:00
Jeppe Johansen
914e9e7b49 Merged from trunk 
git-svn-id: branches/laksen/armiw@30146 -
 2015-03-08 12:33:46 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095 
git-svn-id: branches/hlcgllvm@30101 -
 2015-03-05 20:32:15 +00:00
Jonas Maebe
2ab7f5c35d * moved x86-specific requirements from the generic bsr/bsf code to the 
x86 code generator (register size constraints)

git-svn-id: trunk@29984 -
 2015-02-23 22:57:18 +00:00
florian
80cc09e350 o fix wince compilation: 
* apparently, wince (or GNU AS for it) does not support blx imm
  * set FPC_IN_SYSTEM directive, so assembler code in divide.inc is compiled right

git-svn-id: trunk@29779 -
 2015-02-21 21:55:56 +00:00
Jeppe Johansen
47dbec3111 Rebase to trunk revision 
git-svn-id: branches/laksen/armiw@29708 -
 2015-02-15 16:08:18 +00:00
sergei
472310d83f * ARM: Fixed interface wrapper generation after r28542 for targets without BX instruction. 
git-svn-id: trunk@29580 -
 2015-01-30 15:00:28 +00:00
Jeppe Johansen
2ac11e4b82 Use proper relocation type for Thumb-2 BLX. 
Initialize MM register allocator properly for Thumb-2 cg.

git-svn-id: branches/laksen/armiw@29435 -
 2015-01-11 13:30:52 +00:00
Jeppe Johansen
6976af8365 Change .thumb_func to be an ait_directive instead of it's own tai type. 
git-svn-id: branches/laksen/armiw@29334 -
 2014-12-26 23:13:14 +00:00
Jeppe Johansen
9e5979e8be Implemented UAL syntax support in the ARM assembler reader. Can be toggled with a field for now, but not implemented yet. Still using pre-UAL syntax for now. 
Switched codegeneration of VFPv2 and VFPv3 to use UAL mnemonics and syntax.
Updated VFP code in RTL to use UAL syntax too.
Added preliminary ELF support for ARM.
Added support for linking of WinCE COFF files. Should work for with a standard ARMv4-I target.

git-svn-id: branches/laksen/armiw@29247 -
 2014-12-10 20:44:34 +00:00
Károly Balogh
1b0a1f4508 ARM: mimic what GNU C does while calling the profiling mcount on ARM 
git-svn-id: trunk@28648 -
 2014-09-13 00:17:10 +00:00
Károly Balogh
739c66291d ARM: first naive attempt to get gprofiling work for arm-linux. (Work-In-Progress, but at least for me it doesn't explode) 
git-svn-id: trunk@28645 -
 2014-09-12 18:51:02 +00:00
florian
3f71b059e5 * improve ldr*/str* handling for arm thumb 
git-svn-id: trunk@28583 -
 2014-09-02 19:37:45 +00:00
florian
8a7c16327c * fixes reference handling for arm thumb and ldrh, not perfect yet 
git-svn-id: trunk@28568 -
 2014-08-31 18:00:10 +00:00
florian
81c717fc06 + implemented tthumbcgarm.g_external_wrapper in a way which does not destroy lr 
git-svn-id: trunk@28560 -
 2014-08-31 16:35:01 +00:00
florian
dffdde7d53 * fixes reference handling for arm thumb and ldrb, not perfect yet and other ldr/str types might need similiar fixes 
git-svn-id: trunk@28549 -
 2014-08-31 11:37:17 +00:00
florian
836a6e46ca * several issues with interface wrappers for thumb fixed 
git-svn-id: trunk@28542 -
 2014-08-30 20:38:26 +00:00
Jonas Maebe
b745dcc64c * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because 
for some platforms it depends on that routine

git-svn-id: branches/hlcgllvm@28492 -
 2014-08-19 20:22:54 +00:00
sergei
e4fea2ebc8 * Dummy implementations of a_bit_scan_reg_reg and g_stackpointer_alloc in tcg, removes the need to override these methods in every descendant code generator solely to avoid "constructing a class with abstract method" warning. 
git-svn-id: trunk@28175 -
 2014-07-06 11:34:04 +00:00
Jeppe Johansen
a1197460e1 Constrained a number of optimizations and updated reference offsets for ARM Thumb. 
Embedded target can now build with optimizations.

git-svn-id: trunk@28023 -
 2014-06-21 13:26:33 +00:00
masta
0cb1a129b3 {ARM} Implement usage of generic division-by-const optimization 
This utilizes the code commited in r27904 to convert a division by const
into a 32x32->64 bit multiplication for ARM.

git-svn-id: trunk@27929 -
 2014-06-10 20:49:18 +00:00
Károly Balogh
af95876eba arm: an attempt to improve the a_op_const_ref patch in r27881 
git-svn-id: trunk@27882 -
 2014-06-06 20:48:31 +00:00
Károly Balogh
5b262df7d0 arm: have a CPU specific op_const_ref, so the reference doesn't get fixed up both in a_load_reg_ref and a_load_ref_reg 
git-svn-id: trunk@27881 -
 2014-06-06 17:44:45 +00:00
florian
8dfcc2b399 * do not reuse tmp. registers in tbasecgarm.handle_load_store 
git-svn-id: trunk@27387 -
 2014-03-30 17:28:45 +00:00
florian
9464dad2b4 * handle vldr/vstr references with offsets correctly 
git-svn-id: trunk@27273 -
 2014-03-24 19:20:29 +00:00
florian
686a2d2f3f + Support omitting the frame pointer on arm even in procedures with incoming parameters 
on the stack, this can be enabled by -OoFORCENOSTACKFRAME. This reduces the required
  entry/exit code and makes an extra register available to the compiler. However, since this is
  based on an estimation of the required stack size, it might have two drawbacks:
  either the stack frame is estimated to big, the program requires a bigger stack than needed
  or it is estimated too small, then the compiler throws an internalerror during compilation. These
  issues can be overcome as soon as the compiler supports recompiling subroutines if needed.

git-svn-id: trunk@27239 -
 2014-03-23 14:38:53 +00:00
florian
6deb0b35b5 * handle fpu_vfpv3_d16 properly for thumb2 
git-svn-id: trunk@27102 -
 2014-03-11 21:25:03 +00:00
masta
2d2cab0e7a Fix some internalerror codes in the ARM CG 
git-svn-id: trunk@26701 -
 2014-02-07 12:15:08 +00:00
sergei
9c1f917e3a * a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around. 
+ x86 targets now directly call procedure variables located in references.
- a_call_ref method removed from tcg and thlcgobj.

git-svn-id: trunk@26666 -
 2014-02-03 13:28:56 +00:00
Jeppe Johansen
07b2982e77 Don't do ARM FoldShiftLdrStr peephole optimization if there's an offset in the reference. 
Use UXTH+UXTB instructions instead of two shifts on processors that supports that.
Eliminate internalerror when constant pointers are typecast as arrays.

git-svn-id: trunk@26647 -
 2014-02-01 13:29:35 +00:00
masta
0736bf4ded Try to change typical constant AND-masking operations into shifts for ARM 
If the constant only contains a string of ones starting from lsb or msb
we can shift out the bits accordingly, opening up some possibilities for
the peephole optimizer to fold at least one shift into another
operation.

git-svn-id: trunk@26565 -
 2014-01-22 20:21:02 +00:00
nickysn
85dd9e5789 + added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1) 
git-svn-id: trunk@26561 -
 2014-01-22 15:00:34 +00:00
masta
3ab665e554 Try to split constant XORs into two shiftimms on ARM. 
git-svn-id: trunk@26448 -
 2014-01-13 21:32:24 +00:00
masta
f8889e3d6d Use optimize_op_const in ARM cg 
This uses the generic optimizations done in optimize_op_const. Due to
this we can also drop some of the optimizations done in the arm-specific
code.

git-svn-id: trunk@26348 -
 2014-01-01 18:26:42 +00:00
florian
561ec1f782 * unified internal errors 
git-svn-id: trunk@26302 -
 2013-12-28 20:19:54 +00:00
florian
4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables 
git-svn-id: trunk@26161 -
 2013-12-01 17:02:08 +00:00
Jonas Maebe
555634b755 * (re)set upper bits of register when appropriate for all operations in 
a_op_reg_reg() (except for NOT, which was already handled correctly)
    + test

git-svn-id: trunk@25840 -
 2013-10-22 07:41:52 +00:00
florian
8fb7cf822b * unified internal errors 
git-svn-id: trunk@25647 -
 2013-10-05 12:37:46 +00:00
florian
e0f48b9f02 * calculate stack correction on exit correctly if stack parameters are passed 
git-svn-id: trunk@25427 -
 2013-09-05 21:40:33 +00:00
florian
36e6f99843 * fix tthumbcgarm.g_flags2reg, mov reg,#imm for thumb updates the flags 
git-svn-id: trunk@25426 -
 2013-09-05 21:40:30 +00:00
florian
e2ec3bbcb0 * do shifts for sign/zero extensions correctly 
git-svn-id: trunk@25418 -
 2013-09-04 21:00:46 +00:00
florian
333e84202f * fixed a_load_reg_reg for thumb 
git-svn-id: trunk@25408 -
 2013-09-03 21:11:02 +00:00
Károly Balogh
86cb4d0c12 use a TSuperRegister instead of an aint 
git-svn-id: trunk@25383 -
 2013-08-28 12:58:29 +00:00
Károly Balogh
c677f1fd69 trying harder to follow the code style (no functional changes) 
git-svn-id: trunk@25382 -
 2013-08-28 11:25:15 +00:00
Károly Balogh
cb4d01627f save an extra reg if it's required to keep 64bit stack alignment on ARM 
git-svn-id: trunk@25379 -
 2013-08-27 12:49:50 +00:00
florian
d4968e054b + arm: tsettings.instructionset 
* the selected instruction set is now independent from the cpu type: e.g. armv7-a can perfectly execute thumb(2) code

git-svn-id: trunk@25370 -
 2013-08-25 21:56:12 +00:00
florian
f34bee1df7 * arm thumb does not support ror reg1,reg2,#imm 
git-svn-id: trunk@25355 -
 2013-08-23 18:41:24 +00:00
florian
3ebe708574 * do not use r13/r15 for certain data processing operations 
* correct OP_AND with certain types of constants

git-svn-id: trunk@25350 -
 2013-08-23 15:22:58 +00:00
florian
bb73a2891b * prevent generation of mul/mla statements with illegal registers 
git-svn-id: trunk@25343 -
 2013-08-23 15:22:41 +00:00
Jonas Maebe
4ec9ec2009 + PIC support for Darwin/ARM: 
o does not use GOT
   o enabled by default like for other Darwin platforms
  - removed Darwin/ARM call stub support: no longer needed with current
    Xcode versions (at least Xcode 4.2+), and we didn't support PIC
    in them yet

git-svn-id: trunk@25325 -
 2013-08-22 08:14:24 +00:00
florian
6606955b88 + basic support for pic on arm-linux 
git-svn-id: trunk@25297 -
 2013-08-19 21:35:37 +00:00
Jonas Maebe
57cdd8c106 * set symbol type/binding of data referred by ppc and arm/darwin stubs (part 
of r25264, fixes internalerror 2013081601 after r25266)

git-svn-id: trunk@25275 -
 2013-08-17 16:26:37 +00:00
Jonas Maebe
3b9b6a0cd7 * explicitly define the asmsymbols for Darwin call stubs as local 
git-svn-id: trunk@25264 -
 2013-08-16 10:07:46 +00:00
Jeppe Johansen
0bb8d24e24 Add some immediate forms of shift instructions to tcgthumb.a_op_const_reg 
git-svn-id: trunk@24637 -
 2013-05-30 12:07:32 +00:00
florian
e6489ed7d2 * arm thumb: do not generate illegal ror instructions 
git-svn-id: trunk@24439 -
 2013-05-04 22:00:17 +00:00
florian
7bea00e5fb * arm thumb: allow interface trampolines to non-virtual methods with large offsets 
git-svn-id: trunk@24434 -
 2013-05-04 19:54:03 +00:00
florian
6197330bad * arm thumb: take care of constant restrictions when creating interface wrappers for non-virtual methods 
git-svn-id: trunk@24415 -
 2013-05-03 21:12:16 +00:00
florian
f3b7f6197b * arm thumb: generate proper code for rol 
git-svn-id: trunk@24414 -
 2013-05-03 20:53:58 +00:00
florian
f80b6f4774 * arm thumb: take care of large offsets in interface wrappers 
git-svn-id: trunk@24203 -
 2013-04-07 21:56:37 +00:00
florian
e41b7b1b94 * arm thumb: strh/ldrh does not allow stack pointer based references with offset 
git-svn-id: trunk@24200 -
 2013-04-07 21:27:59 +00:00
florian
7ba197a221 * fix stack parameter handling for arm thumb 
* fix entry/exit code generation for arm thumb

git-svn-id: trunk@24197 -
 2013-04-07 21:01:15 +00:00
florian
f9ef8e90da + a_op_const_reg_reg for arm thumb taking care of availability of add sp,sp, ... 
* handle references with base and index on arm thumb correctly

git-svn-id: trunk@24196 -
 2013-04-07 21:01:11 +00:00
florian
f25a905904 * fix register allocation initalization for arm thumb 
* avoid that the register allocator creates code which writes to frame/stack pointer

git-svn-id: trunk@24190 -
 2013-04-07 21:00:50 +00:00
florian
075abd6220 + support of stackframesize for arm thumb 
+ estimatedtempsize to get a good estimatation for architectures which require to know the stack size before

git-svn-id: trunk@24188 -
 2013-04-07 21:00:38 +00:00
florian
64bc09ae58 * fixes several issues with arm thumb stack frame 
git-svn-id: trunk@23988 -
 2013-03-24 21:40:23 +00:00
florian
89b4939cec * correctly handle stackframes with size>508 for arm thumb 
git-svn-id: trunk@23977 -
 2013-03-24 18:51:23 +00:00
florian
c345ed8945 * generate branches for arm-thumb which are always sufficient big, the optimizer can fix this later on 
git-svn-id: trunk@23904 -
 2013-03-17 20:26:06 +00:00
florian
086ae4b999 Merge r22905 and r22906 
git-svn-id: trunk@23773 -
 2013-03-10 10:45:34 +00:00
florian
08bf826334 Merges 22828,22829 
git-svn-id: trunk@23756 -
 2013-03-09 20:49:57 +00:00
florian
9198630ce3 * fix armv7m compiler 
git-svn-id: trunk@23686 -
 2013-03-03 21:59:34 +00:00
florian
1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet 
git-svn-id: trunk@23682 -
 2013-03-03 12:20:10 +00:00
yury
d8902af3d6 * Do not replace ADD by SUB and vice-versa when overflow checking is enabled. Fixes tw15304 for ARM. 
git-svn-id: trunk@23517 -
 2013-01-24 21:49:21 +00:00
Jonas Maebe
69c29a415f * pass the procdef to getintparaloc instead of only the proccalloption, so 
that the type of the parameters can be determined automatically
   o added compilerproc declarations for all helpers called in the compiler
     via their assembler name, so we can look up the corresponding procdef

git-svn-id: trunk@23325 -
 2013-01-06 15:05:40 +00:00
florian
47d43750e4 * remove unused units from uses statements 
git-svn-id: trunk@23306 -
 2013-01-03 23:07:09 +00:00
florian
3143f0e1be * fix by Jeppe Johansen for bitscan which was broken by the last fix for normal arm code 
git-svn-id: trunk@22866 -
 2012-10-28 17:57:22 +00:00
florian
1520bcc4f0 * fix bsf for armv7+ 
git-svn-id: trunk@22860 -
 2012-10-27 20:17:58 +00:00
Jeppe Johansen
818b43c060 Updated localalign values, and changed the behaviour of alignment of load/stores to not break aligned half-word copies 
git-svn-id: branches/laksen/arm-embedded@22828 -
 2012-10-23 12:45:40 +00:00
Jeppe Johansen
628d46f2d3 Fixed Bsf* functions on platforms that support RBIT 
Fixed stackframe epilogue code for Thumb2 to allow proper processing of interrupts

git-svn-id: branches/laksen/arm-embedded@22813 -
 2012-10-21 19:13:59 +00:00
Jeppe Johansen
4e84431dde Fix some optimizations which assume that there are 3 operands 
Add simple Mul+Sub/Mul+Add into MLS/MLA optimizations
Fix some other small issues in the optimizer
Implement Interlocked* functions with proper use of LDREX/STREX

git-svn-id: branches/laksen/arm-embedded@22801 -
 2012-10-21 16:20:52 +00:00
Jeppe Johansen
a8f9b0dac4 Added initial support for the Cortex-M4F FPv4_S16 FPU 
git-svn-id: branches/laksen/arm-embedded@22597 -
 2012-10-08 20:10:45 +00:00
Jonas Maebe
1a97e61619 * factored out fixref from handle_load_store, and handle indirect symbol 
loads for darwin in fixref (used to be done in ncgld, but was removed
    there)

git-svn-id: trunk@22445 -
 2012-09-23 21:25:32 +00:00
florian
5facc6ad5e * BsrX(0) should return 255 instead of $ffffffff 
git-svn-id: trunk@22316 -
 2012-09-04 15:16:59 +00:00
florian
d67af82228 * patch by Jeppe Johansen: Thumb2-only targets don't support the BLX <label>, and have to use BL <label>, resolves #22770 
git-svn-id: trunk@22314 -
 2012-09-04 14:57:26 +00:00
florian
d63ebe6464 * bsr implementation for armv5+ using clz 
git-svn-id: trunk@22310 -
 2012-09-04 12:56:38 +00:00
florian
59012afe26 * better heuristics to decide when a mul by a constant shall be replaced by shift/add/sub sequences 
git-svn-id: trunk@22300 -
 2012-09-03 13:39:52 +00:00
florian
2f8027c63f + more sophisticated code to optimize multiplications on arm 
+ the multiplication optimization needs a popcnt function
+ simple test

git-svn-id: trunk@22299 -
 2012-09-03 13:39:45 +00:00
florian
45383fd32d + a lot missing flag allocs/deallocs added 
git-svn-id: trunk@22201 -
 2012-08-23 08:54:52 +00:00
florian
d8161c185c + track usage of flags by using a new register RS_/NR_DEFAULTFLAGS 
git-svn-id: trunk@22179 -
 2012-08-22 19:37:51 +00:00
florian
7588896775 * make use of cpuflags in the arm compiler 
* armv5te architecture

git-svn-id: trunk@22103 -
 2012-08-17 10:37:17 +00:00
masta
aa21845cd9 Small optimization for OP_AND on ARM 
Especially with 64bit operators the CG sometimes generates:
and r0, r1, #0
Which just clears r0 and is equivalent with
mov r0, #0

git-svn-id: trunk@22032 -
 2012-08-08 06:44:20 +00:00
florian
7513291ad8 * generate different code for OS_S8 -> OS_16 conversion which might fold better, idea by Nico Erfurth 
git-svn-id: trunk@22027 -
 2012-08-07 19:36:46 +00:00
masta
6529307d9e Don't emit useless AND/BICs in ARM CG 
In certain cases the CG would emit something like
bic r1, r0, #0
As BIC is clearing the specified bits this is equivalent to
mov r1, r0
This patch changes the CG to emit the mov instead which the register
allocator will hopefully remove most of the time.

git-svn-id: trunk@22024 -
 2012-08-07 06:46:45 +00:00
florian
f619a1aaf6 * fld/fst can have a base register+offset 
git-svn-id: trunk@22016 -
 2012-08-05 18:34:13 +00:00
florian
e81ba0f82e + make use of the armv6+ sign/zero extension instructions if appropriate 
git-svn-id: trunk@22013 -
 2012-08-05 14:04:11 +00:00
florian
19ed835f2b * don't generate an extra indirection when loading vfp constants 
git-svn-id: trunk@22010 -
 2012-08-04 17:01:57 +00:00
masta
c16871e129 Generate better code in Tthumb2cgarm.g_flags2reg 
The old code generated a strange IT-sequence:

IT EQ
MOVEQ r0, #1
IT NE
MOVNE r0, #1

Now we generate:

ITE EQ
MOVEQ r0, #1
MOVNE r0, #1

IT stands for IfThen, ITE for IfThenElse it has a couple of other forms
where the instruction gets extended to handle more of the following
instructions. So we have ITEE, ITETE etc, up to 4 instructions can be
handled.

git-svn-id: trunk@21996 -
 2012-08-02 00:56:15 +00:00