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ff7af306df
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136 Commits

Author SHA1 Message Date
Jeppe Johansen
ff7af306df Add FPA support. 
git-svn-id: branches/laksen/armiw@29366 -
 2015-01-01 11:18:04 +00:00
Jeppe Johansen
49346b3041 Fix SWI as a pseudo instruction. 
Add VFPv2/3 instruction entries for Thumb2.

git-svn-id: branches/laksen/armiw@29356 -
 2014-12-29 11:34:34 +00:00
Jeppe Johansen
cbd75428c0 Fix an issue with local BLX branches not being turned into BL branches. 
git-svn-id: branches/laksen/armiw@29355 -
 2014-12-28 23:27:30 +00:00
Jeppe Johansen
9a482d5281 Refactor and secure some immediate operand encodings. 
Add some system mode entries, udiv/sdiv in arm mode, and fix bugs in ldrh/strh.

git-svn-id: branches/laksen/armiw@29353 -
 2014-12-28 21:41:06 +00:00
Jeppe Johansen
e7575d9f96 Fix some encoding bugs in ARM modes. Mostly shifts and signindex errors. 
Add FPU mask checking for instructions too.

git-svn-id: branches/laksen/armiw@29352 -
 2014-12-28 16:16:54 +00:00
Jeppe Johansen
97fdfc942b Fix encoding of shifterops for ARM dataprocessing instructions. 
git-svn-id: branches/laksen/armiw@29348 -
 2014-12-28 00:13:06 +00:00
Jeppe Johansen
c284d8f6ba Fix some warnings about unitialized variables. 
git-svn-id: branches/laksen/armiw@29346 -
 2014-12-27 23:11:54 +00:00
Jeppe Johansen
3ad03491ed Add Neg as a pseudo instruction, and fix RRX pseudo code expansion. 
Split some of the thumb code emission rules to make it easier to specify short-cut notations.

git-svn-id: branches/laksen/armiw@29345 -
 2014-12-27 17:44:30 +00:00
Jeppe Johansen
6fff181679 Add support for TBB/TBH instructions. 
Precisize rules for selection of thumb instructions.
Add short-cut notation support for most simple Thumb2 instructions ( add r1,#4 instead of add r1,r1,#4 ).

git-svn-id: branches/laksen/armiw@29343 -
 2014-12-27 16:00:06 +00:00
Jeppe Johansen
71cdedea82 Add missing NOP, and B instruction forms. 
Move ThumbFunc flag from section to symbol.
Make .w forms optional the other way around. If .w is explicitly put on an instruction the assembler should always chose a wide form.

git-svn-id: branches/laksen/armiw@29341 -
 2014-12-27 13:23:02 +00:00
Jeppe Johansen
cc418eef74 Added unified assembler syntax mode so it can be selected with $ASMMODE. 
Fixed bug in Mov instruction.
Added initial scanning of IT/LastInIT detection for proper instruction selection.
Disabled "wide" format flag detection again for now.

git-svn-id: branches/laksen/armiw@29338 -
 2014-12-27 00:19:09 +00:00
Jeppe Johansen
6976af8365 Change .thumb_func to be an ait_directive instead of it's own tai type. 
git-svn-id: branches/laksen/armiw@29334 -
 2014-12-26 23:13:14 +00:00
Jeppe Johansen
9227a9fcf2 Reenable check for Wide format flag. 
git-svn-id: branches/laksen/armiw@29331 -
 2014-12-26 20:08:07 +00:00
Jeppe Johansen
5c3093a937 Add most non-VFP Thumb-2 instruction entries for the ARM internal writer. 
git-svn-id: branches/laksen/armiw@29329 -
 2014-12-26 18:35:15 +00:00
Jeppe Johansen
3cb9b30165 Added full 16-bit Thumb support to the ARM internal writer. 
git-svn-id: branches/laksen/armiw@29326 -
 2014-12-25 19:33:14 +00:00
Jeppe Johansen
901275b4a1 Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen). 
Add missing fields to other elf targets.

git-svn-id: branches/laksen/armiw@29286 -
 2014-12-14 16:28:35 +00:00
Jeppe Johansen
387824c1ee Added some APSR register bitmask definitions. 
Fixed a bunch of instruction encodings by comparing bulks of handwritten tests to binutils assembled versions.
Fixed emission of regsets of S and D registers above 15.
Fixed assembler reader for RRX shiftmode.
There can be a size postfix after a condition code in UAL assembler syntax. This has been added to the assembler reader.

git-svn-id: branches/laksen/armiw@29277 -
 2014-12-12 22:23:44 +00:00
Jeppe Johansen
284a4d9dd7 Encoding of preindexed LDRH/STRH opcodes was missing. 
git-svn-id: branches/laksen/armiw@29254 -
 2014-12-11 11:20:25 +00:00
Jeppe Johansen
b5cd9c048e Small fix for uninitialized variables causing warnings. 
git-svn-id: branches/laksen/armiw@29253 -
 2014-12-11 09:26:48 +00:00
Jeppe Johansen
eb3eaab54b Fix some small encoding bugs. 
git-svn-id: branches/laksen/armiw@29250 -
 2014-12-10 23:28:09 +00:00
Jeppe Johansen
d023c63ad0 Add a lot of instruction table entries and missing instructions for support of most ARM32 mode instructions from ARMv4 up ARMv7A. 
Add some VFP registers.
Rebuilt tables.
Added a lot of VFPv3 and Advanced SIMD(not supported yet) oppostfixes.
Implemented code in aasmcpu to generate binary code from the instructions. Only ARM32 supported so far.

git-svn-id: branches/laksen/armiw@29246 -
 2014-12-10 20:38:23 +00:00
sergei
d37e72dbf9 * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. 
git-svn-id: trunk@28708 -
 2014-09-22 16:18:16 +00:00
sergei
b08ffa0a87 * ARM: fixed detecting Thumb-style jump tables in insertpcrelativedata() after r28546. 
git-svn-id: trunk@28702 -
 2014-09-21 01:59:25 +00:00
florian
01b311f6cf * do not insert constant tables on arm thumb in it* sequences 
git-svn-id: trunk@27272 -
 2014-03-24 19:20:01 +00:00
Jonas Maebe
45e03d768e * handle ARM PIC jump tables in determining the maximum offset for 
pc-relative loads

git-svn-id: trunk@27105 -
 2014-03-11 23:18:54 +00:00
Károly Balogh
71e492db1b made arm-linux system unit compilable on anything but Thumb2 after r26161 
git-svn-id: trunk@26175 -
 2013-12-03 16:36:34 +00:00
florian
4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables 
git-svn-id: trunk@26161 -
 2013-12-01 17:02:08 +00:00
florian
d4968e054b + arm: tsettings.instructionset 
* the selected instruction set is now independent from the cpu type: e.g. armv7-a can perfectly execute thumb(2) code

git-svn-id: trunk@25370 -
 2013-08-25 21:56:12 +00:00
florian
950194678a * handle jump tables correctly when inserting constant pools on arm thumb 
git-svn-id: trunk@25354 -
 2013-08-23 18:41:21 +00:00
florian
b4c7b40049 * do not split statements following A_IT* instructions on arm thumb2 when inserting constant pools 
git-svn-id: trunk@25347 -
 2013-08-23 15:22:51 +00:00
florian
6df2917d93 * fix spilling of vfp instructions 
* spelling mistake fixed

git-svn-id: trunk@25345 -
 2013-08-23 15:22:46 +00:00
florian
4056194e7c * don't ignore by accident the next instruction after a newly inserted constant pool 
git-svn-id: trunk@24677 -
 2013-05-31 21:29:08 +00:00
florian
ccdd4437d6 * arm thumb: do not cause bxx getting too long ranges when inserting constant blocks 
git-svn-id: trunk@24437 -
 2013-05-04 20:36:08 +00:00
florian
cec28ef512 * when inserting pc relative data blocks on arm thumb, avoid negative pc offsets, if needed, the data is copied 
a short test with the rtl shows that this happens exactly once in the rtl, so it is feasible to do so

git-svn-id: trunk@24413 -
 2013-05-03 20:45:26 +00:00
florian
4e4cc4e289 * support neg instruction for spilling 
git-svn-id: trunk@24189 -
 2013-04-07 21:00:47 +00:00
florian
c2baf7b4c0 Merge r23058 
git-svn-id: trunk@23776 -
 2013-03-10 16:37:57 +00:00
florian
086ae4b999 Merge r22905 and r22906 
git-svn-id: trunk@23773 -
 2013-03-10 10:45:34 +00:00
florian
1eeeb309c7 * intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet 
git-svn-id: trunk@23682 -
 2013-03-03 12:20:10 +00:00
florian
47d43750e4 * remove unused units from uses statements 
git-svn-id: trunk@23306 -
 2013-01-03 23:07:09 +00:00
florian
8221681871 + add spilling info for the RBIT instruction 
git-svn-id: trunk@22859 -
 2012-10-27 20:17:12 +00:00
Jeppe Johansen
4e84431dde Fix some optimizations which assume that there are 3 operands 
Add simple Mul+Sub/Mul+Add into MLS/MLA optimizations
Fix some other small issues in the optimizer
Implement Interlocked* functions with proper use of LDREX/STREX

git-svn-id: branches/laksen/arm-embedded@22801 -
 2012-10-21 16:20:52 +00:00
Jeppe Johansen
3e963a49e2 Added support for IT block merging 
Added a peephole pattern check for UXTB->UXTH chains

git-svn-id: branches/laksen/arm-embedded@22592 -
 2012-10-08 14:07:40 +00:00
Jeppe Johansen
9ec9b44784 Add CBNZ/CBZ instructions 
Create preliminary Thumb-2 PeepHoleOptPass2 code, hacked together from the ARM mode code
Added a number of simple size optimizations for common Thumb-2 instructions

git-svn-id: branches/laksen/arm-embedded@22590 -
 2012-10-08 12:30:00 +00:00
Jeppe Johansen
b788ba660d Fix optimizations of Thumb-2 code 
Fix problem with loading of condition operand for IT instructions
Properly split IT blocks when register allocator tries to spill inside a block.

git-svn-id: branches/laksen/arm-embedded@22582 -
 2012-10-08 04:49:39 +00:00
florian
54d3d736f5 * patch by Jeppe Johansen to add support for handling different flags for xPSR regs, 
and add usermode parsing of LDM/STM ops
  This patch basically extends the ARM assembly reader a bit to properly parse CPSR and 
  SPSR flags for the MSR opcode, and allows the reader to understand 
  the ^ modifer for register lists for STMxx and LDMxx.

  Previously the following combinations weren't possible in straight assembler:
     MRS R0, CPSR
     MRS R0, SPSR
     MSR CPSR_CX, R0
     LDMIA SP, {R0-R15}^
     etc.. 

git-svn-id: trunk@22502 -
 2012-09-29 08:23:40 +00:00
florian
7840b4657a * the improved arm optimizer might move instructions around so the old hacky test if a label with its data has been already embedded into the code by checking if the offset is 0 does not work anymore so a new field for tai_label has been introduced for this purpose 
git-svn-id: trunk@22345 -
 2012-09-06 15:12:17 +00:00
florian
e81ba0f82e + make use of the armv6+ sign/zero extension instructions if appropriate 
git-svn-id: trunk@22013 -
 2012-08-05 14:04:11 +00:00
masta
aeb15ba2b6 Fixed postfix check in taicpu.is_same_reg_move 
The old version did not check the S-Postfix for MOV, which results in
removing instructions like:

movs r0, r0

which breaks later flag usage.

git-svn-id: trunk@21676 -
 2012-06-21 20:12:25 +00:00
florian
fefc130efc * patch by Nico Erfurth: Handle BIC properly in taicpu.spilling_get_operation_type 
BIC was handled as a read only operation, which caused it to overwrite
live register content sometimes.

git-svn-id: trunk@21509 -
 2012-06-06 19:44:53 +00:00
florian
2560266e5d * skip comments properly when searching for places for constant pool distances 
git-svn-id: trunk@21307 -
 2012-05-15 18:08:19 +00:00