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165 Commits

Author SHA1 Message Date
Jonas Maebe
1cb8c0d00c * specify the def of assembler level symbols defined via 
tasmdata.DefineAsmSymbol() and all routines that call it
   o will be used to automatically generate AB_INDIRECT sybols when
     necessary

git-svn-id: trunk@34164 -
 2016-07-20 20:52:59 +00:00
Károly Balogh
e0c21b6f8b ARM: avoid some range check errors, while running a compiler compiled with -CR 
git-svn-id: trunk@33257 -
 2016-03-16 10:08:44 +00:00
florian
d13246cea4 + handle FMA instructions in taicpu.spilling_get_operation_type 
git-svn-id: trunk@33183 -
 2016-03-06 13:33:18 +00:00
Jeppe Johansen
017d58748f Use thumb_func flag to detect selected arm/thumb mode. 
git-svn-id: trunk@32958 -
 2016-01-16 11:24:38 +00:00
Jeppe Johansen
0251263234 Move some of the local reloc calculation out of aasmcpu, and into COFF and ELF writers. 
git-svn-id: trunk@32867 -
 2016-01-06 23:15:08 +00:00
Jeppe Johansen
1b02dd27dc Make relocation type more precise compared to output of gas. 
Change and to or in case symbol in other section is not exported.

git-svn-id: trunk@32852 -
 2016-01-05 07:23:20 +00:00
Jeppe Johansen
c929bb32ae Make sure to remove postfix as well when fixing thumb instructions. 
git-svn-id: trunk@32787 -
 2015-12-29 12:20:30 +00:00
Jeppe Johansen
4b0f4cf86a Fix some small bugs in the Thumb assembler. 
git-svn-id: trunk@32785 -
 2015-12-28 21:10:46 +00:00
Jeppe Johansen
eadd93dbae Most if not all instructions for thumb use only 2 operand rw forms. Changed get_oper_type to match that. It was previously creating bad spilling. 
git-svn-id: trunk@32100 -
 2015-10-20 03:45:22 +00:00
yury
432248cbf1 * Removed lot of unused vars. 
git-svn-id: trunk@31732 -
 2015-09-17 12:48:58 +00:00
florian
4d349c9c71 * take care of limited offsets of stf/ldf, resolves issue #23620 
git-svn-id: trunk@31572 -
 2015-09-07 20:14:27 +00:00
Jeppe Johansen
b6729a8f0b Workaround for IE 20060521 when building the ARM compiler 
git-svn-id: trunk@30733 -
 2015-04-26 20:10:57 +00:00
Jeppe Johansen
f31f87e8c7 Fix spilling_get_operation_type for MRS and MSR instructions 
git-svn-id: trunk@30590 -
 2015-04-14 17:20:47 +00:00
Jonas Maebe
201121d7c9 * synchronised with trunk till r30345 
git-svn-id: branches/hlcgllvm@30349 -
 2015-03-28 12:28:15 +00:00
Jeppe Johansen
09acd9b1ab Add workaround for ARM thumb when using GAS. 
git-svn-id: trunk@30254 -
 2015-03-17 21:24:07 +00:00
Jonas Maebe
bd203a5b57 * synchronised with trunk till r30240 
git-svn-id: branches/hlcgllvm@30241 -
 2015-03-15 19:44:58 +00:00
Jeppe Johansen
f92f0751f4 Fix selection of LDR/STR instructions in thumb mode. Most forms don't support pre or post indexing. 
Fix emission of offsets.

git-svn-id: trunk@30234 -
 2015-03-15 12:12:13 +00:00
Jeppe Johansen
439027a8de Add most pre-UAL VFP instruction forms. 
Add fused mac instructions for VFPv4.

git-svn-id: trunk@30187 -
 2015-03-14 14:59:13 +00:00
Jeppe Johansen
64f127141f Add VFPv4 FPU type for ARM. 
Fix assembler reader so it can read instructions longer than 5 characters.

git-svn-id: trunk@30186 -
 2015-03-14 12:49:07 +00:00
Jeppe Johansen
914e9e7b49 Merged from trunk 
git-svn-id: branches/laksen/armiw@30146 -
 2015-03-08 12:33:46 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095 
git-svn-id: branches/hlcgllvm@30101 -
 2015-03-05 20:32:15 +00:00
Jonas Maebe
b2427d04ed * ensure that data pools are not inserted right after add/tbb/tbh-based 
jumptable dispatches

git-svn-id: trunk@30027 -
 2015-02-27 20:52:12 +00:00
sergei
9cc0bdd6b9 + Missing part of internal ARM assembler, Mantis #26588. I'm not setting it as default for arm-wince yet, because testing reveals several points in generic code that need adjustments. 
git-svn-id: trunk@29588 -
 2015-01-30 22:45:05 +00:00
Jeppe Johansen
2ac11e4b82 Use proper relocation type for Thumb-2 BLX. 
Initialize MM register allocator properly for Thumb-2 cg.

git-svn-id: branches/laksen/armiw@29435 -
 2015-01-11 13:30:52 +00:00
Jeppe Johansen
572076fc4d Add MSR/MRS for ARMv6M/7M. 
Fix bug in FPA LFM/SFM.
Add usermode handling of LDM/STM.

git-svn-id: branches/laksen/armiw@29371 -
 2015-01-02 13:24:03 +00:00
Jeppe Johansen
7390acc426 Merged from recent trunk. 
git-svn-id: branches/laksen/armiw@29369 -
 2015-01-01 23:54:40 +00:00
Jeppe Johansen
f963ff1b5b Add CPSxx instructions, and some missing FPA instructions. 
git-svn-id: branches/laksen/armiw@29368 -
 2015-01-01 21:17:21 +00:00
Jeppe Johansen
ff7af306df Add FPA support. 
git-svn-id: branches/laksen/armiw@29366 -
 2015-01-01 11:18:04 +00:00
Jeppe Johansen
49346b3041 Fix SWI as a pseudo instruction. 
Add VFPv2/3 instruction entries for Thumb2.

git-svn-id: branches/laksen/armiw@29356 -
 2014-12-29 11:34:34 +00:00
Jeppe Johansen
cbd75428c0 Fix an issue with local BLX branches not being turned into BL branches. 
git-svn-id: branches/laksen/armiw@29355 -
 2014-12-28 23:27:30 +00:00
Jeppe Johansen
9a482d5281 Refactor and secure some immediate operand encodings. 
Add some system mode entries, udiv/sdiv in arm mode, and fix bugs in ldrh/strh.

git-svn-id: branches/laksen/armiw@29353 -
 2014-12-28 21:41:06 +00:00
Jeppe Johansen
e7575d9f96 Fix some encoding bugs in ARM modes. Mostly shifts and signindex errors. 
Add FPU mask checking for instructions too.

git-svn-id: branches/laksen/armiw@29352 -
 2014-12-28 16:16:54 +00:00
Jeppe Johansen
97fdfc942b Fix encoding of shifterops for ARM dataprocessing instructions. 
git-svn-id: branches/laksen/armiw@29348 -
 2014-12-28 00:13:06 +00:00
Jeppe Johansen
c284d8f6ba Fix some warnings about unitialized variables. 
git-svn-id: branches/laksen/armiw@29346 -
 2014-12-27 23:11:54 +00:00
Jeppe Johansen
3ad03491ed Add Neg as a pseudo instruction, and fix RRX pseudo code expansion. 
Split some of the thumb code emission rules to make it easier to specify short-cut notations.

git-svn-id: branches/laksen/armiw@29345 -
 2014-12-27 17:44:30 +00:00
Jeppe Johansen
6fff181679 Add support for TBB/TBH instructions. 
Precisize rules for selection of thumb instructions.
Add short-cut notation support for most simple Thumb2 instructions ( add r1,#4 instead of add r1,r1,#4 ).

git-svn-id: branches/laksen/armiw@29343 -
 2014-12-27 16:00:06 +00:00
Jeppe Johansen
71cdedea82 Add missing NOP, and B instruction forms. 
Move ThumbFunc flag from section to symbol.
Make .w forms optional the other way around. If .w is explicitly put on an instruction the assembler should always chose a wide form.

git-svn-id: branches/laksen/armiw@29341 -
 2014-12-27 13:23:02 +00:00
Jeppe Johansen
cc418eef74 Added unified assembler syntax mode so it can be selected with $ASMMODE. 
Fixed bug in Mov instruction.
Added initial scanning of IT/LastInIT detection for proper instruction selection.
Disabled "wide" format flag detection again for now.

git-svn-id: branches/laksen/armiw@29338 -
 2014-12-27 00:19:09 +00:00
Jeppe Johansen
6976af8365 Change .thumb_func to be an ait_directive instead of it's own tai type. 
git-svn-id: branches/laksen/armiw@29334 -
 2014-12-26 23:13:14 +00:00
Jeppe Johansen
9227a9fcf2 Reenable check for Wide format flag. 
git-svn-id: branches/laksen/armiw@29331 -
 2014-12-26 20:08:07 +00:00
Jeppe Johansen
5c3093a937 Add most non-VFP Thumb-2 instruction entries for the ARM internal writer. 
git-svn-id: branches/laksen/armiw@29329 -
 2014-12-26 18:35:15 +00:00
Jeppe Johansen
3cb9b30165 Added full 16-bit Thumb support to the ARM internal writer. 
git-svn-id: branches/laksen/armiw@29326 -
 2014-12-25 19:33:14 +00:00
Jeppe Johansen
901275b4a1 Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen). 
Add missing fields to other elf targets.

git-svn-id: branches/laksen/armiw@29286 -
 2014-12-14 16:28:35 +00:00
florian
d540d56908 * unified internal errors 
git-svn-id: trunk@29280 -
 2014-12-13 11:46:59 +00:00
Jeppe Johansen
387824c1ee Added some APSR register bitmask definitions. 
Fixed a bunch of instruction encodings by comparing bulks of handwritten tests to binutils assembled versions.
Fixed emission of regsets of S and D registers above 15.
Fixed assembler reader for RRX shiftmode.
There can be a size postfix after a condition code in UAL assembler syntax. This has been added to the assembler reader.

git-svn-id: branches/laksen/armiw@29277 -
 2014-12-12 22:23:44 +00:00
Jeppe Johansen
284a4d9dd7 Encoding of preindexed LDRH/STRH opcodes was missing. 
git-svn-id: branches/laksen/armiw@29254 -
 2014-12-11 11:20:25 +00:00
Jeppe Johansen
b5cd9c048e Small fix for uninitialized variables causing warnings. 
git-svn-id: branches/laksen/armiw@29253 -
 2014-12-11 09:26:48 +00:00
Jeppe Johansen
eb3eaab54b Fix some small encoding bugs. 
git-svn-id: branches/laksen/armiw@29250 -
 2014-12-10 23:28:09 +00:00
Jeppe Johansen
d023c63ad0 Add a lot of instruction table entries and missing instructions for support of most ARM32 mode instructions from ARMv4 up ARMv7A. 
Add some VFP registers.
Rebuilt tables.
Added a lot of VFPv3 and Advanced SIMD(not supported yet) oppostfixes.
Implemented code in aasmcpu to generate binary code from the instructions. Only ARM32 supported so far.

git-svn-id: branches/laksen/armiw@29246 -
 2014-12-10 20:38:23 +00:00
sergei
d37e72dbf9 * ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions. 
git-svn-id: trunk@28708 -
 2014-09-22 16:18:16 +00:00