Commit Graph

1784 Commits

Author SHA1 Message Date
yury
a04e4971fc * i386: Do not request GOT for every function call. GOT is requested only for external calls in thlcgcpu.a_call_name(). Local calls are always PC relative.
git-svn-id: trunk@41464 -
2019-02-25 15:48:41 +00:00
yury
e5c2d13671 * Do not set pi_needs_got in current_procinfo.flags at the node level, since the GOT usage can only be estimated there. Instead set the pi_needs_got flag at places where the GOT register is accessed during the code generation. This eliminates generation of the unneeded initialization of the GOT register and fixes linker errors when the _GLOBAL_OFFSET_TABLE_ symbol is referenced but no actual GOT references are present.
git-svn-id: trunk@41460 -
2019-02-25 13:35:40 +00:00
florian
db6916453d * warning fixed
git-svn-id: branches/debug_eh@41452 -
2019-02-24 20:03:23 +00:00
Jonas Maebe
a079e5fa80 * synchronised with trunk till r41449
git-svn-id: branches/debug_eh@41450 -
2019-02-24 20:01:53 +00:00
Jonas Maebe
07bd4ba517 * let all the case code generation work with tconstexprint instead of aint,
so it also works for 32 bit targets and a high level code generator
    (where aint is still 32 bit, but 64 bit operations are not decomposed)

git-svn-id: trunk@41441 -
2019-02-24 19:58:37 +00:00
florian
18fb53e012 * set cfa offset always properly
git-svn-id: branches/debug_eh@41413 -
2019-02-22 22:00:20 +00:00
florian
a8c8cc1890 * create proper cfi, when registers are pushed
git-svn-id: branches/debug_eh@41382 -
2019-02-19 22:16:39 +00:00
florian
3567d01ee4 * improved CFI
git-svn-id: branches/debug_eh@41356 -
2019-02-17 20:26:32 +00:00
florian
72a02b467c + generate more cfi on x86
git-svn-id: branches/debug_eh@41287 -
2019-02-10 18:00:24 +00:00
florian
27ab140dd9 + gcc_except_table section
+ support exception related sections in the default LD linker script

git-svn-id: branches/debug_eh@41285 -
2019-02-10 17:57:48 +00:00
Jonas Maebe
a0d796e98d * synchronised with trunk till r41159
git-svn-id: branches/debug_eh@41160 -
2019-02-01 17:01:54 +00:00
florian
597a23d278 + tls support for x86_64-linux (not yet enabled by default)
git-svn-id: trunk@41081 -
2019-01-27 09:37:25 +00:00
florian
c7bb028d35 * factored out OptPass1FLD, used bx x86-64 now as well
- removed unused function

git-svn-id: trunk@41061 -
2019-01-24 20:10:29 +00:00
florian
6cb6517411 * better recognization of procedure exit code
git-svn-id: trunk@41060 -
2019-01-24 19:53:51 +00:00
florian
24f6cc0da5 * factored out OptPass1FSTP, used by x86-64 now as well
git-svn-id: trunk@41059 -
2019-01-24 19:38:32 +00:00
florian
cfd0790f89 * avoid assembler errors for the MovOpMov2MovOp optimziation in case the size of the instruction
gets changed and the first one contains a constant, resolves #34933

git-svn-id: trunk@41021 -
2019-01-23 21:02:14 +00:00
florian
4fb7b5d3ff * fix MovOpMov2MovOp optimization if no -Cpcoreavx2 is used
git-svn-id: trunk@40979 -
2019-01-21 21:57:07 +00:00
florian
4f0da5fcc3 + patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799
+ avxopcodes tests also movbe and pclmulqdq

git-svn-id: trunk@40951 -
2019-01-20 18:50:12 +00:00
Jonas Maebe
b3a8543a56 * synchronised with trunk till r40942
git-svn-id: branches/debug_eh@40943 -
2019-01-20 17:37:07 +00:00
florian
75a89d2115 * fix and enable MovOpMov2MovOp optimization on x86-64
git-svn-id: trunk@40941 -
2019-01-20 17:00:43 +00:00
florian
94d7a02fae * modified patch by Gareth Moreton to pool TmpUsedRegs in the assembler optimizers, resolves #34679
git-svn-id: trunk@40938 -
2019-01-20 14:16:38 +00:00
florian
b223d1c304 * modified patch by Gareth Moreton to make ie unique, resolves #34849
git-svn-id: trunk@40849 -
2019-01-12 14:44:54 +00:00
Jonas Maebe
51b58f342f * synchronised with trunk till r40775
git-svn-id: branches/debug_eh@40776 -
2019-01-05 22:12:28 +00:00
Károly Balogh
2f7fe0e737 haiku-x86_64: add target to the compiler and ppudump, enable it in fpmake and fpcmake
git-svn-id: trunk@40753 -
2019-01-04 02:16:24 +00:00
Jonas Maebe
11511e13d5 * synchronised with trunk till r40723
git-svn-id: branches/debug_eh@40724 -
2019-01-01 13:22:17 +00:00
florian
a2cee252e8 * when optimizing range checks in case nodes, unsigned comparisions must be used, resolves #34782
git-svn-id: trunk@40721 -
2019-01-01 01:11:13 +00:00
florian
bd4b7a6bc4 * more case fixes
git-svn-id: trunk@40706 -
2018-12-29 21:53:52 +00:00
florian
f6e32ae90e * (modified) path by Gareth Moreton to fix case handling
git-svn-id: trunk@40686 -
2018-12-28 20:56:43 +00:00
florian
7f5c2fa3aa * (modified) patch by Gareth Moreton: Speed improvement in case blocks, resolves #0034762
This patch improves the compiler where "case" statements are concerned, using jump tables more often and creating more efficient machine code in some situations:
  * If a case block only contains one branch (not including the else block), the initial range check is removed, since this becomes wasted effort.
  * If the else block is empty, the else label is set to the end label - though this doesn't decrease the code size, it takes a bit of strain off the peephole optimizer.
  * On -O2 and above, some node analysis is now done on the branch labels. Most of the time this just redirects it to the end
    label for empty blocks, but if the block contains a goto statement, it will redirect it to its destination instead,
    thus increasing performance by not having multiple jumps (this won't get picked up by the peephole optimiser if the label addresses are in a jump table).
  * Some checks now use what I call the 'true count' rather than the 'label count'. The true count includes each
    individual value in a range - for example, 0..2 counts as 3. This increases the chance that a jump table will be
    utilised in situations where it is more efficient than a linear list.
  * For jump tables, if the case block almost covers the entire range (32 entries or fewer from full coverage),
    the initial range check is removed and the gaps included in the jump table (pointing to the else label).

git-svn-id: trunk@40676 -
2018-12-27 18:31:55 +00:00
Jonas Maebe
9630eb7ce9 * synchronised with trunk till r40466
git-svn-id: branches/debug_eh@40467 -
2018-12-04 19:54:31 +00:00
Jonas Maebe
122d0d36d6 + volatile() expression that marks an expression as volatile
* disable matching volatile references in the assembler optimisers, so they
    can't be removed (more conservative than needed, but better than removing
    too many)
   o the CSE optimiser will ignore them by default, because they're an unknown
     inline node for it
  * also removed no longer used fpc_in_move_x and fpc_in_fillchar_x inline node
    identifiers from rtl/inc/innr.inc, and placed fpc_in_unaligned_x at the
    right place

git-svn-id: trunk@40465 -
2018-12-04 19:53:20 +00:00
Jonas Maebe
cf235a36a1 * synchronised with trunk till r40378
git-svn-id: branches/debug_eh@40379 -
2018-11-27 20:11:49 +00:00
florian
c43cae9231 * disable MovOpMov2MovOp optimization on x86-64 for now as it seems to break
git-svn-id: trunk@40361 -
2018-11-21 21:22:54 +00:00
florian
477d7be651 * building on i386-linux fixed
git-svn-id: trunk@40360 -
2018-11-21 19:19:24 +00:00
florian
ac37a54d79 + MovOpMov2MovOp optimization
git-svn-id: trunk@40359 -
2018-11-20 22:20:43 +00:00
Jonas Maebe
bfc7c58a69 * synchronised with trunk till r40348
git-svn-id: branches/debug_eh@40349 -
2018-11-18 12:01:50 +00:00
florian
6dbde11f5a * three operand shl for shifting by 2, 4 or 8 can be simulated by lea
git-svn-id: trunk@40337 -
2018-11-17 15:08:22 +00:00
Jonas Maebe
4d262e0eca * fixed return value of fpc_eh_return_data_regno(1) on x86-64
git-svn-id: branches/debug_eh@40336 -
2018-11-17 09:40:37 +00:00
florian
6a6ea6729f * i8086 compiler fixed, resolves #34552
git-svn-id: trunk@40316 -
2018-11-14 18:05:35 +00:00
florian
72416edcc4 + support for tlsm_general on i386-linux
git-svn-id: trunk@40281 -
2018-11-11 17:32:20 +00:00
florian
e157939b41 * compilation on x86-64 and i8086 fixed
git-svn-id: trunk@40275 -
2018-11-08 18:45:16 +00:00
florian
063415fa72 + i386-linux support for tls-based threadvars
git-svn-id: trunk@40272 -
2018-11-07 22:03:02 +00:00
pierre
8d5cfa8731 Disable range checking in rax86int unit
git-svn-id: trunk@40237 -
2018-11-06 07:41:15 +00:00
yury
30d64cec68 * Removed unused local vars.
git-svn-id: trunk@40185 -
2018-11-02 18:51:19 +00:00
yury
4357caaad8 * Removed unused local vars.
git-svn-id: trunk@40183 -
2018-11-02 18:44:29 +00:00
florian
59d5d6ec95 + factored out TX86AsmOptimizer.PrePeepholeOptIMUL, used now by x86-64 and i386
* generalized and simplified the code

git-svn-id: trunk@40162 -
2018-11-01 20:49:20 +00:00
florian
cdce68451a - x86 align does not use a register anymore, code removed
git-svn-id: trunk@40157 -
2018-11-01 20:49:15 +00:00
pierre
9c90f593ab Add global range check disable for i8086 cgcpu and x86 nx86add units
git-svn-id: trunk@40124 -
2018-10-31 23:20:29 +00:00
pierre
e5dffebdc7 Avoid range check error in MaskLength evaluation
git-svn-id: trunk@40110 -
2018-10-31 14:51:23 +00:00
Jonas Maebe
8555ec1438 + fpc_eh_return_data_regno() intrinsic to get the return register numbers
for the Dwarf EH exception handler result

git-svn-id: branches/debug_eh@40070 -
2018-10-28 18:16:38 +00:00
pierre
d26fb3b663 Try to fix compilation error after commit #40027
git-svn-id: trunk@40028 -
2018-10-25 06:39:42 +00:00
pierre
740a26d879 Fix compilation of RTL for watcom target
git-svn-id: trunk@40027 -
2018-10-24 21:37:54 +00:00
pierre
c6977a0a7a Explicitly disable range checking
git-svn-id: trunk@40026 -
2018-10-24 21:37:22 +00:00
pierre
92acd38f40 Fix for bug report #34380
git-svn-id: trunk@39986 -
2018-10-18 20:21:54 +00:00
florian
9805214d34 * properly take care of register allocations between the first and second instruction for the FoldLea optimization
* check for ait_instruction after a GetNextInstruction function call
* cosmetics

git-svn-id: trunk@39983 -
2018-10-18 18:28:03 +00:00
yury
4643a0b1ff * Register external gas assembler for aarch64-android and x86_64-android.
git-svn-id: trunk@39969 -
2018-10-18 11:48:27 +00:00
Jonas Maebe
0b246f3dbd * converted Boolean8 to an internal type, and mapped Boolean to the
new internal pasbool1(type) (part of mantis #34411)
   o apply the _Bool x86-64 parameter passing rules only to pasbool1

git-svn-id: trunk@39949 -
2018-10-16 21:14:18 +00:00
tg74
60a75a2277 delete testcode
git-svn-id: branches/tg74/avx512@39936 -
2018-10-15 10:46:41 +00:00
tg74
1ef9cc01e6 avx512 disp8*N
git-svn-id: branches/tg74/avx512@39909 -
2018-10-09 21:19:52 +00:00
florian
8943c0584e + patch by J. Gareth Moreton to support BMI2 instructions
+ extended avx test generator with the newly added BMI2 instructions

git-svn-id: trunk@39875 -
2018-10-07 10:10:19 +00:00
tg74
7deacdd036 bugfix avx512 opcodes VFNMSUB231PS,VFPCLASSPS
git-svn-id: branches/tg74/avx512@39783 -
2018-09-21 05:34:04 +00:00
tg74
fba72b280b avx512 broadcast vcvt...,vfpclass...
git-svn-id: branches/tg74/avx512@39778 -
2018-09-19 15:28:15 +00:00
tg74
4265f4d6a5 avx512 broadcast for special opcodes vfpclass.., vcvt...
git-svn-id: branches/tg74/avx512@39768 -
2018-09-19 06:25:42 +00:00
florian
49e7e5f512 * support aitconst_*bit_unaligned in the intel assembler writer, resolves #34222
git-svn-id: trunk@39761 -
2018-09-16 15:27:03 +00:00
tg74
f3e18cedf6 bugfix opcode definition vrsqrt..., vscale...
git-svn-id: branches/tg74/avx512@39755 -
2018-09-14 09:09:35 +00:00
tg74
865563fc82 bugfixes x86ins.dat avx512-opcodes vpexpand..., vptest..., vrcp...
git-svn-id: branches/tg74/avx512@39754 -
2018-09-14 05:19:28 +00:00
tg74
2c40a09d04 bugfixes x86ins.dat avx512-opcodes vf...
git-svn-id: branches/tg74/avx512@39753 -
2018-09-13 22:01:23 +00:00
tg74
1bc0ecec11 bugfix opcode definition vfmadd132pd/ps
git-svn-id: branches/tg74/avx512@39751 -
2018-09-13 11:04:09 +00:00
tg74
ac26adf7c9 bugfix avx512-opcodes
git-svn-id: branches/tg74/avx512@39745 -
2018-09-12 13:59:29 +00:00
tg74
dd967ecfee remove any gather/scatter opcodes for nights mill
git-svn-id: branches/tg74/avx512@39742 -
2018-09-12 09:59:04 +00:00
tg74
3759eac608 bugfix avx512 add ZMMReg for gather/scatter in intelOS32
git-svn-id: branches/tg74/avx512@39741 -
2018-09-12 06:11:44 +00:00
tg74
c611e4814a new avx512 opcodes
git-svn-id: branches/tg74/avx512@39720 -
2018-09-10 06:19:45 +00:00
tg74
8b9d7be8e5 bugfix OS32
git-svn-id: branches/tg74/avx512@39719 -
2018-09-10 06:18:48 +00:00
tg74
1d9cbb4dcb new AVX512 opcodes
git-svn-id: branches/tg74/avx512@39705 -
2018-09-03 05:40:44 +00:00
tg74
5e1dc1a807 bugfix for test tasm9 32bit
git-svn-id: branches/tg74/avx512@39695 -
2018-09-01 08:26:18 +00:00
tg74
914e31dbd1 new AVX512 instructions vextracti..,vextractf..
git-svn-id: branches/tg74/avx512@39674 -
2018-08-27 06:06:27 +00:00
tg74
6f64177c6a bugfix avx512 OS32bit EVEX-coding
git-svn-id: branches/tg74/avx512@39661 -
2018-08-21 22:12:36 +00:00
tg74
15cc00164a bugfix avx512 - process operand-extention e.g. {SAE} correctly
git-svn-id: branches/tg74/avx512@39653 -
2018-08-20 13:30:17 +00:00
tg74
b9de736b33 change insdat vmovq for test tasm9
git-svn-id: branches/tg74/avx512@39652 -
2018-08-20 13:27:37 +00:00
tg74
29690162b8 bugfix OS32
git-svn-id: branches/tg74/avx512@39650 -
2018-08-19 18:41:45 +00:00
tg74
d6bd114b74 bugfix OS32
git-svn-id: branches/tg74/avx512@39649 -
2018-08-19 16:37:20 +00:00
tg74
7c5cefad36 bugfix OS32
git-svn-id: branches/tg74/avx512@39648 -
2018-08-19 16:35:23 +00:00
tg74
7b8715184a bugfix OS32
git-svn-id: branches/tg74/avx512@39647 -
2018-08-19 16:31:09 +00:00
tg74
2b1da37d66 new avx512 instructions and bugfixes avx512
git-svn-id: branches/tg74/avx512@39636 -
2018-08-19 10:18:32 +00:00
tg74
867d145e50 support vector operand bcst,{sae},{er} + k-register
git-svn-id: branches/tg74/avx512@39457 -
2018-07-16 17:06:57 +00:00
nickysn
9272bf59b2 + added x86 (i8086, i386 and x86_64) intrinsics fpc_x86_get_cs/ss/ds/es/fs/gs
for getting the value of x86 segment registers

git-svn-id: trunk@39433 -
2018-07-11 14:19:40 +00:00
nickysn
ff2fff365f + added x86 compiler intrinsics fpc_x86_sti and fpc_x86_cli, which generate the
'sti' and 'cli' instructions

git-svn-id: trunk@39388 -
2018-07-04 16:48:34 +00:00
nickysn
6cd88a24dc * release al/ax/eax immediately after the 'in', before (instead of after) moving
it to the destination imaginary register. This generates better code.

git-svn-id: trunk@39380 -
2018-07-04 13:09:47 +00:00
nickysn
f34710faa0 + use the in and out instructions with immediate constant port number for ports
that are evaluated as a compile-time constant in the range 0..255

git-svn-id: trunk@39365 -
2018-07-03 20:15:20 +00:00
nickysn
fdc896ad0a + inline support for the x86 'in' and 'out' instructions. Currently only enabled
in the i8086-msdos 'ports' unit, but will be enabled on other targets (e.g.
  go32v2) in the future as well. 32-bit 'in' and 'out' not inlined on i8086, but
  will be on i386 and x86_64.

git-svn-id: trunk@39362 -
2018-07-03 17:01:42 +00:00
tg74
4dc5442fa5 support vector operand writemask,zeroflag
git-svn-id: branches/tg74/avx512@39359 -
2018-07-02 20:20:03 +00:00
florian
5782acc32d * patch by J. Gareth Moreton to fix 33909
git-svn-id: trunk@39353 -
2018-07-01 12:54:30 +00:00
florian
78943ea843 + patch by J. Gareth Moreton: x86 optimisations for Jcc and SETcc, resolves #33899
* optimization also added for i386

git-svn-id: trunk@39307 -
2018-06-25 20:40:05 +00:00
florian
1472a81768 * patch by J. Gareth Moreton to unify the x86 assembler optimizer method headers, resolves #33908
git-svn-id: trunk@39305 -
2018-06-25 20:13:34 +00:00
nickysn
45337b67fe + when using the i8086 with section based smartlinking, create OMF section
groups, named 'CGROUP' or 'CGROUP_UNITNAME', which include all the code
  sections, that need to be put in the same segment

git-svn-id: trunk@39277 -
2018-06-22 15:02:39 +00:00
nickysn
ab47c8b899 + introduce the omf_section_primary_group function. Use it instead of
section_belongs_to_dgroup, to allow sections to belong to groups, other than
  dgroup.

git-svn-id: trunk@39268 -
2018-06-21 13:21:53 +00:00
nickysn
1631d9ac0a + support segments (sections) with a primary group, other than 'DGROUP' in the
NASM assembler writer

git-svn-id: trunk@39246 -
2018-06-20 16:14:41 +00:00
florian
0d168796d7 * patch by J. Gareth Moreton: More Peephole optimizations for AND and MOV
git-svn-id: trunk@39242 -
2018-06-18 20:50:08 +00:00
florian
a0b343a787 * patch by J. Gareth Moreton for less invasive DEBUG_AOPTCPU
git-svn-id: trunk@39239 -
2018-06-17 14:56:19 +00:00
florian
8c0d5411d0 * dwarf numbers corrected
* zmm14 definition fixed
+ commented definitions for bnd/k registers added
* made reg. cound a longint

git-svn-id: branches/tg74/avx512@39209 -
2018-06-10 14:17:37 +00:00
tg74
31e4d4ef5e AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512
git-svn-id: branches/tg74/avx512@39196 -
2018-06-08 06:53:35 +00:00
nickysn
49b414ffee + support ugly constructs like 'DD BYTE PTR 5' in the x86 intel syntax inline
assembler; these are TP7 and Delphi compatible

git-svn-id: trunk@39143 -
2018-05-29 15:43:08 +00:00
nickysn
e5de7d0eac * set all 16/32-bit specific stabs/dwarf register numbers of x86_64-only
registers to -1 in x86reg.dat. The values that used to be there weren't used
  at all (most were just copies of the 32-bit version of the register). This can
  be easily demonstrated by the fact that running 'make regdat' in the compiler
  directory doesn't change any of the generated files for i8086/i386/x86_64.

git-svn-id: trunk@39098 -
2018-05-23 15:29:33 +00:00
nickysn
a275d15da2 + added an i8086-specific column in x86reg.dat for the dwarf register numbers
and filled it with the dwarf register mapping, used by Open Watcom (Watcom
  also uses this mapping on i386, but we don't need to support their debugger on
  i386 for now)

git-svn-id: trunk@39097 -
2018-05-23 15:12:58 +00:00
nickysn
61e6d2afec + introduce asd_omf_linnum_line directives; they will be used for writing LINNUM
entries in the OMF object format

git-svn-id: trunk@39007 -
2018-05-16 17:05:02 +00:00
nickysn
d9925f7074 - removed pocall_far16 from the supported calling conventions of the i8086
code generator

git-svn-id: trunk@38938 -
2018-05-06 15:14:40 +00:00
nickysn
0a12bc4697 - removed pocall_oldfpccall from the supported calling conventions of the i8086
code generator

git-svn-id: trunk@38935 -
2018-05-06 14:07:31 +00:00
nickysn
c530e031b1 * synchronize get_saved_registers_int and get_volatile_registers_int for all
calling conventions on i386
* generated code at the caller side for pocall_pascal routines on i386 no longer
  assumes the routine destroys all registers (except ebp) - instead now it
  assumes that it preserves the ebx,esi,edi and ebp registers. This is
  compatible with the pascal calling convention of 32-bit delphi and was already
  honoured by FPC on the callee side.
* updated the list of calling conventions that save all registers, used in
  tx86callnode.can_call_ref, so it is accurate on all x86 platforms - i8086,
  i386 and x86_64.

git-svn-id: trunk@38904 -
2018-05-04 16:16:24 +00:00
nickysn
8a32d7c663 + also support constants like 'dd [5]' in the intel syntax inline asm (for BP7
compatibility)

git-svn-id: trunk@38855 -
2018-04-27 11:21:51 +00:00
nickysn
a8a627f334 - removed the _count_asmdirectives and _count_asmoperators constants from the
rax86int unit. Instead, the _asmoperators and _asmdirectives arrays now use
  tasmtoken directly as index.

git-svn-id: trunk@38854 -
2018-04-27 11:02:54 +00:00
nickysn
16e0172021 + partial support for BP7 reference-like inline asm constants
git-svn-id: trunk@38850 -
2018-04-26 14:31:13 +00:00
nickysn
74f5436563 * also replaced the 3 boolean output parameters of tx86intreader.BuildConstSymbolExpression with a set
git-svn-id: trunk@38833 -
2018-04-24 15:40:37 +00:00
nickysn
e05c0d0168 * replaced the 3 boolean input parameters of tx86intreader.BuildConstSymbolExpression with a set
git-svn-id: trunk@38832 -
2018-04-24 14:59:39 +00:00
Jonas Maebe
4686f61002 * keep track of the temp position separately from the offset in references,
so that they can still be freed after the reference has been changed
    (e.g. in case of array indexing or record field accesses) (mantis #33628)

git-svn-id: trunk@38814 -
2018-04-22 17:03:16 +00:00
nickysn
518cdf9674 * replaced the saved_XXX_registers arrays with virtual methods inside
tcpuparamanager, very similar to the existing get_volatile_registers_XXX. The
  new methods are called get_saved_registers_XXX, where XXX is the register
  type ("int", "address", "fpu" or "mm")

git-svn-id: trunk@38794 -
2018-04-19 21:22:16 +00:00
florian
088af633ba Fix casing, bug ID #38660
git-svn-id: trunk@38660 -
2018-04-02 08:53:31 +00:00
nickysn
c3483d1274 * make near/far procs/procvars compatible only with their matching (near vs far)
pointer type on i8086

git-svn-id: trunk@38646 -
2018-03-29 15:59:58 +00:00
florian
fa3ee68004 o patch by Dávid Pethes: Fixes for compilation with nasm 2.10 and higher on Win64:
* disable generation of RVA and SECREL32 symbols (according to comment in taiconst_type, they are win32 only)
  * use lowercase cpu names (it was changed from case-insensitive names sometime after 2.10)

git-svn-id: trunk@38579 -
2018-03-20 21:55:01 +00:00
nickysn
602dd31a45 + added a warning for using cs/ds/es/ss segment overrides in inline assembly on
the x86_64 target

git-svn-id: trunk@38517 -
2018-03-13 14:41:21 +00:00
nickysn
daf13d8750 * print a "Cannot use local variable or parameters here" error (instead of
internal error) in case of expressions that add two local variables using the
  [expr1[expr2]] syntax

git-svn-id: trunk@38514 -
2018-03-13 12:25:54 +00:00
florian
8b0bbdcaab * fix flag subregs after r38206
git-svn-id: trunk@38502 -
2018-03-11 20:30:11 +00:00
florian
9b18e39c81 * enable Lea2AddBase and Lea2AddIndex in TX86AsmOptimizer.PostPeepholeOptLea as we have flag tracking now
* some flag allocations fixed

git-svn-id: trunk@38501 -
2018-03-11 20:30:09 +00:00
florian
d86ffb9bfb + tcg.a_op_loc_reg
+ optimized tx86addnode.second_ordinal for x86

git-svn-id: trunk@38500 -
2018-03-11 16:32:26 +00:00
florian
5fbecc5501 + use TX86AsmOptimizer.OptPass1SHLSAL on x86-64
git-svn-id: trunk@38499 -
2018-03-11 14:35:22 +00:00
florian
47927f053a * factored out TX86AsmOptimizer.OptPass1SHLSAL
git-svn-id: trunk@38498 -
2018-03-11 14:35:19 +00:00
nickysn
77c782c89b * when adding OPR_LOCAL with OPR_REFERENCE in tx86intreader.AddReferences, add
the offsets correctly:
    1) localconstoffset is added with constoffset
    2) localsymofs is added with ref.offset

git-svn-id: trunk@38470 -
2018-03-09 14:17:19 +00:00
nickysn
68be282507 + support adding an OPR_REFERENCE to a OPR_LOCAL in the x86 intel syntax asm
reader; this fixes stuff like 'mov ax,cs:localvar[5]'

git-svn-id: trunk@38457 -
2018-03-08 14:32:31 +00:00
florian
78878f59b1 + generic TAOptObj.AllocRegBetween
- removed x86 specific AllocRegBetween

git-svn-id: trunk@38445 -
2018-03-07 22:17:35 +00:00
nickysn
6e79c8ba86 + support adding an OPR_LOCAL to a OPR_REFERENCE in
tx86intreader.AddReferences(); this allows things like mov ax,[cs:[local]] to
  work

git-svn-id: trunk@38444 -
2018-03-07 17:31:25 +00:00
nickysn
d3cb61b651 * refactored tx86intreader.AddReferences to use a pair of case statements,
depending on the combination of operand types; this is done, so that adding
  OPR_LOCAL with OPR_REFERENCE operands can be supported later.

git-svn-id: trunk@38443 -
2018-03-07 16:43:39 +00:00
marco
f0042a4719 * vcmppd hardcoded primitives like vcmpeqpd.
* required increasing maxinfolen to 9 

git-svn-id: trunk@38404 -
2018-03-03 23:32:54 +00:00
marco
f21a141144 * mantis #32001, add 32 vcmpps variants.
git-svn-id: trunk@38403 -
2018-03-03 23:10:03 +00:00
nickysn
2cee948b72 + support segment overrides in inline asm references to local variables or parameters on x86
git-svn-id: trunk@38392 -
2018-03-01 17:59:57 +00:00
nickysn
df6a870873 * print an "invalid segment override expression" error message in case a segment
override uses an invalid (non-segment) register in the x86 inline asm reader
  (both for intel and att syntax)

git-svn-id: trunk@38391 -
2018-03-01 15:34:16 +00:00
nickysn
c93c15429d + introduce tx86intreader.SetSegmentOverride(); using it everywhere adds more
checks for duplicated segment overrides (which cause a warning in TP mode and
  an error in all the other compiler modes)

git-svn-id: trunk@38384 -
2018-02-28 17:16:50 +00:00
nickysn
6f8abde786 + support [const+[ref]] in the x86 intel syntax asm reader
git-svn-id: trunk@38383 -
2018-02-28 16:24:45 +00:00
nickysn
8ffde52974 + also support [expr1]+[expr2] for adding references in the x86 intel syntax asm reader
git-svn-id: trunk@38381 -
2018-02-28 15:48:48 +00:00
florian
2385c47c28 * compilation on x86-64 fixed
git-svn-id: trunk@38370 -
2018-02-27 21:54:12 +00:00
florian
8c5606b41d + support mmx shifting
git-svn-id: trunk@38367 -
2018-02-27 21:40:12 +00:00
nickysn
9c814e42c9 + support segment overrides inside references (e.g. [es:bx]) in the x86 intel
syntax inline asm reader

git-svn-id: trunk@38365 -
2018-02-27 17:29:46 +00:00
nickysn
1cf1ab8ab9 * consume the register in the reference before the check for invalid reference
syntax in the x86 intel syntax asm reader; this is preparation for support of
  segment overrides inside the reference expression (i.e. [es:bx] instead of
  es:[bx])

git-svn-id: trunk@38363 -
2018-02-27 16:35:55 +00:00
nickysn
f623038da6 + fixed a bug in the previous commit, when adding two references, the first
containing a base register, the second - an index register with a scalefactor.
  The scalefactor was ignored in this case.

git-svn-id: trunk@38354 -
2018-02-26 17:30:08 +00:00
nickysn
45fdd7655d + support concatenation of references in x86 intel syntax inline asm:
[expr1][expr2] = [expr1+expr2]
  [expr1[expr2]] = [expr1+expr2]
  This is compatible with TP7's inline asm, and perhaps also with tasm/masm/delphi.

git-svn-id: trunk@38352 -
2018-02-26 17:17:47 +00:00
florian
c5f8567ed7 * getsubreg => getsupreg
git-svn-id: trunk@38344 -
2018-02-25 15:34:14 +00:00
florian
fc6c0e8ef4 + AndShlToShl optimization
* moved topsize2memsize to cpubase

git-svn-id: trunk@38343 -
2018-02-25 15:34:12 +00:00
florian
6e811d057c * MovOpMov2Op cannot be applied for L, Q, Q as operand sizes
+ test

git-svn-id: trunk@38337 -
2018-02-25 10:19:52 +00:00
florian
98bd768521 * remove type cast of the parameter of int(...), if an instruction is available which can be used directly
git-svn-id: trunk@38335 -
2018-02-24 23:13:27 +00:00
florian
3b779278e2 + (slightly) patch by Emelyanov Roman to add support of SEH directive in FPC internal assembler with INTEL syntax, resolves #29894
git-svn-id: trunk@38331 -
2018-02-24 16:14:08 +00:00
nickysn
506d5fe30e + support bracketless references in the x86 intel syntax; ugly, but TP7 (and
perhaps also Delphi, TASM and MASM)-compatible

git-svn-id: trunk@38296 -
2018-02-20 17:18:09 +00:00
florian
e92422383a * compilation fixed
git-svn-id: trunk@38280 -
2018-02-18 09:29:36 +00:00
florian
91514da267 * factored out TX86AsmOptimizer.PostPeepholeOptCall
+ use TX86AsmOptimizer.PostPeepholeOptCall on x86-64

git-svn-id: trunk@38278 -
2018-02-17 23:25:01 +00:00
florian
1b3627add1 + peephole optimization MovMov2Mov 5
git-svn-id: trunk@38273 -
2018-02-17 21:10:51 +00:00
florian
5eb59196d5 * remove sequential moves to the same register
+ test

git-svn-id: trunk@38267 -
2018-02-17 12:45:17 +00:00
florian
99f1fe54af * check for registers removed which is not needed anymore
git-svn-id: trunk@38265 -
2018-02-17 12:45:13 +00:00
florian
f66a91499d * FPC uses meanwhile more mov instructions, so extended taicpu.is_same_reg_move to support them
git-svn-id: trunk@38264 -
2018-02-17 09:45:19 +00:00
pierre
55289c13e4 Use af_no_stabs for clang assembler which does not support stabs debug format
git-svn-id: trunk@38238 -
2018-02-14 15:09:35 +00:00
florian
381cf78ff1 * there is no vmovq for mmx registers
git-svn-id: trunk@38208 -
2018-02-11 17:50:41 +00:00
florian
31f78ea2b6 + implementation of the vectorcall calling convention by J. Gareth Moreton
+ tests

git-svn-id: trunk@38206 -
2018-02-11 17:50:37 +00:00
florian
092223f400 * comment links to test now
git-svn-id: trunk@38204 -
2018-02-11 16:38:33 +00:00
florian
e5ebc65cce * if si and di are allocated on i8086, using an index in references is not possible anymore
git-svn-id: trunk@38203 -
2018-02-11 15:54:37 +00:00
nickysn
ae6a4030c3 + support evaluation of recordtype*constant in the intel syntax inline asm.
The recordtype itself is evaluated to 0. This makes e.g.
  'test [di+recordtype*5], 1' work. This is TP7 compatible.

git-svn-id: trunk@38200 -
2018-02-11 03:42:45 +00:00
nickysn
f0765421eb + also set the operand size in constants like recordtype (without addressing a
record field). This makes e.g.
    test [di + recordtype], 1
  work and use the size of recordtype to determine the operand size; recordtype
  itself is evaluated to 0, so if recordtype's size is 2 bytes, the above
  instruction assembles as:
    test word ptr [di], 1
  Ugly, but TP7 compatible.

git-svn-id: trunk@38176 -
2018-02-09 17:43:31 +00:00
nickysn
7338437dcd * allow recordtype.recordfield constants to set the operand size; this makes things like
test [di + recordtype.recordfield], 1
  work, as long as the size of recordfield is a valid operand size for the target

git-svn-id: trunk@38175 -
2018-02-09 17:36:54 +00:00
nickysn
f829f70186 * use the 'size' return value of BuildConstSymbolExpression to set the operand size
git-svn-id: trunk@38174 -
2018-02-09 17:22:39 +00:00
nickysn
384715be8d + add an extra output parameter 'size' to tx86intreader.BuildConstSymbolExpression,
which allows const symbol expressions to also have a size sometimes. Why?
  Because TP7 (and perhaps Delphi) allows not specifying the size in e.g.
    test [di+recordtype.recordfield], 1
  in this case, the operand size (byte ptr, word ptr, dword ptr, qword ptr) is
  determined by the size of recordtype.recordfield; this already happens with
  variables, but in this case, this is a type.field, which is resolved to a
  constant.
  This commit only adds a dummy 'size' parameter, which is always initialized to
  0 and not used. The actual implementation of the above will follow in separate
  commits.

git-svn-id: trunk@38173 -
2018-02-09 16:52:12 +00:00
nickysn
4b339fd133 * convert the 'var' parameters of tx86intreader.BuildConstSymbolExpression to 'out'
git-svn-id: trunk@38172 -
2018-02-09 16:20:34 +00:00
nickysn
84611d716b * convert the 'var' parameters of tx86intreader.BuildRecordOffsetSize to 'out'
git-svn-id: trunk@38171 -
2018-02-09 16:15:40 +00:00
nickysn
391f85f828 + for TP7 compatibility, allow the '&', '$' and '?' characters in the x86 intel
syntax inline asm reader

git-svn-id: trunk@38167 -
2018-02-08 16:54:33 +00:00
nickysn
5f56f6ec11 * always pass a valid constsize to ConcatConstSymbol; this prevents a compiler
internal error on i8086, generated by 'DB xx' or 'DB OFFSET xx'

git-svn-id: trunk@38153 -
2018-02-07 16:17:05 +00:00
nickysn
a792a92cfb * prevent the spurious warning, generated by 'DD xx' and 'DD OFFSET xx' on i8086
git-svn-id: trunk@38152 -
2018-02-07 16:14:05 +00:00
nickysn
3ad3807b6f + accept the 'DB/DW/DD OFFSET xx' syntax
git-svn-id: trunk@38150 -
2018-02-07 16:07:59 +00:00
nickysn
3b1bd8de3f + actually set hasofs to true if 'offset' is encountered in BuildConstSymbolExpression
git-svn-id: trunk@38149 -
2018-02-07 16:03:40 +00:00
nickysn
d591e698ac + added parameter 'hasofs' to ConcatConstSymbol. Will be used to support 'dd xx'
vs 'dd offset xx' being different on i8086.

git-svn-id: trunk@38148 -
2018-02-07 15:23:48 +00:00
nickysn
70038f1c0b + added extra boolean out parameter 'hasofs' to
tx86intreader.BuildConstSymbolExpression; it returns whether the 'OFFSET'
  keyword has been used in the expression. This will be used for disambiguation
  between 'dd xx' and 'dd offset xx', because they should produce different
  results on i8086 (the first generates a far pointer, i.e. the same as
  'dw xx, SEG xx', the second - a 32-bit offset)

git-svn-id: trunk@38147 -
2018-02-07 15:09:54 +00:00
nickysn
629be9cee1 + add a 'constsize' parameter to ConcatConstSymbol, so it can be used to
distinguish between e.g. 16-bit and 32-bit offsets on i8086

git-svn-id: trunk@38141 -
2018-02-06 16:22:41 +00:00
florian
e6a6938787 * make fpu/mmx/xmm/ymm registers numbers instead of flags to have enough space for zmm/bnd/k registers
git-svn-id: trunk@38116 -
2018-02-04 20:29:41 +00:00
nickysn
1f0e311fdd + allow segment override prefixes to be used as a standalone opcode in the intel
syntax inline assembler; this is TP7 compatible and allows compiling ugly
  code, such as 'seges; db $67,$66; lodsw'

git-svn-id: trunk@38096 -
2018-02-01 17:31:59 +00:00
florian
810acd82b2 * patch by J. Gareth Moreton that makes some improvements to the Peephole Optimizer for x86 and x86-64 code, as well as some cleanup with formatting, code syntax consistency, and debug messages.
- xorq %reg,%reg (identical registers) is now changed to xorl %reg,%reg if doing so removes the REX prefix.
  - movw %bx,%ax; andl $0xffff,%eax, for example, is now changed to movzwl %bx,%eax as long as a conditional operation doesn't follow 'and' (checks to see if the CPU flags are in use).
  - movzbq and movzwq get optimised to movzbl and movzwl respectively if doing so removes the REX prefix.
  - Removal of optimisation code that zero-extends from 32-bit to 64-bit, because there isn't actually a valid combination of opcodes for MOVZX that allows that (for registers,
    just use  MOV). This is not the case with MOVSX.
  - movq is now optimised to movl even if the CPU flags are in use (this stops mov %reg,0 from being optimised to xor %reg,%reg if doing so breaks an algorithm that relies on them).
  - Fixed typo in peephole message regarding movq to movl (it said movd instead).
  - Made the peephole debug messages more consistent in formatting, some of which now have more detail.
* small fixes of the patch

git-svn-id: trunk@38070 -
2018-01-28 14:41:54 +00:00
florian
10ea652493 * fix for #32576
+ test case

git-svn-id: trunk@38069 -
2018-01-28 13:26:49 +00:00
florian
93353d8d79 * typo
git-svn-id: trunk@38068 -
2018-01-28 13:26:47 +00:00
svenbarth
d50848174a + add putboolean and getboolean convenience methods to tentfile
* use putboolean and getboolean where approbiate

git-svn-id: trunk@37972 -
2018-01-14 21:36:02 +00:00
florian
5c4b1737c4 * in the generate_code normally imaginary registers are used, so just resize the register to 8 bit, the register allocator takes care of the rest
git-svn-id: trunk@37964 -
2018-01-13 22:05:38 +00:00
florian
4a98fcb9d3 * patch by J. Gareth Moreton: reorganises the produced machine code for large unsigned divisions, resolves #32984
git-svn-id: trunk@37950 -
2018-01-12 22:03:52 +00:00
florian
52aa40c3b0 * remove explicit cast to int64 to avoid an internalerror 200706094, resolves #33004
git-svn-id: trunk@37946 -
2018-01-11 21:02:39 +00:00
florian
1a69c49e81 * fix range check errors by explicit casts
git-svn-id: trunk@37945 -
2018-01-11 21:00:18 +00:00
florian
724b822b54 * patch based on a proposal by J. Gareth Moreton to reduce register usage
git-svn-id: trunk@37941 -
2018-01-09 21:32:18 +00:00
florian
11a3d8762a * patch by J. Gareth Moreton:
- Moved the part that emits the CMOV command outside of the if-else block, because it's the same in both branches and was just duplicated code.
  - Moved a comment about powers of 2 to be right before the correct if-else block.
  - Added a couple of comments to explain what the algorithm is doing to obtain the remainder.
  - Added missing "writeln('ok');" (since 'tmoddiv3.pp' has it) and program header to 'tmoddiv4.pp'.
  - Changed program name from "testfile2" to "tmoddiv3" in 'tmoddiv3.pp'.

git-svn-id: trunk@37939 -
2018-01-09 20:04:49 +00:00
florian
81b2cf5d65 * slightly modified patch by J. Gareth Moreton: Optimization for 'mod' on i386/x86-64, resolves #32945
git-svn-id: trunk@37922 -
2018-01-06 14:58:28 +00:00
Jonas Maebe
f1ace2b74d - reverted r36870, Darwin's assembler uses a different way to specify
32/64 bit (like it was before; fixes mantis #32954)

git-svn-id: trunk@37914 -
2018-01-05 19:48:19 +00:00
Jonas Maebe
1b66995754 * factored out check to determine whether a variable can be subscripted in
inline assembly, and fixed check after r35959 (mantis #32318)
   o can also subscript parameters passed by value on the stack
   o can also subscript local variables, the parameters passed by reference
     that are subsequently copied into a local

git-svn-id: trunk@37886 -
2018-01-01 14:29:21 +00:00
nickysn
c464f7fa56 * fixed the SEG inline asm directive when used with 32-bit registers on the i8086 target
git-svn-id: trunk@37613 -
2017-11-22 15:04:30 +00:00
Károly Balogh
e6aed467b5 renamed script unit to cscript to avoid namespace conflict with univint package on Darwin. this makes it possible to build the textmode IDE on Darwin
git-svn-id: trunk@37598 -
2017-11-17 11:27:19 +00:00
florian
674398c5a5 * i8086 compilation fixed after r37572
git-svn-id: trunk@37573 -
2017-11-11 13:25:02 +00:00
florian
73fda1ccb6 * factored out OptPass1Sub
+ make use of OptPass1Sub on x86_64 and i8086 as well

git-svn-id: trunk@37572 -
2017-11-10 20:55:22 +00:00
nickysn
ae92973196 + added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and
retfq x86 instructions. These are variants of the ret instruction with the
  return offset size set explicitly, e.g. retfw is a 16-bit far ret (i.e. pops
  a 16-bit offset and a 16-bit segment), retfd is a 32-bit far ret (pops a
  32-bit offset, followed by a 16-bit segment), etc.

git-svn-id: trunk@37571 -
2017-11-10 16:53:29 +00:00
pierre
176cec14c9 Fix value of NR_DR6 and NR_DR7
git-svn-id: trunk@37564 -
2017-11-07 07:29:54 +00:00
florian
1556599ad5 * symbols with bind type AB_EXTERNAL_INDIRECT need to be declared as EXTERN for masm/nasm etc.
git-svn-id: trunk@37553 -
2017-11-04 19:10:17 +00:00
florian
4da4b768ec * factored out PostPeepholeOptTest
+ use PostPeepholeOptTest on x86-64

git-svn-id: trunk@37551 -
2017-11-04 19:10:14 +00:00
florian
3097eaf8ee * made PostPeepholeOptMov a function
git-svn-id: trunk@37550 -
2017-11-04 19:10:12 +00:00
florian
a7ea7fb569 * factored out PostPeepholeOptCmp
+ use PostPeepholeOptCmp for x86_64

git-svn-id: trunk@37549 -
2017-11-04 19:10:09 +00:00