Commit Graph

69 Commits

Author SHA1 Message Date
Karoly Balogh
3cea1706e9 m68k: more work on instruction validation for the internal assembler 2023-01-09 12:01:10 +01:00
Karoly Balogh
459dc68ab9 m68k: more boiler plate and refactor for a future internal assembler 2023-01-05 13:32:34 +01:00
Károly Balogh
55d4ffa9de m68k: add missing FINT and FINTRZ instructions to spilling_get_operation_type()
git-svn-id: trunk@47266 -
2020-10-31 21:57:59 +00:00
Károly Balogh
f20c76d73b m68k: fixed a long standing issue, where FPU registers would be clamped to single precision during spilling
git-svn-id: trunk@46307 -
2020-08-07 07:54:26 +00:00
Károly Balogh
16fc8c8d9a m68k: added some handling for the explicit precision FPU instructions in the spilling and optimizer. fixed a_fsabs and a_fdabs names
git-svn-id: trunk@42943 -
2019-09-08 09:21:17 +00:00
Károly Balogh
87e8010f05 m68k: support 32x32 to 64bit MUL generation when targeting CPUs which support this instruction
git-svn-id: trunk@36339 -
2017-05-25 22:35:12 +00:00
Károly Balogh
e9ff684ff0 m68k: handle operand type correctly for 3 operand mul/div
git-svn-id: trunk@36334 -
2017-05-25 20:52:57 +00:00
Károly Balogh
07cfb2f43a m68k: removed unused 3 ops taicpu constructors
git-svn-id: trunk@35494 -
2017-02-28 22:10:59 +00:00
Károly Balogh
5237a4d5e2 m68k: support register pair operands in assembler reader and writer, as used by some instructions (mainly DIVS/DIVU and friends) so we don't have to hack them as three operand instructions
git-svn-id: trunk@34782 -
2016-11-05 17:07:18 +00:00
Károly Balogh
a2a630e9c5 m68k: fixed and enabled hardware mod/div support for coldfire, also it no longer depends on cpu family but cpu capability
git-svn-id: trunk@33821 -
2016-05-26 16:54:39 +00:00
Károly Balogh
e7838dad39 m68k: initial asm-level infrastructure to let the codegenerator output float consts as operands, which is supported on 88x/040/060
git-svn-id: trunk@33667 -
2016-05-10 13:47:46 +00:00
Károly Balogh
3e2319ff3a m68k: do not allocate/free the regset dynamically having it as a normal field is perfectly fine
git-svn-id: trunk@33665 -
2016-05-10 13:03:17 +00:00
Károly Balogh
2e64db935a m68k: BSET and BCLR's dest operand is actually readwrite, not write only. fixes sets with regvars, when the regvar is spilled
git-svn-id: trunk@33476 -
2016-04-10 18:56:51 +00:00
Károly Balogh
001dfecdf5 m68k: use isregoverlap in is_same_reg_move, to determine if we're doing a no-op move
git-svn-id: trunk@32657 -
2015-12-13 18:14:21 +00:00
Károly Balogh
c49c8210a3 m68k: some initial HLCG, use BSET/BCLR instructions for simple bit manipulation
git-svn-id: trunk@30275 -
2015-03-22 14:01:14 +00:00
Károly Balogh
258b42de26 m68k: added support for FSIN/FCOS. these are software supported on the 68040, so we should have a separate 68040/060 FPU option too, to avoid these in the future.
git-svn-id: trunk@30257 -
2015-03-17 22:52:53 +00:00
Károly Balogh
997ec578e0 m68k: added a simple unaryminusnode which can utilize FNEG instruction for floats on 68881
git-svn-id: trunk@30044 -
2015-03-01 15:00:07 +00:00
Károly Balogh
c72f58bcc5 m68k: implemented sqrt_real and abs_real inlines
git-svn-id: trunk@29805 -
2015-02-23 02:41:33 +00:00
Károly Balogh
c062e55aa2 m68k: after a compare on the FPU, move the condition flags back to the CPU. this should make floating point compare actually working
git-svn-id: trunk@29704 -
2015-02-15 13:41:40 +00:00
Károly Balogh
a99c9c29b6 m68k: basic 68881 FPU register save/restore support. probably still needs some work here and there.
git-svn-id: trunk@29644 -
2015-02-07 22:13:07 +00:00
Károly Balogh
460c4acaee m68k: implement taicpu.spilling_get_operation_type_ref, supports predecrement/postincrement addressing
git-svn-id: trunk@29593 -
2015-02-01 15:28:54 +00:00
Károly Balogh
d000b1bc7c m68k: basic 68881 fpu support. probably still broken at umpzillion places, and mostly untested, but at least it builds the RTL and all packages successfully with -Cp68020 -Cf68881 instead of dying with random internalerrors() and now even emits actual FPU opcodes.
git-svn-id: trunk@29370 -
2015-01-02 05:29:45 +00:00
Károly Balogh
d561e8ab57 m68k: generate smarter shifting/rotation code on 68k, for example by utilizing the SWAP instruction
git-svn-id: trunk@28617 -
2014-09-07 23:46:46 +00:00
sergei
b91d965096 * m68k: initial support for ROL/ROR operations, defining 'cpurox' for CPU target can actually enable them. However it cannot be done outright because these instructions do not exits on Coldfire, and internal processing of RoX,Sar,BsX, etc. can not yet be switched depending on CPU subtype.
git-svn-id: trunk@28101 -
2014-06-29 17:49:30 +00:00
Károly Balogh
9ec1d4ee89 fixed spilling operation type for some ColdFire instructions
git-svn-id: trunk@27064 -
2014-03-09 23:04:28 +00:00
Károly Balogh
aedf2dc20d fixed spilling operation type for A_LEA, fixes test tb0112 to compile, but still fails to run
git-svn-id: trunk@25745 -
2013-10-11 02:03:48 +00:00
Károly Balogh
4c5f273bc5 removed redundant instruction table only used for ugly debug, and the ugly debug code itself
git-svn-id: trunk@25739 -
2013-10-10 21:16:07 +00:00
florian
babbc21afd * fix handling of register sets on m68k: it is required that they are stored as two tcpuregistersets because address registers and data registers have different register types
git-svn-id: trunk@25726 -
2013-10-09 18:15:06 +00:00
Károly Balogh
b1b90211f1 fixed spilling operation type for lots of operations (thanks Florian), fixes a few endless loops in the testsuite, at least
git-svn-id: trunk@25696 -
2013-10-06 16:51:39 +00:00
svenbarth
ccecf2c13c Fix comparisons (aka usage of flag/CCR register)
m68k/aasmcpu.pas, taicpu.spilling_get_operation_type:
  * add all Sxx instructions as "operand_write" instructions

m68k/n68kadd.pas, t68kaddnode.getresflags:
  * use the correct operation in case of swapped nodes

m68k/cgcpu.pas, tcg68k.g_flags2reg:
  - don't move a 0 to the register, because this will CLR it and thus the flags won't be valid anymore...
  - NEG would have been the wrong operation (NOT would have been correct), but it isn't needed anyway...
  * simplify the method by handling the address register case only when necessary

git-svn-id: trunk@23383 -
2013-01-14 20:31:15 +00:00
svenbarth
5adb28a935 m68k/aasmcpu.pas, taicpu.spilling_get_operation_type:
+ NEGX is a readwrite instruction

git-svn-id: trunk@23093 -
2012-12-02 11:48:57 +00:00
pierre
6bc6036fd5 Set cai_align and cai_cpu
git-svn-id: trunk@22769 -
2012-10-19 15:38:39 +00:00
pierre
b104d9c9e6 Add some missing instructions to spilling_get_operation_type method
git-svn-id: trunk@22760 -
2012-10-19 10:18:16 +00:00
svenbarth
d9a61f2082 * make internal error unique
* add MULU and MULS to taicpu.get_spilling_operation_type

git-svn-id: trunk@22746 -
2012-10-18 20:12:16 +00:00
svenbarth
83da4592d3 m68k/aasmcpu, taicpu.spilling_get_operation_type: add support for A_SUBX
git-svn-id: trunk@22724 -
2012-10-18 20:10:24 +00:00
yury
491f0fa1d8 * Replaced all user defined warnings by TODO comments to reduce compiler noise.
git-svn-id: trunk@11443 -
2008-07-23 11:00:03 +00:00
florian
94ea214f32 * more spilling fixes
git-svn-id: trunk@9820 -
2008-01-20 16:13:20 +00:00
florian
50294418bc * spilling for neg, ext and extb fixed
git-svn-id: trunk@9819 -
2008-01-20 16:07:42 +00:00
Károly Balogh
b91c0756c4 + made m68k to compile system unit again
git-svn-id: trunk@9017 -
2007-10-31 22:33:00 +00:00
daniel
182fca72f2 * Change spill_* routines to return Taicpu instead of Tai to increase
strong typing.
  * Fix PowerPC R0 register allocation

git-svn-id: trunk@7317 -
2007-05-12 15:43:16 +00:00
Jonas Maebe
a23fa2e81e * moved (unfinished) routines related to writing taicpu's to ppu files
from x86/aasmcpu to aasmtai and (new) aasmsym, so that when they're
    finished they're available for all targets
  * added dummy implementation of tai_cpu_abstract.pass1 and pass2 so there
    are no more hundreds of warnings on non-x86 about constructing taicpu
    instances with abstract methods

git-svn-id: trunk@5787 -
2007-01-02 18:28:05 +00:00
florian
4cbb67aa00 * some fpu emulation code from arm to generic code generator moved
* several m68k fixes

git-svn-id: trunk@5218 -
2006-11-04 10:23:35 +00:00
peter
b7fe6797bf Merged revisions 2921-2922,2925 via svnmerge from
http://svn.freepascal.org/svn/fpc/branches/linker/compiler

........
r2921 | peter | 2006-03-15 08:35:00 +0100 (Wed, 15 Mar 2006) | 2 lines

  * pass ObjectWriter to ObjectOuput

........
r2922 | peter | 2006-03-15 12:40:30 +0100 (Wed, 15 Mar 2006) | 2 lines

  * refactor asmdata

........
r2925 | peter | 2006-03-15 16:09:39 +0100 (Wed, 15 Mar 2006) | 3 lines

  * add cfi to asmdata
  * move asmlist, asmcfi, asmdata to own unit

........

git-svn-id: trunk@2932 -
2006-03-16 08:52:22 +00:00
Károly Balogh
3b2fe2b622 * some more tiny m68k hacks...
git-svn-id: trunk@2804 -
2006-03-07 23:01:55 +00:00
Károly Balogh
a9dbab1035 - tiny bits of mess cleanup
git-svn-id: trunk@2399 -
2006-02-02 00:11:49 +00:00
florian
2c1e796f1f * fixed regallocator for m68k
git-svn-id: trunk@2395 -
2006-02-01 20:26:28 +00:00
Károly Balogh
37024dc4d0 + more m68k mess... ignore :)
git-svn-id: trunk@2384 -
2006-01-31 16:58:50 +00:00
Károly Balogh
238964e443 Various m68k fixes/additions:
- fixes in asmreader, basic stuff works again, the rest is untested
  - removed lot of unnecessary ungetcpuregister()s
  - various other fixes i forgot
  + basic amigaos syscalls support. still lacks explicit funcretloc

git-svn-id: trunk@1943 -
2005-12-13 20:42:15 +00:00
peter
1f8c074ab4 * make m68k compile
git-svn-id: trunk@1138 -
2005-09-19 11:46:23 +00:00
Károly Balogh
bbfea4d03f an attempt to fix a bit more stuff in m68k
git-svn-id: trunk@794 -
2005-08-04 21:28:25 +00:00