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30 Commits

Author SHA1 Message Date
florian
c564acd378 * fix assembling of vfnm* 
git-svn-id: trunk@33189 -
 2016-03-06 13:33:29 +00:00
Jeppe Johansen
439027a8de Add most pre-UAL VFP instruction forms. 
Add fused mac instructions for VFPv4.

git-svn-id: trunk@30187 -
 2015-03-14 14:59:13 +00:00
Jeppe Johansen
3d7dce81fe Make MRS and MSR use the right encoding on Thumb architectures. 
Set regnumber_count_bsstart to 128 to be able to search all registers.

git-svn-id: branches/laksen/armiw@30150 -
 2015-03-08 17:30:38 +00:00
Jeppe Johansen
572076fc4d Add MSR/MRS for ARMv6M/7M. 
Fix bug in FPA LFM/SFM.
Add usermode handling of LDM/STM.

git-svn-id: branches/laksen/armiw@29371 -
 2015-01-02 13:24:03 +00:00
Jeppe Johansen
f963ff1b5b Add CPSxx instructions, and some missing FPA instructions. 
git-svn-id: branches/laksen/armiw@29368 -
 2015-01-01 21:17:21 +00:00
Jeppe Johansen
ff7af306df Add FPA support. 
git-svn-id: branches/laksen/armiw@29366 -
 2015-01-01 11:18:04 +00:00
Jeppe Johansen
49346b3041 Fix SWI as a pseudo instruction. 
Add VFPv2/3 instruction entries for Thumb2.

git-svn-id: branches/laksen/armiw@29356 -
 2014-12-29 11:34:34 +00:00
Jeppe Johansen
9a482d5281 Refactor and secure some immediate operand encodings. 
Add some system mode entries, udiv/sdiv in arm mode, and fix bugs in ldrh/strh.

git-svn-id: branches/laksen/armiw@29353 -
 2014-12-28 21:41:06 +00:00
Jeppe Johansen
3ad03491ed Add Neg as a pseudo instruction, and fix RRX pseudo code expansion. 
Split some of the thumb code emission rules to make it easier to specify short-cut notations.

git-svn-id: branches/laksen/armiw@29345 -
 2014-12-27 17:44:30 +00:00
Jeppe Johansen
6fff181679 Add support for TBB/TBH instructions. 
Precisize rules for selection of thumb instructions.
Add short-cut notation support for most simple Thumb2 instructions ( add r1,#4 instead of add r1,r1,#4 ).

git-svn-id: branches/laksen/armiw@29343 -
 2014-12-27 16:00:06 +00:00
Jeppe Johansen
71cdedea82 Add missing NOP, and B instruction forms. 
Move ThumbFunc flag from section to symbol.
Make .w forms optional the other way around. If .w is explicitly put on an instruction the assembler should always chose a wide form.

git-svn-id: branches/laksen/armiw@29341 -
 2014-12-27 13:23:02 +00:00
Jeppe Johansen
cc418eef74 Added unified assembler syntax mode so it can be selected with $ASMMODE. 
Fixed bug in Mov instruction.
Added initial scanning of IT/LastInIT detection for proper instruction selection.
Disabled "wide" format flag detection again for now.

git-svn-id: branches/laksen/armiw@29338 -
 2014-12-27 00:19:09 +00:00
Jeppe Johansen
9683102813 BL/BLX in thumb mode is a long composed instruction in Thumb as well as Thumb2 
git-svn-id: branches/laksen/armiw@29333 -
 2014-12-26 23:10:34 +00:00
Jeppe Johansen
5c3093a937 Add most non-VFP Thumb-2 instruction entries for the ARM internal writer. 
git-svn-id: branches/laksen/armiw@29329 -
 2014-12-26 18:35:15 +00:00
Jeppe Johansen
3cb9b30165 Added full 16-bit Thumb support to the ARM internal writer. 
git-svn-id: branches/laksen/armiw@29326 -
 2014-12-25 19:33:14 +00:00
Jeppe Johansen
901275b4a1 Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen). 
Add missing fields to other elf targets.

git-svn-id: branches/laksen/armiw@29286 -
 2014-12-14 16:28:35 +00:00
Jeppe Johansen
6c4dbf5a84 Change emission of pre-reloc BLX to BL. 
git-svn-id: branches/laksen/armiw@29278 -
 2014-12-12 23:12:53 +00:00
Jeppe Johansen
387824c1ee Added some APSR register bitmask definitions. 
Fixed a bunch of instruction encodings by comparing bulks of handwritten tests to binutils assembled versions.
Fixed emission of regsets of S and D registers above 15.
Fixed assembler reader for RRX shiftmode.
There can be a size postfix after a condition code in UAL assembler syntax. This has been added to the assembler reader.

git-svn-id: branches/laksen/armiw@29277 -
 2014-12-12 22:23:44 +00:00
Jeppe Johansen
414bfba2b2 Emitted instruction was B instead of BL for BL/BLX. 
git-svn-id: branches/laksen/armiw@29262 -
 2014-12-11 22:11:10 +00:00
Jeppe Johansen
e8cb1e198d Forgot to rebuild instruction tables. 
git-svn-id: branches/laksen/armiw@29261 -
 2014-12-11 21:58:05 +00:00
Jeppe Johansen
eb3eaab54b Fix some small encoding bugs. 
git-svn-id: branches/laksen/armiw@29250 -
 2014-12-10 23:28:09 +00:00
Jeppe Johansen
d023c63ad0 Add a lot of instruction table entries and missing instructions for support of most ARM32 mode instructions from ARMv4 up ARMv7A. 
Add some VFP registers.
Rebuilt tables.
Added a lot of VFPv3 and Advanced SIMD(not supported yet) oppostfixes.
Implemented code in aasmcpu to generate binary code from the instructions. Only ARM32 supported so far.

git-svn-id: branches/laksen/armiw@29246 -
 2014-12-10 20:38:23 +00:00
Jeppe Johansen
666332385d Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) 
git-svn-id: branches/laksen/arm-embedded@22778 -
 2012-10-19 18:23:14 +00:00
florian
c5816c500a + support for nop, msr and mrs instructions 
git-svn-id: trunk@12609 -
 2009-01-26 14:18:42 +00:00
florian
e8c48ab561 + eDSP instructions for arm 
git-svn-id: trunk@6425 -
 2007-02-11 15:10:27 +00:00
florian
95dc2eba5f * basic operand matching works 
+ skeleton for pass 2 implemented

git-svn-id: trunk@1075 -
 2005-09-11 20:53:16 +00:00
florian
6ad3930a5d * fixed broken powerpc compilation 
* fixed imm24 constant matching on the arm

git-svn-id: trunk@1074 -
 2005-09-11 16:13:55 +00:00
florian
d280ed6e8b * continued to work on arm binary writer, started to fix operand matching 
git-svn-id: trunk@1073 -
 2005-09-11 10:01:54 +00:00
florian
9452e2a91f + added all used instructions to armins.dat 
* first clean up of armins.dat

git-svn-id: trunk@1065 -
 2005-09-08 22:08:31 +00:00
florian
14fca113bf * basic framework for integrated arm assembler 
git-svn-id: trunk@1061 -
 2005-09-07 21:34:25 +00:00